Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

target/riscv: avoid unnecessary dcsr.ebreak* update on reset #1154

Merged
merged 1 commit into from
Oct 30, 2024
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 7 additions & 1 deletion src/target/riscv/riscv-013.c
Original file line number Diff line number Diff line change
Expand Up @@ -2837,6 +2837,12 @@ static int assert_reset(struct target *target)
return riscv013_invalidate_cached_progbuf(target);
}

static bool dcsr_ebreak_config_equals_reset_value(const struct target *target)
{
RISCV_INFO(r);
return !(r->riscv_ebreakm || r->riscv_ebreaks || r->riscv_ebreaku);
}

static int deassert_reset(struct target *target)
{
RISCV013_INFO(info);
Expand Down Expand Up @@ -2903,7 +2909,7 @@ static int deassert_reset(struct target *target)
target->state = TARGET_RUNNING;
target->debug_reason = DBG_REASON_NOTHALTED;
}
info->dcsr_ebreak_is_set = false;
info->dcsr_ebreak_is_set = dcsr_ebreak_config_equals_reset_value(target);

/* Ack reset and clear DM_DMCONTROL_HALTREQ if previously set */
control = 0;
Expand Down