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Merge pull request #885 from erhankur/fix_tool_warnings
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Fix Checkpatch and Sparse tool warnings
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@timsifive
timsifive authored Jul 21, 2023
2 parents 1a089d8 + 617f62a commit 21fd3e1
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Showing 7 changed files with 63 additions and 69 deletions.
8 changes: 2 additions & 6 deletions src/server/gdb_server.c
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Original file line number Diff line number Diff line change
Expand Up @@ -3012,7 +3012,8 @@ static int gdb_query_packet(struct connection *connection,
return ERROR_OK;
}

static bool gdb_handle_vcont_packet(struct connection *connection, const char *packet, int packet_size)
static bool gdb_handle_vcont_packet(struct connection *connection, const char *packet,
__attribute__((unused)) int packet_size)
{
struct gdb_connection *gdb_connection = connection->priv;
struct target *target = get_available_target_from_connection(connection);
Expand All @@ -3031,7 +3032,6 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p

if (parse[0] == ';') {
++parse;
--packet_size;
}

/* simple case, a continue packet */
Expand Down Expand Up @@ -3070,14 +3070,11 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p
int current_pc = 1;
int64_t thread_id;
parse++;
packet_size--;
if (parse[0] == ':') {
char *endp;
parse++;
packet_size--;
thread_id = strtoll(parse, &endp, 16);
if (endp) {
packet_size -= endp - parse;
parse = endp;
}
} else {
Expand Down Expand Up @@ -3115,7 +3112,6 @@ static bool gdb_handle_vcont_packet(struct connection *connection, const char *p

if (parse[0] == ';') {
++parse;
--packet_size;

if (parse[0] == 'c') {
parse += 1;
Expand Down
2 changes: 0 additions & 2 deletions src/target/arm7_9_common.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1553,7 +1553,6 @@ static int arm7_9_restore_context(struct target *target)

if (dirty) {
uint32_t mask = 0x0;
int num_regs = 0;
uint32_t regs[16];

if (mode_change) {
Expand All @@ -1576,7 +1575,6 @@ static int arm7_9_restore_context(struct target *target)
if (reg->dirty) {
regs[j] = buf_get_u32(reg->value, 0, 32);
mask |= 1 << j;
num_regs++;
reg->dirty = false;
reg->valid = true;
LOG_DEBUG("writing register %i mode %s "
Expand Down
4 changes: 2 additions & 2 deletions src/target/riscv/batch.c
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Original file line number Diff line number Diff line change
Expand Up @@ -127,7 +127,7 @@ int riscv_batch_run(struct riscv_batch *batch)
return ERROR_OK;
}

void riscv_batch_add_dmi_write(struct riscv_batch *batch, unsigned address, uint64_t data,
void riscv_batch_add_dmi_write(struct riscv_batch *batch, unsigned int address, uint64_t data,
bool read_back)
{
assert(batch->used_scans < batch->allocated_scans);
Expand Down Expand Up @@ -194,7 +194,7 @@ void riscv_batch_add_nop(struct riscv_batch *batch)
batch->used_scans++;
}

void dump_field(int idle, const struct scan_field *field)
static void dump_field(int idle, const struct scan_field *field)
{
static const char * const op_string[] = {"-", "r", "w", "?"};
static const char * const status_string[] = {"+", "?", "F", "b"};
Expand Down
2 changes: 1 addition & 1 deletion src/target/riscv/batch.h
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Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ bool riscv_batch_full(struct riscv_batch *batch);
int riscv_batch_run(struct riscv_batch *batch);

/* Adds a DMI write to this batch. */
void riscv_batch_add_dmi_write(struct riscv_batch *batch, unsigned address, uint64_t data,
void riscv_batch_add_dmi_write(struct riscv_batch *batch, unsigned int address, uint64_t data,
bool read_back);

/* DMI reads must be handled in two parts: the first one schedules a read and
Expand Down
62 changes: 31 additions & 31 deletions src/target/riscv/riscv-013.c
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Original file line number Diff line number Diff line change
Expand Up @@ -47,9 +47,9 @@ static int riscv013_step_current_hart(struct target *target);
static int riscv013_on_step(struct target *target);
static int riscv013_resume_prep(struct target *target);
static enum riscv_halt_reason riscv013_halt_reason(struct target *target);
static int riscv013_write_debug_buffer(struct target *target, unsigned index,
static int riscv013_write_debug_buffer(struct target *target, unsigned int index,
riscv_insn_t d);
static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned
static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned int
index);
static int riscv013_invalidate_cached_debug_buffer(struct target *target);
static int riscv013_execute_debug_buffer(struct target *target);
Expand Down Expand Up @@ -1005,7 +1005,7 @@ static uint32_t abstract_memory_size(unsigned width)
* Creates a memory access abstract command.
*/
static uint32_t access_memory_command(struct target *target, bool virtual,
unsigned width, bool postincrement, bool is_write)
unsigned int width, bool postincrement, bool is_write)
{
uint32_t command = set_field(0, AC_ACCESS_MEMORY_CMDTYPE, 2);
command = set_field(command, AC_ACCESS_MEMORY_AAMVIRTUAL, virtual);
Expand Down Expand Up @@ -1855,8 +1855,8 @@ static int examine(struct target *target)
if (!halted) {
r->prepped = true;
if (riscv013_halt_go(target) != ERROR_OK) {
LOG_TARGET_ERROR(target, "Fatal: Hart %d failed to halt during examine()",
info->index);
LOG_TARGET_ERROR(target, "Fatal: Hart %d failed to halt during %s",
info->index, __func__);
return ERROR_FAIL;
}
target->state = TARGET_HALTED;
Expand Down Expand Up @@ -4104,35 +4104,35 @@ static int write_memory_bus_v1(struct target *target, target_addr_t address,

uint32_t sbvalue[4] = { 0 };
if (size > 12) {
sbvalue[3] = ((uint32_t) p[12]) |
(((uint32_t) p[13]) << 8) |
(((uint32_t) p[14]) << 16) |
(((uint32_t) p[15]) << 24);
sbvalue[3] = ((uint32_t)p[12]) |
(((uint32_t)p[13]) << 8) |
(((uint32_t)p[14]) << 16) |
(((uint32_t)p[15]) << 24);
riscv_batch_add_dmi_write(batch, DM_SBDATA3, sbvalue[3], false);
}

if (size > 8) {
sbvalue[2] = ((uint32_t) p[8]) |
(((uint32_t) p[9]) << 8) |
(((uint32_t) p[10]) << 16) |
(((uint32_t) p[11]) << 24);
sbvalue[2] = ((uint32_t)p[8]) |
(((uint32_t)p[9]) << 8) |
(((uint32_t)p[10]) << 16) |
(((uint32_t)p[11]) << 24);
riscv_batch_add_dmi_write(batch, DM_SBDATA2, sbvalue[2], false);
}
if (size > 4) {
sbvalue[1] = ((uint32_t) p[4]) |
(((uint32_t) p[5]) << 8) |
(((uint32_t) p[6]) << 16) |
(((uint32_t) p[7]) << 24);
sbvalue[1] = ((uint32_t)p[4]) |
(((uint32_t)p[5]) << 8) |
(((uint32_t)p[6]) << 16) |
(((uint32_t)p[7]) << 24);
riscv_batch_add_dmi_write(batch, DM_SBDATA1, sbvalue[1], false);
}

sbvalue[0] = p[0];
if (size > 2) {
sbvalue[0] |= ((uint32_t) p[2]) << 16;
sbvalue[0] |= ((uint32_t) p[3]) << 24;
sbvalue[0] |= ((uint32_t)p[2]) << 16;
sbvalue[0] |= ((uint32_t)p[3]) << 24;
}
if (size > 1)
sbvalue[0] |= ((uint32_t) p[1]) << 8;
sbvalue[0] |= ((uint32_t)p[1]) << 8;

riscv_batch_add_dmi_write(batch, DM_SBDATA0, sbvalue[0], false);

Expand Down Expand Up @@ -4595,7 +4595,7 @@ static int select_prepped_harts(struct target *target)
struct target *t = entry->target;
struct riscv_info *info = riscv_info(t);
riscv013_info_t *info_013 = get_info(t);
unsigned index = info_013->index;
unsigned int index = info_013->index;
LOG_DEBUG("index=%d, coreid=%d, prepped=%d", index, t->coreid, info->prepped);
if (info->prepped) {
info_013->selected = true;
Expand Down Expand Up @@ -4779,11 +4779,11 @@ static enum riscv_halt_reason riscv013_halt_reason(struct target *target)
}

LOG_ERROR("Unknown DCSR cause field: 0x%" PRIx64, get_field(dcsr, CSR_DCSR_CAUSE));
LOG_ERROR(" dcsr=0x%" PRIx32, (uint32_t) dcsr);
LOG_ERROR(" dcsr=0x%" PRIx32, (uint32_t)dcsr);
return RISCV_HALT_UNKNOWN;
}

int riscv013_write_debug_buffer(struct target *target, unsigned index, riscv_insn_t data)
static int riscv013_write_debug_buffer(struct target *target, unsigned int index, riscv_insn_t data)
{
dm013_info_t *dm = get_dm(target);
if (!dm)
Expand All @@ -4798,14 +4798,14 @@ int riscv013_write_debug_buffer(struct target *target, unsigned index, riscv_ins
return ERROR_OK;
}

riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned index)
static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned int index)
{
uint32_t value;
dmi_read(target, &value, DM_PROGBUF0 + index);
return value;
}

int riscv013_invalidate_cached_debug_buffer(struct target *target)
static int riscv013_invalidate_cached_debug_buffer(struct target *target)
{
dm013_info_t *dm = get_dm(target);
if (!dm) {
Expand All @@ -4819,7 +4819,7 @@ int riscv013_invalidate_cached_debug_buffer(struct target *target)
return ERROR_OK;
}

int riscv013_execute_debug_buffer(struct target *target)
static int riscv013_execute_debug_buffer(struct target *target)
{
uint32_t run_program = 0;
run_program = set_field(run_program, AC_ACCESS_REGISTER_AARSIZE, 2);
Expand All @@ -4830,31 +4830,31 @@ int riscv013_execute_debug_buffer(struct target *target)
return execute_abstract_command(target, run_program);
}

void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d)
static void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d)
{
RISCV013_INFO(info);
buf_set_u64((unsigned char *)buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_WRITE);
buf_set_u64((unsigned char *)buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, d);
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a);
}

void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a)
static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a)
{
RISCV013_INFO(info);
buf_set_u64((unsigned char *)buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_READ);
buf_set_u64((unsigned char *)buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0);
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a);
}

void riscv013_fill_dmi_nop_u64(struct target *target, char *buf)
static void riscv013_fill_dmi_nop_u64(struct target *target, char *buf)
{
RISCV013_INFO(info);
buf_set_u64((unsigned char *)buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_NOP);
buf_set_u64((unsigned char *)buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0);
buf_set_u64((unsigned char *)buf, DTM_DMI_ADDRESS_OFFSET, info->abits, 0);
}

int riscv013_dmi_write_u64_bits(struct target *target)
static int riscv013_dmi_write_u64_bits(struct target *target)
{
RISCV013_INFO(info);
return info->abits + DTM_DMI_DATA_LENGTH + DTM_DMI_OP_LENGTH;
Expand Down Expand Up @@ -4933,7 +4933,7 @@ static int riscv013_step_or_resume_current_hart(struct target *target,
return ERROR_FAIL;
}

void riscv013_clear_abstract_error(struct target *target)
static void riscv013_clear_abstract_error(struct target *target)
{
/* Wait for busy to go away. */
time_t start = time(NULL);
Expand Down
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