ca55: domd: u-boot: Backport additional patches for UFS

These patches are ported from following: https://github.com/xen-troops/meta-xt-prod-devel-rcar-gen4 commit: cb18b45e4d83e268e23f7de5a66d206bbf1b7b72 Signed-off-by: Yuya Hamamachi <[email protected]>
renesas-rcar · Apr 10, 2024 · dbf1a22 · dbf1a22
1 parent d2e0bae
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diff --git a/.../recipes-bsp/u-boot/files/0004-clk-renesas-Add-and-enable-CPG-reset-driver-for-Gen4.patch b/.../recipes-bsp/u-boot/files/0004-clk-renesas-Add-and-enable-CPG-reset-driver-for-Gen4.patch
@@ -0,0 +1,203 @@
+From c417e8a3a9d3199dff2a8167b92bee5ada0fdf18 Mon Sep 17 00:00:00 2001
+From: Leonid Komarianskyi <[email protected]>
+Date: Tue, 21 Nov 2023 14:10:19 +0200
+Subject: [PATCH 4/5] clk: renesas: Add and enable CPG reset driver for Gen4
+
+This is a ported and adopted version of reset CPG
+functionality for Gen4, based on U-Boot 2023 patch:
+https://github.com/u-boot/u-boot/commit/326e05c5e21752f23f1f6090d4c546867211b823
+
+Signed-off-by: Leonid Komarianskyi <[email protected]>
+---
+ arch/arm/mach-rmobile/Kconfig.64        |  3 +
+ drivers/clk/renesas/clk-rcar-gen4.c     | 96 ++++++++++++++++++++++++-
+ drivers/clk/renesas/r8a779f0-cpg-mssr.c | 13 ++--
+ drivers/clk/renesas/rcar-gen4-cpg.h     |  3 +-
+ 4 files changed, 103 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
+index 89a77c46db..dff45d6127 100644
+--- a/arch/arm/mach-rmobile/Kconfig.64
++++ b/arch/arm/mach-rmobile/Kconfig.64
+@@ -199,4 +199,7 @@ source "board/renesas/whitehawk/Kconfig"
+ config SYS_MALLOC_F_LEN
+ 	default 0x8000 if RCAR_GEN4
+
++config DM_RESET
++	default y if RCAR_GEN4
++
+ endif
+diff --git a/drivers/clk/renesas/clk-rcar-gen4.c b/drivers/clk/renesas/clk-rcar-gen4.c
+index 4969acc84c..a06f0c5131 100644
+--- a/drivers/clk/renesas/clk-rcar-gen4.c
++++ b/drivers/clk/renesas/clk-rcar-gen4.c
+@@ -10,11 +10,14 @@
+ #include <common.h>
+ #include <clk-uclass.h>
+ #include <dm.h>
++#include <dm/device-internal.h>
++#include <dm/lists.h>
+ #include <errno.h>
+ #include <log.h>
+ #include <wait_bit.h>
+ #include <asm/io.h>
+ #include <linux/bitops.h>
++#include <reset-uclass.h>
+
+ #include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+@@ -557,7 +560,7 @@ const struct clk_ops gen4_clk_ops = {
+ 	.of_xlate	= gen4_clk_of_xlate,
+ };
+
+-int gen4_clk_probe(struct udevice *dev)
++static int gen4_clk_probe(struct udevice *dev)
+ {
+ 	struct gen4_clk_priv *priv = dev_get_priv(dev);
+ 	struct cpg_mssr_info *info =
+@@ -618,9 +621,98 @@ int gen4_clk_probe(struct udevice *dev)
+ 	return 0;
+ }
+
+-int gen4_clk_remove(struct udevice *dev)
++static int gen4_clk_remove(struct udevice *dev)
+ {
+ 	struct gen4_clk_priv *priv = dev_get_priv(dev);
+
+ 	return renesas_clk_remove(priv->base, priv->info);
+ }
++
++U_BOOT_DRIVER(clk_gen4) = {
++	.name		= "clk_gen4",
++	.id		= UCLASS_CLK,
++	.priv_auto_alloc_size	= sizeof(struct gen4_clk_priv),
++	.ops		= &gen4_clk_ops,
++	.probe		= gen4_clk_probe,
++	.remove		= gen4_clk_remove,
++};
++
++static int gen4_reset_assert(struct reset_ctl *reset_ctl)
++{
++	struct udevice *cdev = (struct udevice *)dev_get_driver_data(reset_ctl->dev);
++	struct gen4_clk_priv *priv = dev_get_priv(cdev);
++	unsigned int packed_id = MOD_CLK_PACK(reset_ctl->id);
++	unsigned int reg = packed_id / 32;
++	unsigned int bit = packed_id % 32;
++	u32 bitmask = BIT(bit);
++
++	writel(bitmask, priv->base + priv->info->reset_regs[reg]);
++
++	return 0;
++}
++
++static int gen4_reset_deassert(struct reset_ctl *reset_ctl)
++{
++	struct udevice *cdev = (struct udevice *)dev_get_driver_data(reset_ctl->dev);
++	struct gen4_clk_priv *priv = dev_get_priv(cdev);
++	unsigned int packed_id = MOD_CLK_PACK(reset_ctl->id);
++	unsigned int reg = packed_id / 32;
++	unsigned int bit = packed_id % 32;
++	u32 bitmask = BIT(bit);
++
++	writel(bitmask, priv->base + priv->info->reset_clear_regs[reg]);
++
++	return 0;
++}
++
++static int rcar_gen4_reset_request(struct reset_ctl *reset_ctl)
++{
++        return 0;
++}
++
++static int rcar_gen4_reset_free(struct reset_ctl *reset_ctl)
++{
++        return 0;
++}
++
++static const struct reset_ops rst_gen4_ops = {
++	.request = rcar_gen4_reset_request,
++        .rfree = rcar_gen4_reset_free,
++	.rst_assert = gen4_reset_assert,
++	.rst_deassert = gen4_reset_deassert,
++};
++
++U_BOOT_DRIVER(rst_gen4) = {
++	.name = "rst_gen4",
++	.id = UCLASS_RESET,
++	.ops = &rst_gen4_ops,
++};
++
++int gen4_cpg_bind(struct udevice *parent)
++{
++	struct cpg_mssr_info *info =
++		(struct cpg_mssr_info *)dev_get_driver_data(parent);
++	struct udevice *cdev, *rdev;
++	struct driver *drv;
++	int ret;
++
++	drv = lists_driver_lookup_name("clk_gen4");
++	if (!drv)
++		return -ENOENT;
++
++	ret = device_bind_with_driver_data(parent, drv, "clk_gen4", (ulong)info,
++					   dev_ofnode(parent), &cdev);
++	if (ret)
++		return ret;
++
++	drv = lists_driver_lookup_name("rst_gen4");
++	if (!drv)
++		return -ENOENT;
++
++	ret = device_bind_with_driver_data(parent, drv, "rst_gen4", (ulong)cdev,
++					   dev_ofnode(parent), &rdev);
++	if (ret)
++		device_unbind(cdev);
++
++	return 0;
++}
+diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+index d4a178fb20..17819890da 100644
+--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
++++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+@@ -252,7 +252,7 @@ static const struct cpg_mssr_info r8a779f0_cpg_mssr_info = {
+ 	.reg_layout		= CLK_REG_LAYOUT_RCAR_S4,
+ };
+
+-static const struct udevice_id r8a779f0_clk_ids[] = {
++static const struct udevice_id r8a779f0_cpg_ids[] = {
+ 	{
+ 		.compatible	= "renesas,r8a779f0-cpg-mssr",
+ 		.data		= (ulong)&r8a779f0_cpg_mssr_info
+@@ -261,11 +261,8 @@ static const struct udevice_id r8a779f0_clk_ids[] = {
+ };
+
+ U_BOOT_DRIVER(clk_r8a779f0) = {
+-	.name		= "clk_r8a779f0",
+-	.id		= UCLASS_CLK,
+-	.of_match	= r8a779f0_clk_ids,
+-	.priv_auto_alloc_size = sizeof(struct gen4_clk_priv),
+-	.ops		= &gen4_clk_ops,
+-	.probe		= gen4_clk_probe,
+-	.remove		= gen4_clk_remove,
++	.name		= "cpg_r8a779f0",
++	.id		= UCLASS_NOP,
++	.of_match	= r8a779f0_cpg_ids,
++	.bind		= gen4_cpg_bind,
+ };
+diff --git a/drivers/clk/renesas/rcar-gen4-cpg.h b/drivers/clk/renesas/rcar-gen4-cpg.h
+index 80227ffdb6..547978a2a8 100644
+--- a/drivers/clk/renesas/rcar-gen4-cpg.h
++++ b/drivers/clk/renesas/rcar-gen4-cpg.h
+@@ -91,8 +91,7 @@ struct gen4_clk_priv {
+ 	const struct rcar_gen4_cpg_pll_config *cpg_pll_config;
+ };
+
+-int gen4_clk_probe(struct udevice *dev);
+-int gen4_clk_remove(struct udevice *dev);
++int gen4_cpg_bind(struct udevice *parent);
+
+ extern const struct clk_ops gen4_clk_ops;
+
+-- 
+2.25.1
+
diff --git a/...r-whitebox/meta-domd/recipes-bsp/u-boot/files/0005-ufs-reset-UFS-controller-on-init.patch b/...r-whitebox/meta-domd/recipes-bsp/u-boot/files/0005-ufs-reset-UFS-controller-on-init.patch
@@ -0,0 +1,64 @@
+From 81317be638e7095531a1d9894b61b10f83c01382 Mon Sep 17 00:00:00 2001
+From: Leonid Komarianskyi <[email protected]>
+Date: Tue, 7 Nov 2023 15:34:40 +0200
+Subject: [PATCH 5/5] ufs: reset UFS controller on init
+
+UFS controller should be explicitly reset on init because it can
+be in an improper state (e.g. if UFS was used before in IPL U-boot).
+Without such reset, on Spider rev 1.1 and 1.2, device present bit is
+not set in UFS status register which makes UFS inoperable.
+
+Signed-off-by: Leonid Komarianskyi <[email protected]>
+Reviewed-by: Dmytro Firsov <[email protected]>
+---
+ drivers/ufs/renesas-ufs.c | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/drivers/ufs/renesas-ufs.c b/drivers/ufs/renesas-ufs.c
+index bf46dfabd3..f2b099411b 100644
+--- a/drivers/ufs/renesas-ufs.c
++++ b/drivers/ufs/renesas-ufs.c
+@@ -13,6 +13,7 @@
+ #include <linux/delay.h>
+ #include <linux/iopoll.h>
+ #include <ufs.h>
++#include <reset.h>
+
+ #include "ufs.h"
+
+@@ -312,6 +313,7 @@ static int rcar_ufs_init(struct ufs_hba *hba)
+ {
+ 	int ret;
+ 	struct clk clk;
++	struct reset_ctl reset_ctl;
+ 	const struct ufs_renesas_init_param *p;
+
+ 	ret = clk_get_by_index(hba->dev, 0, &clk);
+@@ -326,6 +328,24 @@ static int rcar_ufs_init(struct ufs_hba *hba)
+ 		return ret;
+ 	}
+
++	ret = reset_get_by_index(hba->dev, 0, &reset_ctl);
++	if (ret) {
++		dev_err(hba->dev, "failed to get UFS reset signal\n");
++		return ret;
++	}
++
++	ret = reset_assert(&reset_ctl);
++	if (ret) {
++		dev_err(hba->dev, "failed to assert UFS reset signal\n");
++		return ret;
++	}
++
++	ret = reset_deassert(&reset_ctl);
++	if (ret) {
++		dev_err(hba->dev, "failed to deassert UFS reset signal\n");
++		return ret;
++	}
++
+ 	for (p = ufs_param; p < ufs_param + ARRAY_SIZE(ufs_param); p++)
+ 		ufs_renesas_reg_control(hba, p);
+
+-- 
+2.25.1
+
diff --git a/application_cpu/meta-rcar-whitebox/meta-domd/recipes-bsp/u-boot/u-boot_%.bbappend b/application_cpu/meta-rcar-whitebox/meta-domd/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -16,6 +16,8 @@ SRC_URI_append = " \
     file://0005-config-s4sk-Add-config-for-ufs.patch \
     file://0006-arm-dts-r8a779f0-s4sk-Add-Renesas-UFS-HCD-support.patch \
     file://0007-configs-s4sk-Add-missing-config-from-spider.patch \
+    file://0004-clk-renesas-Add-and-enable-CPG-reset-driver-for-Gen4.patch \
+    file://0005-ufs-reset-UFS-controller-on-init.patch \
 "
 
 # Backport from upstream