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Merge pull request #7 from rdobson/cpuinfo
Add support for parsing cpuinfo
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"""Module for parsing the output of /proc/cpuinfo""" | ||
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from hwinfo.util import CommandParser | ||
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REGEX_TEMPLATE = r'%s([\ \t])+\:\ (?P<%s>.*)' | ||
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class CPUInfoParser(CommandParser): | ||
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ITEM_SEPERATOR = "\n\n" | ||
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ITEM_REGEXS = [ | ||
REGEX_TEMPLATE % ('processor', 'processor'), | ||
REGEX_TEMPLATE % ('vendor_id', 'vendor_id'), | ||
REGEX_TEMPLATE % (r'cpu\ family', 'cpu_family'), | ||
REGEX_TEMPLATE % ('model', 'model'), | ||
REGEX_TEMPLATE % (r'model\ name', 'model_name'), | ||
REGEX_TEMPLATE % ('stepping', 'stepping'), | ||
REGEX_TEMPLATE % ('microcode', 'microcode'), | ||
REGEX_TEMPLATE % (r'cpu\ MHz', 'cpu_mhz'), | ||
REGEX_TEMPLATE % (r'cache\ size', 'cache_size'), | ||
REGEX_TEMPLATE % (r'fpu', 'fpu'), | ||
REGEX_TEMPLATE % (r'fpu_exception', 'fpu_exception'), | ||
REGEX_TEMPLATE % (r'cpuid\ level', 'cpuid_level'), | ||
REGEX_TEMPLATE % (r'wp', 'wp'), | ||
REGEX_TEMPLATE % (r'flags', 'flags'), | ||
REGEX_TEMPLATE % (r'bogomips', 'bogomips'), | ||
REGEX_TEMPLATE % (r'clflush\ size', 'clflush_size'), | ||
REGEX_TEMPLATE % (r'cache_alignment', 'cache_alignment'), | ||
REGEX_TEMPLATE % (r'address\ sizes', 'address_sizes'), | ||
REGEX_TEMPLATE % (r'power\ management', 'power_management'), | ||
] |
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processor : 0 | ||
vendor_id : GenuineIntel | ||
cpu family : 6 | ||
model : 30 | ||
model name : Intel(R) Xeon(R) CPU X3430 @ 2.40GHz | ||
stepping : 5 | ||
microcode : 0x3 | ||
cpu MHz : 2394.052 | ||
cache size : 8192 KB | ||
fpu : yes | ||
fpu_exception : yes | ||
cpuid level : 11 | ||
wp : yes | ||
flags : fpu de tsc msr pae mce cx8 apic sep mca cmov pat clflush acpi mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl nonstop_tsc pni monitor vmx est ssse3 cx16 sse4_1 sse4_2 popcnt hypervisor lahf_lm dtherm tpr_shadow vnmi flexpriority ept vpid | ||
bogomips : 4788.10 | ||
clflush size : 64 | ||
cache_alignment : 64 | ||
address sizes : 36 bits physical, 48 bits virtual | ||
power management: | ||
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processor : 1 | ||
vendor_id : GenuineIntel | ||
cpu family : 6 | ||
model : 30 | ||
model name : Intel(R) Xeon(R) CPU X3430 @ 2.40GHz | ||
stepping : 5 | ||
microcode : 0x3 | ||
cpu MHz : 2394.052 | ||
cache size : 8192 KB | ||
fpu : yes | ||
fpu_exception : yes | ||
cpuid level : 11 | ||
wp : yes | ||
flags : fpu de tsc msr pae mce cx8 apic sep mca cmov pat clflush acpi mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl nonstop_tsc pni monitor vmx est ssse3 cx16 sse4_1 sse4_2 popcnt hypervisor lahf_lm dtherm tpr_shadow vnmi flexpriority ept vpid | ||
bogomips : 4788.10 | ||
clflush size : 64 | ||
cache_alignment : 64 | ||
address sizes : 36 bits physical, 48 bits virtual | ||
power management: | ||
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processor : 2 | ||
vendor_id : GenuineIntel | ||
cpu family : 6 | ||
model : 30 | ||
model name : Intel(R) Xeon(R) CPU X3430 @ 2.40GHz | ||
stepping : 5 | ||
microcode : 0x3 | ||
cpu MHz : 2394.052 | ||
cache size : 8192 KB | ||
fpu : yes | ||
fpu_exception : yes | ||
cpuid level : 11 | ||
wp : yes | ||
flags : fpu de tsc msr pae mce cx8 apic sep mca cmov pat clflush acpi mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl nonstop_tsc pni monitor vmx est ssse3 cx16 sse4_1 sse4_2 popcnt hypervisor lahf_lm dtherm tpr_shadow vnmi flexpriority ept vpid | ||
bogomips : 4788.10 | ||
clflush size : 64 | ||
cache_alignment : 64 | ||
address sizes : 36 bits physical, 48 bits virtual | ||
power management: | ||
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processor : 3 | ||
vendor_id : GenuineIntel | ||
cpu family : 6 | ||
model : 30 | ||
model name : Intel(R) Xeon(R) CPU X3430 @ 2.40GHz | ||
stepping : 5 | ||
microcode : 0x3 | ||
cpu MHz : 2394.052 | ||
cache size : 8192 KB | ||
fpu : yes | ||
fpu_exception : yes | ||
cpuid level : 11 | ||
wp : yes | ||
flags : fpu de tsc msr pae mce cx8 apic sep mca cmov pat clflush acpi mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl nonstop_tsc pni monitor vmx est ssse3 cx16 sse4_1 sse4_2 popcnt hypervisor lahf_lm dtherm tpr_shadow vnmi flexpriority ept vpid | ||
bogomips : 4788.10 | ||
clflush size : 64 | ||
cache_alignment : 64 | ||
address sizes : 36 bits physical, 48 bits virtual | ||
power management: | ||
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"""Module for unittesting dmidecode methods""" | ||
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import unittest | ||
from hwinfo.host.cpuinfo import CPUInfoParser | ||
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DATA_DIR = 'hwinfo/host/tests/data' | ||
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class CPUInfoParserTests(unittest.TestCase): | ||
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DATA = """ | ||
processor : 0 | ||
vendor_id : GenuineIntel | ||
cpu family : 6 | ||
model : 30 | ||
model name : Intel(R) Xeon(R) CPU X3430 @ 2.40GHz | ||
stepping : 5 | ||
microcode : 0x3 | ||
cpu MHz : 2394.052 | ||
cache size : 8192 KB | ||
fpu : yes | ||
fpu_exception : yes | ||
cpuid level : 11 | ||
wp : yes | ||
flags : fpu de tsc msr pae mce cx8 apic sep mca cmov pat clflush acpi mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl nonstop_tsc pni monitor vmx est ssse3 cx16 sse4_1 sse4_2 popcnt hypervisor lahf_lm dtherm tpr_shadow vnmi flexpriority ept vpid | ||
bogomips : 4788.10 | ||
clflush size : 64 | ||
cache_alignment : 64 | ||
address sizes : 36 bits physical, 48 bits virtual | ||
power management: | ||
""" | ||
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DATA_REC = { | ||
'processor': '0', | ||
'vendor_id': 'GenuineIntel', | ||
'cpu_family': '6', | ||
'model': '30', | ||
'model_name': 'Intel(R) Xeon(R) CPU X3430 @ 2.40GHz', | ||
'stepping': '5', | ||
'microcode': '0x3', | ||
'cpu_mhz': '2394.052', | ||
'cache_size': '8192 KB', | ||
'fpu': 'yes', | ||
'fpu_exception': 'yes', | ||
'cpuid_level': '11', | ||
'wp': 'yes', | ||
'flags': 'fpu de tsc msr pae mce cx8 apic sep mca cmov pat clflush acpi mmx fxsr sse sse2 ss ht syscall nx lm constant_tsc rep_good nopl nonstop_tsc pni monitor vmx est ssse3 cx16 sse4_1 sse4_2 popcnt hypervisor lahf_lm dtherm tpr_shadow vnmi flexpriority ept vpid', | ||
'bogomips': '4788.10', | ||
'clflush_size': '64', | ||
'cache_alignment': '64', | ||
'address_sizes': '36 bits physical, 48 bits virtual', | ||
'power_management': '', | ||
} | ||
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def setUp(self): | ||
self.parser = CPUInfoParser(self.DATA.strip()) | ||
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def _assert_equal(self, key): | ||
rec = self.parser.parse_items()[0] | ||
return self.assertEqual(rec[key], self.DATA_REC[key]) | ||
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def test_cpuinfo_processor(self): | ||
return self._assert_equal('processor') | ||
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def test_vendor_id(self): | ||
return self._assert_equal('vendor_id') | ||
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def test_cpu_family(self): | ||
return self._assert_equal('cpu_family') | ||
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def test_model(self): | ||
return self._assert_equal('model') | ||
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def test_model_name(self): | ||
return self._assert_equal('model_name') | ||
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def test_stepping(self): | ||
return self._assert_equal('stepping') | ||
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def test_microcode(self): | ||
return self._assert_equal('microcode') | ||
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def test_cpu_mhz(self): | ||
return self._assert_equal('cpu_mhz') | ||
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def test_cache_size(self): | ||
return self._assert_equal('cache_size') | ||
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def test_fpu(self): | ||
return self._assert_equal('fpu') | ||
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def test_fpu_exception(self): | ||
return self._assert_equal('fpu_exception') | ||
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def test_cpuid_level(self): | ||
return self._assert_equal('cpuid_level') | ||
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def test_wp(self): | ||
return self._assert_equal('wp') | ||
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def test_flags(self): | ||
return self._assert_equal('flags') | ||
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def test_bogomips(self): | ||
return self._assert_equal('bogomips') | ||
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def test_clflush_size(self): | ||
return self._assert_equal('clflush_size') | ||
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def test_cache_alignment(self): | ||
return self._assert_equal('cache_alignment') | ||
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def test_address_sizes(self): | ||
return self._assert_equal('address_sizes') | ||
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class CPUInfoMultipleParseTest(unittest.TestCase): | ||
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DATA_FILE = "%s/cpuinfo" % DATA_DIR | ||
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def setUp(self): | ||
fh = open(self.DATA_FILE) | ||
data = fh.read() | ||
fh.close() | ||
self.parser = CPUInfoParser(data) | ||
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def test_number_of_processors(self): | ||
recs = self.parser.parse_items() | ||
self.assertEqual(len(recs), 4) |
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