Skip to content
ci

ci #2006

Sign in to view logs

ci

ci #2006

Triggered via schedule November 3, 2024 02:35
@SamuelRiedelSamuelRiedel
⁠ 7c4b38e
main
Status Success
Total duration 5m 42s
Artifacts –

ci.yml

on: schedule
tc-gcc
24s
tc-gcc
riscv-isa-sim
7s
riscv-isa-sim
tc-llvm
51s
tc-llvm
verilator
5s
verilator
check-control-registers
22s
check-control-registers
check-opcodes
3s
check-opcodes
Matrix: build-apps-gcc
check-bootrom
22s
check-bootrom
Matrix: build-apps-llvm
tc-halide
13s
tc-halide
Matrix: verilator-model
Matrix: build-apps-halide
Matrix: run-apps-gcc
Matrix: run-apps-llvm
unit-test
2m 2s
unit-test
Matrix: run-apps-halide
clean-up
4s
clean-up
Matrix: clean-up-compile-runs
Fit to window
Zoom out
Zoom in