Update cluster_clock_gating to tech cell tc_clk_gating

pulp-platform · Jan 22, 2021 · fe0eccf · fe0eccf
1 parent e710319
commit fe0eccf
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Showing 5 changed files with 6 additions and 6 deletions.
diff --git a/rtl/basic/hwpe_stream_buffer.sv b/rtl/basic/hwpe_stream_buffer.sv
@@ -37,7 +37,7 @@ module hwpe_stream_buffer #(
 
   logic clk_gated;
 
-  cluster_clock_gating i_cg (
+  tc_clk_gating i_cg (
     .clk_o     ( clk_gated             ),
     .en_i      ( pop_o.ready | clear_i ),
     .test_en_i ( test_mode_i           ),

diff --git a/rtl/basic/hwpe_stream_deserialize.sv b/rtl/basic/hwpe_stream_deserialize.sv
@@ -63,7 +63,7 @@ module hwpe_stream_deserialize #(
 
   logic [$clog2(NB_OUT_STREAMS)-1:0] stream_cnt_d, stream_cnt_q;
   logic [$clog2(CONTIG_LIMIT)-1:0]   contig_cnt_d, contig_cnt_q;
-logic stream_cnt_en;
+  logic stream_cnt_en;
   logic [NB_OUT_STREAMS-1:0]         pop_ready;
 
   // stream serialization

diff --git a/rtl/fifo/hwpe_stream_fifo_scm.sv b/rtl/fifo/hwpe_stream_fifo_scm.sv
@@ -61,7 +61,7 @@ module hwpe_stream_fifo_scm
     genvar x;
     genvar y;
 
-    cluster_clock_gating CG_WE_GLOBAL
+    tc_clk_gating CG_WE_GLOBAL
     (
         .clk_o(clk_int),
         .en_i(WriteEnable),
@@ -110,7 +110,7 @@ module hwpe_stream_fifo_scm
     generate
     for(x=0; x<NUM_WORDS; x++)
     begin : CG_CELL_WORD_ITER
-        cluster_clock_gating CG_Inst
+        tc_clk_gating CG_Inst
         (
             .clk_o(ClocksxC[x]),
             .en_i(WAddrOneHotxD[x]),

diff --git a/rtl/streamer/hwpe_stream_sink.sv b/rtl/streamer/hwpe_stream_sink.sv
@@ -169,7 +169,7 @@ module hwpe_stream_sink
 
   /* clock gating */
   assign clk_realign_en = flags_o.addressgen_flags.realign_flags.enable;
-  cluster_clock_gating i_realign_gating (
+  tc_clk_gating i_realign_gating (
     .clk_i     ( clk_i             ),
     .test_en_i ( test_mode_i       ),
     .en_i      ( clk_realign_en    ),

diff --git a/rtl/streamer/hwpe_stream_source_realign.sv b/rtl/streamer/hwpe_stream_source_realign.sv
@@ -112,7 +112,7 @@ module hwpe_stream_source_realign #(
   logic int_last_packet;
 
   /* clock gating */
-  cluster_clock_gating i_realign_gating (
+  tc_clk_gating i_realign_gating (
     .clk_i     ( clk_i         ),
     .test_en_i ( test_mode_i   ),
     .en_i      ( ctrl_i.enable ),