chore: Rename imm functions to lower case

src/cpu.rs

@@ -114,20 +114,20 @@ impl CPU {
 // RV32I
 // see page 64 at https://riscv.org/wp-content/uploads/2016/06/riscv-spec-v2.1.pdf
 pub fn exec_lui(cpu: &mut CPU, instr: u32) {
-    let imm = (imm_U(instr) as i32) as u32;
+    let imm = (imm_u(instr) as i32) as u32;
     cpu.xregs.regs[rd(instr) as usize] = imm;
 }
 pub fn exec_auipc(cpu: &mut CPU, instr: u32) {
-    let imm = imm_U(instr) as i32;
+    let imm = imm_u(instr) as i32;
     cpu.xregs.regs[rd(instr) as usize] = (cpu.pc as i32 + imm) as u32;
 }
 pub fn exec_jal(cpu: &mut CPU, instr: u32) {
-    let imm = imm_J(instr) as i32;
+    let imm = imm_j(instr) as i32;
     cpu.xregs.regs[rd(instr) as usize] = cpu.pc + 4;
     cpu.pc = (cpu.pc as i32 + imm) as u32;
 }
 pub fn exec_jalr(cpu: &mut CPU, instr: u32) {
-    let imm = imm_J(instr) as i32;
+    let imm = imm_j(instr) as i32;
     cpu.xregs.regs[rd(instr) as usize] = cpu.pc + 4;
     cpu.pc = (cpu.pc as i32 + imm) as u32;
 }
@@ -149,40 +149,40 @@ pub fn exec_sh(cpu: &mut CPU, instr: u32) {}
 pub fn exec_sw(cpu: &mut CPU, instr: u32) {}
 pub fn exec_sd(cpu: &mut CPU, instr: u32) {}
 pub fn exec_addi(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = cpu.xregs.regs[rs1(instr) as usize] + imm as u32;
 }
 pub fn exec_slti(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] =
         ((cpu.xregs.regs[rs1(instr) as usize] as i32) < (imm as i32)) as u32;
 }
 pub fn exec_sltiu(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = (cpu.xregs.regs[rs1(instr) as usize] < imm as u32) as u32;
 }
 pub fn exec_xori(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = cpu.xregs.regs[rs1(instr) as usize] ^ imm as u32;
 }
 pub fn exec_ori(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = cpu.xregs.regs[rs1(instr) as usize] | imm as u32;
 }
 pub fn exec_andi(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = cpu.xregs.regs[rs1(instr) as usize] & imm as u32;
 }
 pub fn exec_slli(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = cpu.xregs.regs[rs1(instr) as usize] << imm as u32;
 }
 pub fn exec_srli(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = cpu.xregs.regs[rs1(instr) as usize] >> imm as u32;
 }
 pub fn exec_srai(cpu: &mut CPU, instr: u32) {
-    let imm = imm_I(instr);
+    let imm = imm_i(instr);
     cpu.xregs.regs[rd(instr) as usize] = (cpu.xregs.regs[rs1(instr) as usize] as i32 >> imm) as u32;
 }
 pub fn exec_add(cpu: &mut CPU, instr: u32) {

src/opcode.rs

@@ -108,30 +108,30 @@ pub fn csr(instr: u32) -> u32 {
     return ((instr & 0xfff00000) >> 20) as u32;
 }
 
-pub fn imm_B(instr: u32) -> u32 {
+pub fn imm_b(instr: u32) -> u32 {
     // imm[12|10:5|4:1|11] = inst[31|30:25|11:8|7]
     return ((instr & 0x80000000) >> 19) as u32
         | ((instr & 0x80) << 4) as u32 // imm[11]
         | ((instr >> 20) & 0x7e0) as u32 // imm[10:5]
         | ((instr >> 7) & 0x1e) as u32; // imm[4:1]
 }
 
-pub fn imm_S(instr: u32) -> u32 {
+pub fn imm_s(instr: u32) -> u32 {
     // imm[11:5] = inst[31:25], imm[4:0] = inst[11:7]
     return ((instr & 0xfe000000) >> 20) as u32 | ((instr >> 7) & 0x1f) as u32;
 }
 
-pub fn imm_I(instr: u32) -> i32 {
+pub fn imm_i(instr: u32) -> i32 {
     // imm[11:0] = inst[31:20]
     return (instr & 0xfff00000) as i32 >> 20;
 }
 
-pub fn imm_U(instr: u32) -> u32 {
+pub fn imm_u(instr: u32) -> u32 {
     // imm[31:12] = inst[31:12]
     return (instr & 0xfffff000) as u32;
 }
 
-pub fn imm_J(instr: u32) -> u32 {
+pub fn imm_j(instr: u32) -> u32 {
     // imm[20|10:1|11|19:12] = inst[31|30:21|20|19:12]
     return (((instr & 0x80000000) as i32 >> 11) as u32)// imm[20]
     | ((instr & 0x3ff00000) >> 20) as u32 // imm[10:1]