Merge pull request #44 from qiyongshuang/main

V1.9
openwch · Jun 28, 2024 · 9d875e9 · 9d875e9
2 parents 72663cd + cfaa414
commit 9d875e9
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Showing 18 changed files with 71 additions and 48 deletions.
diff --git a/EVT/CH32V00x_List.txt b/EVT/CH32V00x_List.txt
@@ -1,5 +1,5 @@
 
-�Ͼ��ߺ�΢���ӹɷ����޹�˾ 2024.02
+�Ͼ��ߺ�΢���ӹɷ����޹�˾ 2024.06
 ���������뵽���ǵ���վ�ϲ�ѯ
 https://wch.cn
 

diff --git a/EVT/CH32V00x_List_EN.txt b/EVT/CH32V00x_List_EN.txt
@@ -1,5 +1,5 @@
 
-Nanjing Qinheng Microelectronics Co., Ltd. 2024.02
+Nanjing Qinheng Microelectronics Co., Ltd. 2024.06
 
 https://wch-ic.com
 

diff --git a/EVT/EXAM/FLASH/BootAsUser/BOOT区域作为用户区使用说明.pdf b/EVT/EXAM/FLASH/BootAsUser/BOOT区域作为用户区使用说明.pdf
diff --git a/EVT/EXAM/PWR/PVD_VoltageJudger/User/main.c b/EVT/EXAM/PWR/PVD_VoltageJudger/User/main.c
@@ -60,7 +60,7 @@ void PVD_Init(void)
     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
     NVIC_Init(&NVIC_InitStructure);
 
-    PWR_PVDLevelConfig(PWR_PVDLevel_4V4);
+    PWR_PVDLevelConfig(PWR_PVDLevel_MODE7);
 
     PWR_PVDCmd(ENABLE);
 }

diff --git a/EVT/EXAM/PWR/PVD_Wakeup/User/main.c b/EVT/EXAM/PWR/PVD_Wakeup/User/main.c
@@ -61,7 +61,7 @@ void PVD_Init(void)
     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
     NVIC_Init(&NVIC_InitStructure);
 
-    PWR_PVDLevelConfig(PWR_PVDLevel_2V9);
+    PWR_PVDLevelConfig(PWR_PVDLevel_MODE0);
 
     PWR_PVDCmd(ENABLE);
 }

diff --git a/EVT/EXAM/SPI/1Lines_half-duplex/User/main.c b/EVT/EXAM/SPI/1Lines_half-duplex/User/main.c
@@ -2,7 +2,7 @@
  * File Name          : main.c
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2023/12/25
+ * Date               : 2024/06/01
  * Description        : Main program body.
  *********************************************************************************
  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -20,8 +20,11 @@
  *Note: The two boards download the Master and Slave programs respectively,
  *and power on at the same time.
  *     Hardware connection:PC5 -- PC5
- *           PC7-- PC6
- *
+ *                         PC7-- PC6
+ *When using SPI slave mode to send data:
+ *  -the CPOL bit should be set to 1
+ *  -the data should be sent using spi mode 2 or spi mode 3.
+ * 
  */
 
 #include "debug.h"
@@ -95,7 +98,7 @@ void SPI_1Lines_HalfDuplex_Init(void)
 
     SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
     SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
-    SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+    SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
     SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
     SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
     SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

diff --git a/EVT/EXAM/SPI/2Lines_FullDuplex/User/main.c b/EVT/EXAM/SPI/2Lines_FullDuplex/User/main.c
@@ -2,7 +2,7 @@
  * File Name          : main.c
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2022/08/08
+ * Date               : 2024/06/01
  * Description        : Main program body.
  *********************************************************************************
  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -23,6 +23,10 @@
  *Hardware connection:PC5 -- PC5
  *                      PC6 -- PC6
  *                      PC7 -- PC7
+ *When using SPI slave mode to send data:
+ *  -the CPOL bit should be set to 1
+ *  -the data should be sent using spi mode 2 or spi mode 3. 
+ * 
  */
 
 
@@ -103,8 +107,8 @@ void SPI_FullDuplex_Init(void)
 #endif
 
     SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
-    SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
-    SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+    SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
+    SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
     SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
     SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
     SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

diff --git a/EVT/EXAM/SPI/FullDuplex_HardNSS/User/main.c b/EVT/EXAM/SPI/FullDuplex_HardNSS/User/main.c
@@ -2,7 +2,7 @@
  * File Name          : main.c
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2022/08/08
+ * Date               : 2024/06/01
  * Description        : Main program body.
  *********************************************************************************
  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -25,7 +25,9 @@
  *                         PC5 -- PC5
  *                         PC6 -- PC6
  *                         PC7 -- PC7
- *
+ *When using SPI slave mode to send data:
+ *  -the CPOL bit should be set to 1
+ *  -the data should be sent using spi mode 2 or spi mode 3.
  *
  */
 
@@ -121,8 +123,8 @@ void SPI_FullDuplex_Init(void)
 #endif
 
     SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
-    SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
-    SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+    SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
+    SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
     SPI_InitStructure.SPI_NSS = SPI_NSS_Hard;
     SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
     SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

diff --git a/EVT/EXAM/SPI/SPI_CRC/User/main.c b/EVT/EXAM/SPI/SPI_CRC/User/main.c
@@ -2,7 +2,7 @@
  * File Name          : main.c
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2023/12/25
+ * Date               : 2024/06/01
  * Description        : Main program body.
  *********************************************************************************
  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -22,6 +22,9 @@
  *    Hardware connection:
  *                 PC5 -- PC5
  *                 PC7 -- PC6
+ *When using SPI slave mode to send data:
+ *  -the CPOL bit should be set to 1
+ *  -the data should be sent using spi mode 2 or spi mode 3.
  *
  */
 
@@ -89,7 +92,7 @@ void SPI_1Lines_HalfDuplex_Init(void)
 
     SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
     SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
-    SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+    SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
     SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
     SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
     SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

diff --git a/EVT/EXAM/SPI/SPI_DMA/User/main.c b/EVT/EXAM/SPI/SPI_DMA/User/main.c
@@ -2,7 +2,7 @@
  * File Name          : main.c
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2022/08/08
+ * Date               : 2024/06/01
  * Description        : Main program body.
  *********************************************************************************
  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -24,7 +24,9 @@
  *           PC5  -- PC5
  *           PC6 -- PC6
  *           PC7 -- PC7
- *
+ *When using SPI slave mode to send data:
+ *  -the CPOL bit should be set to 1
+ *  -the data should be sent using spi mode 2 or spi mode 3.
  */
 
 
@@ -104,8 +106,8 @@ void SPI_FullDuplex_Init(void)
 #endif
 
     SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;
-    SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
-    SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
+    SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
+    SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
     SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
     SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;
     SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

diff --git a/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h b/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h
@@ -2,7 +2,7 @@
  * File Name          : ch32v00x.h
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2023/12/28
+ * Date               : 2024/05/28
  * Description        : CH32V00x Device Peripheral Access Layer Header File.
  *********************************************************************************
  * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
@@ -25,7 +25,7 @@ extern "C" {
 
 /* CH32V00x Standard Peripheral Library version number */
 #define __CH32V00x_STDPERIPH_VERSION_MAIN   (0x01) /* [15:8] main version */
-#define __CH32V00x_STDPERIPH_VERSION_SUB    (0x08) /* [7:0] sub version */
+#define __CH32V00x_STDPERIPH_VERSION_SUB    (0x09) /* [7:0] sub version */
 #define __CH32V00x_STDPERIPH_VERSION        ( (__CH32V00x_STDPERIPH_VERSION_MAIN << 8)\
                                              |(__CH32V00x_STDPERIPH_VERSION_SUB << 0))
 

diff --git a/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h b/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h
@@ -2,7 +2,7 @@
  * File Name          : ch32v00x_adc.h
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2022/08/08
+ * Date               : 2024/05/20
  * Description        : This file contains all the functions prototypes for the
  *                      ADC firmware library.
  *********************************************************************************
@@ -129,8 +129,7 @@ typedef struct
 
 /* ADC_external_trigger_sources_delay_channels_definition */
 #define ADC_ExternalTrigRegul_DLY                      ((uint32_t)0x00000000)
-#define ADC_ExternalTrigInjec_DLY                      ((uint32_t)0x00020000)
-
+#define ADC_ExternalTrigInjec_DLY                      ((uint32_t)0x00000200)
 
 void       ADC_DeInit(ADC_TypeDef *ADCx);
 void       ADC_Init(ADC_TypeDef *ADCx, ADC_InitTypeDef *ADC_InitStruct);

diff --git a/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h b/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h
@@ -20,14 +20,23 @@ extern "C" {
 #include <ch32v00x.h>
 
 /* PVD_detection_level  */
-#define PWR_PVDLevel_2V9          ((uint32_t)0x00000000)
-#define PWR_PVDLevel_3V1          ((uint32_t)0x00000020)
-#define PWR_PVDLevel_3V3          ((uint32_t)0x00000040)
-#define PWR_PVDLevel_3V5          ((uint32_t)0x00000060)
-#define PWR_PVDLevel_3V7          ((uint32_t)0x00000080)
-#define PWR_PVDLevel_3V9          ((uint32_t)0x000000A0)
-#define PWR_PVDLevel_4V1          ((uint32_t)0x000000C0)
-#define PWR_PVDLevel_4V4          ((uint32_t)0x000000E0)
+#define PWR_PVDLevel_MODE0          ((uint32_t)0x00000000)
+#define PWR_PVDLevel_MODE1          ((uint32_t)0x00000020)
+#define PWR_PVDLevel_MODE2          ((uint32_t)0x00000040)
+#define PWR_PVDLevel_MODE3          ((uint32_t)0x00000060)
+#define PWR_PVDLevel_MODE4          ((uint32_t)0x00000080)
+#define PWR_PVDLevel_MODE5          ((uint32_t)0x000000A0)
+#define PWR_PVDLevel_MODE6          ((uint32_t)0x000000C0)
+#define PWR_PVDLevel_MODE7          ((uint32_t)0x000000E0)
+
+#define PWR_PVDLevel_2V9            PWR_PVDLevel_MODE0
+#define PWR_PVDLevel_3V1            PWR_PVDLevel_MODE1
+#define PWR_PVDLevel_3V3            PWR_PVDLevel_MODE2
+#define PWR_PVDLevel_3V5            PWR_PVDLevel_MODE3
+#define PWR_PVDLevel_3V7            PWR_PVDLevel_MODE4
+#define PWR_PVDLevel_3V9            PWR_PVDLevel_MODE5
+#define PWR_PVDLevel_4V1            PWR_PVDLevel_MODE6
+#define PWR_PVDLevel_4V4            PWR_PVDLevel_MODE7
 
 /* PWR_AWU_Prescaler */
 #define PWR_AWU_Prescaler_1       ((uint32_t)0x00000000)

diff --git a/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h b/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h
@@ -2,7 +2,7 @@
  * File Name          : ch32v00x_spi.h
  * Author             : WCH
  * Version            : V1.0.0
- * Date               : 2022/08/08
+ * Date               : 2024/06/01
  * Description        : This file contains all the functions prototypes for the
  *                      SPI firmware library.
  *********************************************************************************
@@ -32,7 +32,8 @@ typedef struct
                               This parameter can be a value of @ref SPI_data_size */
 
     uint16_t SPI_CPOL; /* Specifies the serial clock steady state.
-                          This parameter can be a value of @ref SPI_Clock_Polarity */
+                          This parameter can be a value of @ref SPI_Clock_Polarity 
+                          When using SPI slave mode to send data, the CPOL bit should be set to 1 */
 
     uint16_t SPI_CPHA; /* Specifies the clock active edge for the bit capture.
                           This parameter can be a value of @ref SPI_Clock_Phase */
@@ -68,7 +69,7 @@ typedef struct
 
 /* SPI_Clock_Polarity */
 #define SPI_CPOL_Low                       ((uint16_t)0x0000)
-#define SPI_CPOL_High                      ((uint16_t)0x0002)
+#define SPI_CPOL_High                      ((uint16_t)0x0002)//When using SPI slave mode to send data, the CPOL bit should be set to 1. 
 
 /* SPI_Clock_Phase */
 #define SPI_CPHA_1Edge                     ((uint16_t)0x0000)

diff --git a/EVT/EXAM/SRC/Peripheral/src/ch32v00x_pwr.c b/EVT/EXAM/SRC/Peripheral/src/ch32v00x_pwr.c
@@ -58,17 +58,17 @@ void PWR_PVDCmd(FunctionalState NewState)
  * @fn      PWR_PVDLevelConfig
  *
  * @brief   Configures the voltage threshold detected by the Power Voltage
- *        Detector(PVD).
+ *          Detector(PVD).
  *
  * @param   PWR_PVDLevel - specifies the PVD detection level
- *            PWR_PVDLevel_2V9 - PVD detection level set to 2.9V
- *            PWR_PVDLevel_3V1 - PVD detection level set to 3.1V
- *            PWR_PVDLevel_3V3 - PVD detection level set to 3.3V
- *            PWR_PVDLevel_3V5 - PVD detection level set to 3.5V
- *            PWR_PVDLevel_3V7 - PVD detection level set to 3.7V
- *            PWR_PVDLevel_3V9 - PVD detection level set to 3.9V
- *            PWR_PVDLevel_4V1 - PVD detection level set to 4.1V
- *            PWR_PVDLevel_4V4 - PVD detection level set to 4.4V
+ *            PWR_PVDLevel_MODE0 - PVD detection level set to mode 0.
+ *            PWR_PVDLevel_MODE1 - PVD detection level set to mode 1.
+ *            PWR_PVDLevel_MODE2 - PVD detection level set to mode 2.
+ *            PWR_PVDLevel_MODE3 - PVD detection level set to mode 3.
+ *            PWR_PVDLevel_MODE4 - PVD detection level set to mode 4.
+ *            PWR_PVDLevel_MODE5 - PVD detection level set to mode 5.
+ *            PWR_PVDLevel_MODE6 - PVD detection level set to mode 6.
+ *            PWR_PVDLevel_MODE7 - PVD detection level set to mode 7.
  *
  * @return  none
  */

diff --git a/EVT/EXAM/SRC/Peripheral/src/ch32v00x_spi.c b/EVT/EXAM/SRC/Peripheral/src/ch32v00x_spi.c
@@ -54,7 +54,8 @@ void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
  * @fn      SPI_Init
  *
  * @brief   Initializes the SPIx peripheral according to the specified
- *        parameters in the SPI_InitStruct.
+ *          parameters in the SPI_InitStruct.
+ *          When using SPI slave mode to send data, the CPOL bit should be set to 1.
  *
  * @param   SPIx - where x can be 1 to select the SPI peripheral.
  *          SPI_InitStruct - pointer to a SPI_InitTypeDef structure that

diff --git a/EVT/EXAM/USART_IAP/CH32V003_IAP/User/iap.c b/EVT/EXAM/USART_IAP/CH32V003_IAP/User/iap.c
@@ -104,7 +104,6 @@ u8 RecData_Deal(void)
                     Fast_Program_Buf[CodeLen + i] = 0xFF;
                 }
 
-
                 CH32_IAP_Program(Program_addr, (u32*) Fast_Program_Buf);
                 CodeLen = 0;
             }

diff --git a/EVT/PUB/CH32V00x Evaluation Board Reference-EN.pdf b/EVT/PUB/CH32V00x Evaluation Board Reference-EN.pdf