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fpga: add script to generate a flatten Flist for FPGA synthesis
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Signed-off-by: Cesar Fuguet <[email protected]>
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cfuguet committed Oct 13, 2023
1 parent 71c4000 commit 33fb5fc
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Showing 3 changed files with 87 additions and 2 deletions.
6 changes: 5 additions & 1 deletion Makefile
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Expand Up @@ -657,7 +657,11 @@ check-torture:
grep 'All signatures match for $(test-location)' $(riscv-torture-dir)/$(test-location).log
diff -s $(riscv-torture-dir)/$(test-location).spike.sig $(riscv-torture-dir)/$(test-location).rtlsim.sig

src_flist := $(addprefix $(root-dir), $(shell cat core/Flist.cva6|grep "$\{CVA6_REPO_DIR.\+sv"|sed "s/.*CVA6_REPO_DIR..//"|sed "s/..TARGET_CFG./$(target)/"))
src_flist = $(shell \
TARGET_CFG=${TARGET_CFG} \
HPDCACHE_TARGET_CFG=${HPDCACHE_TARGET_CFG} \
HPDCACHE_DIR=${HPDCACHE_DIR} \
python3 util/flist_flattener.py core/Flist.cva6)
fpga_filter := $(addprefix $(root-dir), corev_apu/bootrom/bootrom.sv)
fpga_filter += $(addprefix $(root-dir), core/include/instr_tracer_pkg.sv)
fpga_filter += $(addprefix $(root-dir), src/util/ex_trace_item.sv)
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8 changes: 7 additions & 1 deletion corev_apu/fpga/scripts/run.tcl
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Expand Up @@ -38,7 +38,13 @@ read_ip { \
}
# read_ip xilinx/xlnx_protocol_checker/ip/xlnx_protocol_checker.xci

set_property include_dirs { "src/axi_sd_bridge/include" "../../vendor/pulp-platform/common_cells/include" "../../vendor/pulp-platform/axi/include" "../register_interface/include"} [current_fileset]
set_property include_dirs { \
"src/axi_sd_bridge/include" \
"../../vendor/pulp-platform/common_cells/include" \
"../../vendor/pulp-platform/axi/include" \
"../../core/cache_subsystem/hpdcache/rtl/include" \
"../register_interface/include" \
} [current_fileset]

source scripts/add_sources.tcl

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75 changes: 75 additions & 0 deletions util/flist_flattener.py
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@@ -0,0 +1,75 @@
#!/bin/env python3
# Copyright 2023 Commissariat a l'Energie Atomique et aux Energies
# Alternatives (CEA)
#
# Licensed under the Solderpad Hardware License, Version 2.1 (the “License”);
# you may not use this file except in compliance with the License.
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
# You may obtain a copy of the License at https://solderpad.org/licenses/
#
# Authors: Cesar Fuguet
# Date: October, 2023
# Description: script to flatten a Flist file. Flattening consist on:
# - expanding environment variables in the file
# - expanding included Flist files

import sys;
import argparse;
import os;

def printLine(outf, line, printNewline):
if printNewline:
outf.write(f'{line}\n')
else:
outf.write(line + ' ')

def parseFlist(inFlist, outFlist, printIncdir, printNewline):
lines = iter(inFlist.read().splitlines())
for line in lines:
line = line.strip()
if (line.startswith('#') or
line.startswith('//') or
line.startswith('/*')):
continue
line = os.path.expandvars(line)
if line.startswith('+incdir+'):
if printIncdir:
printLine(outFlist, line, printNewline)
elif line.startswith('-F'):
includedFilename = line.lstrip('-F').strip()
if not os.path.exists(includedFilename):
raise (RuntimeError(f'{includedFilename} not found'))
with open(includedFilename, 'r') as includedFlist:
parseFlist(includedFlist, outFlist, printIncdir, printNewline)
elif line:
printLine(outFlist, line, printNewline)


def getArguments():
parser = argparse.ArgumentParser(description='Flatten a Flist file')
parser.add_argument(
'--print_incdir',
action="store_true",
help='Print incdir statements in the output')
parser.add_argument(
'--print_newline',
action="store_true",
help='Print newline in the output after each line')
parser.add_argument(
'inFlist',
nargs='?',
type=argparse.FileType('r'),
default=sys.stdin,
help='Input Flist file (default to stdin)')
parser.add_argument(
'outFlist',
nargs='?',
type=argparse.FileType('w'),
default=sys.stdout,
help='Output flattened Flist file (default to stdout)')
return parser.parse_args()


if __name__ == "__main__":
args = getArguments()
parseFlist(args.inFlist, args.outFlist, args.print_incdir, args.print_newline)

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