verif: add HPDCACHE related variables in verif Makefile

Signed-off-by: Cesar Fuguet <[email protected]>
openhwgroup · Oct 13, 2023 · 2355d98 · 2355d98
1 parent f710ddb
commit 2355d98
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Showing 3 changed files with 7 additions and 1 deletion.
diff --git a/verif/env/uvme/cov/uvme_cva6_config_covg.sv b/verif/env/uvme/cov/uvme_cva6_config_covg.sv
@@ -145,7 +145,7 @@ covergroup cg_cva6_config(string name) with function sample();
       bins PerfCounterEn ={0};
    }
    cp_DcacheType : coverpoint cva6_config_pkg::CVA6ConfigDcacheType {
-      bins DcacheType ={cva6_config_pkg::WT};
+      bins DcacheType ={config_pkg::WT};
    }
    cp_MmuPresent : coverpoint cva6_config_pkg::CVA6ConfigMmuPresent {
       bins MmuPresent ={0};

diff --git a/verif/sim/Makefile b/verif/sim/Makefile
@@ -19,6 +19,11 @@ ifndef TARGET_CFG
 export TARGET_CFG = $(target)
 endif
 
+HPDCACHE_DIR ?= $(CVA6_REPO_DIR)/core/cache_subsystem/hpdcache
+export HPDCACHE_DIR
+HPDCACHE_TARGET_CFG ?= ${CVA6_REPO_DIR}/core/include/cva6_hpdcache_default_config_pkg.sv
+export HPDCACHE_TARGET_CFG
+
 .DEFAULT_GOAL := help
 
 FLIST_TB   := $(CVA6_TB_DIR)/Flist.cva6_tb

diff --git a/verif/tb/core/Flist.cva6_tb b/verif/tb/core/Flist.cva6_tb
@@ -31,6 +31,7 @@ ${CVA6_REPO_DIR}/corev_apu/axi_mem_if/src/axi2mem.sv
 ${CVA6_REPO_DIR}/corev_apu/tb/ariane_soc_pkg.sv
 ${CVA6_REPO_DIR}/corev_apu/tb/axi_intf.sv
 ${CVA6_REPO_DIR}/corev_apu/tb/ariane_axi_pkg.sv
+${CVA6_REPO_DIR}/corev_apu/tb/ariane_axi_soc_pkg.sv
 
 // RVFI tracer
 ${CVA6_REPO_DIR}/corev_apu/tb/rvfi_tracer.sv