0.7.0

What's Changed

Documentation Changes

• Added note that writing 0x0 to tdata1 disables the trigger and result… by @Silabs-ArjanB in #712
• Changed Debug version to 1.0.0-STABLE, 86e748abed738f8878707dc31fe271… by @Silabs-ArjanB in #714
• Updated debug to version 1.0-STABLE, 246028cd719426597269b3d717c86680… by @Silabs-ArjanB in #727
• Updated CLIC to version 0.9-draft, 11/08/2022. Removed mclicbase CSR. Changed address of mintstatus CSR. by @Silabs-ArjanB in #728
• User manual updates for mnxti and debug_req_i descriptions by @silabs-oysteink in #731
• Made tdata1 trigger type 0xF the default for WARL resolution. by @silabs-oysteink in #733
• Added support for mcontrol in tdata1. Changed reset value of tinfo acc… by @Silabs-ArjanB in #720
• Corrected tdata2 WARL behavior by @Silabs-ArjanB in #740
• Typo fixes by @Silabs-ArjanB in #742
• Updated Zc version to v1.0.0-RC5.7 by @Silabs-ArjanB in #744
• Update to debug description by @silabs-oysteink in #746

RTL Changes

• Updates related to PR #680 by @silabs-oysteink in #689
• Clear mstatus.mprv when entering user mode through dret by @silabs-oivind in #690
• Removed possible zero-replication code by @silabs-oysteink in #691
• Merge minhv handling from CV32E40S by @silabs-oysteink in #692
• mcause.minhv clear from WB stage by @silabs-oysteink in #693
• CSR stall on CLIC pointers writing to mcause.minhv by @silabs-oysteink in #694
• Debug triggers refactor by @silabs-oysteink in #697
• Add support for RV32E by @silabs-oivind in #695
• Removed POINTER_FETCH state from controller_fsm by @silabs-oysteink in #696
• Bugfix: minstret would only update for clic pointers by @silabs-oysteink in #698
• Added support for DBG_NUM_TRIGGERS parameter by @silabs-oysteink in #700
• Turned on ZC_EXT. by @silabs-oysteink in #701
• Mcontrol6 by @silabs-oysteink in #702
• Trigger types 0x5 and 0xF by @silabs-oysteink in #706
• Disable trigger by writing zero to tdata1 by @silabs-oysteink in #710
• Added assertions for LSU split_q and trigger_match_0_i by @silabs-oysteink in #708
• Watchpoint triggers refactor by @silabs-oysteink in #713
• Updated exception cause for instruction bus faults to be 24 instead o… by @silabs-oysteink in #715
• Initroduced privilege level to align with CV32E40S. by @silabs-oysteink in #716
• Fix github issue #402 by @silabs-oivind in #717
• Tie dcsr.mprven to 1. Add dcsr.stopcount. by @silabs-oivind in #718
• Single step and debug cause cleanup by @silabs-oysteink in #719
• Fix for issue #665 by @silabs-oysteink in #721
• Fix for cv32e40s issue #350 (common with cv32e40x). by @silabs-oysteink in #722
• Fix for issue #711. by @silabs-oysteink in #723
• Implement dcsr.stopcount by @silabs-oivind in #726
• Fix for issue #341. by @silabs-oysteink in #725
• Updates do mnxti and mscratchcsw[l] handling by @silabs-oysteink in #730
• WARL resolution functions by @silabs-oysteink in #732
• Trigger type WARL resolution (0xF) by @silabs-oysteink in #734
• Added privilege level check to ebreak with dcsr.ebreakm by @silabs-oysteink in #735
• Implement fence instruction by @silabs-oivind in #724
• Updated debug cause priority according to debug spec v 1.0.0. by @silabs-oysteink in #737
• Updated targets for NMI. by @silabs-oysteink in #736
• Updated aliasing of mpp and mpie between mcause and mstatus. by @silabs-oysteink in #738
• Fix for issue #668 by @silabs-oysteink in #741

Full Changelog: 0.6.0...0.7.0