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riscv32: align stack pointer to 16-bytes
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Even though rv32 is only 32-bits, all RISC-V stacks must be aligned to a
16-byte boundary. For discussion on this, see:

riscv-non-isa/riscv-elf-psabi-doc#21

As an example of why this is important, the `c.addi16sp` compressed
instruction is only able to adjust the stack pointer by 16-byte
increments.

Signed-off-by: Sean Cross <[email protected]>
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xobs committed Dec 27, 2023
1 parent ad1b65a commit e2c199e
Showing 1 changed file with 4 additions and 4 deletions.
8 changes: 4 additions & 4 deletions src/unwinder/arch/riscv32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -176,7 +176,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
asm!(
"
mv t0, sp
add sp, sp, -0x188
add sp, sp, -0x190
sw ra, 0x180(sp)
",
code!(save_gp),
Expand All @@ -186,7 +186,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
mv a0, sp
jalr t0
lw ra, 0x180(sp)
add sp, sp, 0x188
add sp, sp, 0x190
ret
",
options(noreturn)
Expand All @@ -197,7 +197,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
asm!(
"
mv t0, sp
add sp, sp, -0x88
add sp, sp, -0x90
sw ra, 0x80(sp)
",
code!(save_gp),
Expand All @@ -206,7 +206,7 @@ pub extern "C-unwind" fn save_context(f: extern "C" fn(&mut Context, *mut ()), p
mv a0, sp
jalr t0
lw ra, 0x80(sp)
add sp, sp, 0x88
add sp, sp, 0x90
ret
",
options(noreturn)
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