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feat: add i2c sensors for ROCK 3C/ZERO3
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Signed-off-by: Nascs Fang <[email protected]>
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nascs committed Sep 13, 2024
1 parent cfc96d0 commit 0cdcc47
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14 changes: 14 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/Makefile
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Expand Up @@ -198,8 +198,22 @@ dtb-$(CONFIG_CLK_RK3568) += \
rk3568-i2c2-m0-pca9555.dtbo \
rk3568-i2c2-m0.dtbo \
rk3568-i2c2-m1.dtbo \
rk3568-i2c3-m0-jc42.dtbo \
rk3568-i2c3-m0-mcp980x.dtbo \
rk3568-i2c3-m0-sc16is750.dtbo \
rk3568-i2c3-m0.dtbo \
rk3568-i2c3-m1.dtbo \
rk3568-i2c4-m0-bme280.dtbo \
rk3568-i2c4-m0-bme680.dtbo \
rk3568-i2c4-m0-bmp280.dtbo \
rk3568-i2c4-m0-bmp380.dtbo \
rk3568-i2c4-m0-htu21.dtbo \
rk3568-i2c4-m0-lm75.dtbo \
rk3568-i2c4-m0-pcf8574.dtbo \
rk3568-i2c4-m0-pcf8575.dtbo \
rk3568-i2c4-m0-sht41.dtbo \
rk3568-i2c4-m0-si7020.dtbo \
rk3568-i2c4-m0-tmp102.dtbo \
rk3568-i2c4-m0.dtbo \
rk3568-i2c5-m0.dtbo \
rk3568-npu-disable.dtbo \
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11 changes: 11 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m0-jc42.dts
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#include "rk3568-i2c3-m0.dts"

&i2c3 {
#address-cells = <1>;
#size-cells = <0>;

mcp980x: mcp980x@18 {
compatible = "jedec,jc-42.4-temp";
reg = <0x1a>;
};
};
11 changes: 11 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m0-mcp980x.dts
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#include "rk3568-i2c3-m0.dts"

&i2c3 {
#address-cells = <1>;
#size-cells = <0>;

mcp980x: mcp980x@18 {
compatible = "maxim,mcp980x";
reg = <0x18>;
};
};
24 changes: 24 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m0-sc16is750.dts
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#include "rk3568-i2c3-m0.dts"

&i2c3 {
#address-cells = <1>;
#size-cells = <0>;

sc16is750: sc16is750@48 {
compatible = "nxp,sc16is750";
reg = <0x48>;
clocks = <&sc16is750_clk>;
interrupt-parent = <&gpio>;
interrupts = <24 2>;
pinctrl-0 = <&int_pins>;
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
i2c-max-frequency = <400000>;
};
};


&{/} {

};
33 changes: 33 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-bme280.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable BME280 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable BME280 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

bme280: bme280@76 {
compatible = "bme280";
reg = <0x76>;
status = "okay";
};
};
33 changes: 33 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-bme680.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable BME680 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable BME680 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

bme680: bme680@76 {
compatible = "bme680";
reg = <0x76>;
status = "okay";
};
};
33 changes: 33 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-bmp280.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable BMP280 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable BMP280 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

bmp280: bmp280@76 {
compatible = "bosch,bmp280";
reg = <0x76>;
status = "okay";
};
};
33 changes: 33 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-bmp380.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable BMP380 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable BMP380 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

bmp380: bmp380@76 {
compatible = "bosch,bmp380";
reg = <0x76>;
status = "okay";
};
};
33 changes: 33 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-htu21.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable HTU21 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable HTU21 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

htu21: htu21@76 {
compatible = "meas,htu21";
reg = <0x40>;
status = "okay";
};
};
33 changes: 33 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-lm75.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable LM75 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable LM75 on I2C4-M0 .
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
#address-cells = <1>;
#size-cells = <0>;

lm75: lm75@48 {
compatible = "st,stlm75";
reg = <0x48>;
vs-supply = <&vcc3v3_sys>;
status = "okay";
};
};
38 changes: 38 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-pcf8574.dts
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/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
metadata {
title = "Enable PCF8574 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable PCF8574 on I2C4-M0 .
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
#address-cells = <1>;
#size-cells = <0>;

pcf8574: pcf8574@20 {
compatible = "nxp,pcf8574";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
status = "okay";
};
};
38 changes: 38 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-pcf8575.dts
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/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
metadata {
title = "Enable PCF8575 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable PCF8575 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28, INT=3.
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28, INT=3";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
#address-cells = <1>;
#size-cells = <0>;

pcf8575: pcf8575@20 {
compatible = "nxp,pcf8575";
reg = <0x20>;
#gpio-controller;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PC4 IRQ_TYPE_EDGE_FALLING>;
status = "okay";
};
};
35 changes: 35 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c4-m0-sht41.dts
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/dts-v1/;
/plugin/;

/ {
metadata {
title = "Enable SHT41 on I2C4-M0";
compatible = "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3";
category = "misc";
exclusive = "GPIO4_B2", "GPIO4_B3";
description = "Enable SHT41 on I2C4-M0.
On Radxa ROCK 3C this is SDA pin 27 and SCL pin 28.
On Radxa CM3 IO this is SDA pin 19 and SCL pin 23.
On Radxa CM3 RPI CM4 IO this SDA pin 19 and SCL pin 23.
On Radxa CM3S IO this is SDA pin 19 and SCL pin 23.
On Radxa E23 this is SDA pin 19 and SCL pin 23..
On Radxa ZERO 3 this is SDA pin 27 and SCL pin 28";
};
};

&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

sht41: sht41@76 {
compatible = "sensirion,sht4x";
reg = <0x40>;
status = "okay";
};
};
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