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[Dev] Transform 3rdparty tvm from bitblas into bitblas_tl #95

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Jul 22, 2024
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d8884e6
Refactor BatchMatMulEmitter and BatchMatMulSelector for improved read…
LeiWang1999 Jul 5, 2024
fc84173
Refactor import statements for improved readability and maintainability
LeiWang1999 Jul 5, 2024
02f64de
Refactor import statements for improved readability and maintainability
LeiWang1999 Jul 5, 2024
397eee6
disable failure email for ci
LeiWang1999 Jul 5, 2024
20f6ad1
remove email notifications.
LeiWang1999 Jul 6, 2024
b93c394
move relax pass from testing to mlc_llm
LeiWang1999 Jul 6, 2024
ba6a6df
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into main
LeiWang1999 Jul 6, 2024
257693a
Refactor scripts with se check_eual_ref_scripts_with_emitter function
LeiWang1999 Jul 6, 2024
9bb7f49
Lint Fix
LeiWang1999 Jul 6, 2024
39e7614
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into main
LeiWang1999 Jul 6, 2024
93eb5a5
Refactor scripts with se check_eual_ref_scripts_with_emitter function
LeiWang1999 Jul 6, 2024
aa66a90
bug fix in test
LeiWang1999 Jul 6, 2024
ae14a53
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into dev
LeiWang1999 Jul 6, 2024
79b08e4
lint fix.
LeiWang1999 Jul 6, 2024
86fd036
test cuda i4 kernel
LeiWang1999 Jul 7, 2024
6b73a21
Refactor copyright notice in i4matmul.hpp
LeiWang1999 Jul 7, 2024
0ba90c1
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into dev
LeiWang1999 Jul 7, 2024
086d208
Refactor BitBLASLinear test module for improved readability and maint…
LeiWang1999 Jul 7, 2024
47a3abd
refactor test as version below python 3.9 cannot handle int32 overflow.
LeiWang1999 Jul 8, 2024
024b247
format lint for test
LeiWang1999 Jul 8, 2024
bfedeaa
Refactor test_int4b_fp16_convert.py for improved readability and main…
LeiWang1999 Jul 8, 2024
e672a23
remove unused design file
LeiWang1999 Jul 8, 2024
21e5430
move tile device from package to base
LeiWang1999 Jul 8, 2024
fd11940
dummy impl for codegen
LeiWang1999 Jul 8, 2024
9ccfa85
Refactor file structure for ladder_permutate module
LeiWang1999 Jul 8, 2024
7c7d73e
Refactor backend class and fix typos in comments
LeiWang1999 Jul 8, 2024
47d5fc5
Deep refactor Lib related code.
LeiWang1999 Jul 8, 2024
53dd0dd
remove ci pull.
LeiWang1999 Jul 10, 2024
d58ac43
LintFix
LeiWang1999 Jul 10, 2024
37cb07c
refactor builder for whl build
LeiWang1999 Jul 10, 2024
f5b9999
Refactor TIRWrapper.wrap() method to include an assertion for the opt…
LeiWang1999 Jul 11, 2024
fb78244
Refactor lib_generator to set library and source paths
LeiWang1999 Jul 11, 2024
706e227
lint fix
LeiWang1999 Jul 11, 2024
63f5515
BitNet vllm integration
LeiWang1999 Jul 16, 2024
de91c0d
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into dev
LeiWang1999 Jul 16, 2024
b9655fd
chore: update codespell to version 2.3.0
LeiWang1999 Jul 16, 2024
fff385f
Lintfix
LeiWang1999 Jul 16, 2024
72a98e7
Bump version to 0.0.1.dev13
LeiWang1999 Jul 18, 2024
5646ab5
lint fix
LeiWang1999 Jul 18, 2024
b965863
disable fast decoding [u]int4xint8 by default.
LeiWang1999 Jul 21, 2024
1198fc7
optimize from dict design in Hint
LeiWang1999 Jul 21, 2024
014213c
Implement SplitK
LeiWang1999 Jul 21, 2024
e0ca752
bitnet benchmark generation.
LeiWang1999 Jul 21, 2024
81b9cf0
Add benchmark script for BitNet integration
LeiWang1999 Jul 21, 2024
02edc0b
AtomicAdd Support
LeiWang1999 Jul 21, 2024
1a70c2d
LintFix
LeiWang1999 Jul 21, 2024
28d851c
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into dev
LeiWang1999 Jul 21, 2024
c447a95
ci fix when 3rdparty tvm is initialized.
LeiWang1999 Jul 21, 2024
79a001b
bug fix for setup
LeiWang1999 Jul 21, 2024
31813b2
fix a bug in block reduce
LeiWang1999 Jul 21, 2024
78b6a3d
typo fix
LeiWang1999 Jul 21, 2024
9c55218
BUG Fix for block reduce.
LeiWang1999 Jul 22, 2024
1aa8868
Lint fix
LeiWang1999 Jul 22, 2024
22f70bf
Merge branch 'main' of https://github.com/Microsoft/BitBLAS into dev
LeiWang1999 Jul 22, 2024
5f082a5
Refactor block reduce schedule template
LeiWang1999 Jul 22, 2024
b4fb31e
transform branch from bitblas to bitblas_tl
LeiWang1999 Jul 22, 2024
35eaa00
Fix subproject commit reference in 3rdparty/tvm
LeiWang1999 Jul 22, 2024
254dd74
chore: update submodule branch from bitblas to bitblas_tl
LeiWang1999 Jul 22, 2024
31a44aa
force update config.cmake
LeiWang1999 Jul 22, 2024
427800e
Bug fix
LeiWang1999 Jul 22, 2024
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2 changes: 1 addition & 1 deletion .gitmodules
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
[submodule "3rdparty/tvm"]
path = 3rdparty/tvm
url = https://github.com/LeiWang1999/tvm
branch = bitblas
branch = bitblas_tl
2 changes: 1 addition & 1 deletion 3rdparty/tvm
Submodule tvm updated 88 files
+10 −0 CMakeLists.txt
+63 −35 README.md
+3 −31 cmake/config.cmake
+1 −0 include/tvm/runtime/c_runtime_api.h
+2 −0 include/tvm/runtime/data_type.h
+1 −1 python/tvm/script/parser/core/evaluator.py
+20 −0 python/tvm/tl/__init__.py
+21 −0 python/tvm/tl/_ffi_api.py
+99 −0 python/tvm/tl/autotuner.py
+142 −0 python/tvm/tl/engine.py
+281 −0 python/tvm/tl/language.py
+94 −0 python/tvm/tl/layout.py
+108 −0 python/tvm/tl/transform.py
+249 −0 python/tvm/tl/utils.py
+9 −1 src/runtime/pack_args.h
+18 −2 src/tir/analysis/block_access_region_detector.cc
+1 −1 src/tir/transforms/lower_device_kernel_launch.cc
+7 −3 src/tir/transforms/merge_shared_memory_allocations.cc
+1 −1 src/tir/transforms/storage_access.h
+52 −7 src/tir/transforms/thread_storage_sync.cc
+135 −0 src/tl/ir.cc
+348 −0 src/tl/layout/gemm_layouts.cc
+412 −0 src/tl/layout/layout.cc
+167 −0 src/tl/layout/layout.h
+116 −0 src/tl/layout/swizzle.cc
+91 −0 src/tl/layout/swizzle.h
+262 −0 src/tl/layout/utils.cc
+76 −0 src/tl/layout/utils.h
+98 −0 src/tl/op/builtin.cc
+152 −0 src/tl/op/builtin.h
+393 −0 src/tl/op/bulk_copy.cc
+82 −0 src/tl/op/bulk_copy.h
+355 −0 src/tl/op/elem.cc
+82 −0 src/tl/op/elem.h
+207 −0 src/tl/op/gemm.cc
+62 −0 src/tl/op/gemm.h
+102 −0 src/tl/op/op.cc
+113 −0 src/tl/op/op.h
+190 −0 src/tl/op/parallel.cc
+88 −0 src/tl/op/parallel.h
+222 −0 src/tl/op/reduce.cc
+61 −0 src/tl/op/reduce.h
+203 −0 src/tl/runtime/runtime.cc
+37 −0 src/tl/runtime/runtime.h
+1,058 −0 src/tl/target/codegen.cc
+88 −0 src/tl/target/codegen.h
+104 −0 src/tl/target/rt_mod.cc
+85 −0 src/tl/target/utils.cc
+48 −0 src/tl/target/utils.h
+41 −0 src/tl/tl_templates/common.h
+73 −0 src/tl/tl_templates/copy.h
+217 −0 src/tl/tl_templates/copy_sm90.h
+10 −0 src/tl/tl_templates/gemm.h
+160 −0 src/tl/tl_templates/gemm_sm70.h
+314 −0 src/tl/tl_templates/gemm_sm80.h
+147 −0 src/tl/tl_templates/gemm_sm90.h
+100 −0 src/tl/tl_templates/ldsm.h
+53 −0 src/tl/tl_templates/reduce.h
+39 −0 src/tl/tl_templates/threadblock_swizzle.h
+133 −0 src/tl/transform/cluster_planning.cc
+94 −0 src/tl/transform/frontend_legalize.cc
+934 −0 src/tl/transform/inject_pipeline.cc
+291 −0 src/tl/transform/layout_inference.cc
+164 −0 src/tl/transform/loop_partition.cc
+46 −0 src/tl/transform/loop_partition.h
+451 −0 src/tl/transform/loop_vectorize.cc
+45 −0 src/tl/transform/loop_vectorize.h
+157 −0 src/tl/transform/lower_hopper_intrin.cc
+185 −0 src/tl/transform/lower_tile_op.cc
+242 −0 src/tl/transform/pipeline_planning.cc
+842 −0 src/tl/transform/warp_specialized_pipeline.cc
+25 −0 tl_doc/flash_perf.md
+61 −0 tl_doc/language_ref.md
+82 −0 tl_scripts/conv_example.py
+86 −0 tl_scripts/gemm_example.py
+48 −0 tl_scripts/layout_anno_example.py
+103 −0 tl_scripts/mamba_example.py
+321 −0 tl_scripts/mha_bwd_example.py
+120 −0 tl_scripts/mha_example.py
+61 −0 tl_scripts/profile.py
+41 −0 tl_scripts/reduce_example.py
+103 −0 tl_scripts/retnet_example.py
+75 −0 tl_scripts/rms_norm.py
+59 −0 tl_scripts/splitk_example.py
+54 −0 tl_scripts/test.py
+191 −0 tl_scripts/test_gemm.py
+255 −0 tl_scripts/triton_gemm.py
+673 −0 tl_scripts/triton_mha.py
30 changes: 18 additions & 12 deletions bitblas/base/roller/policy/tensorcore.py
Original file line number Diff line number Diff line change
Expand Up @@ -4,14 +4,16 @@
from bitblas import tvm
from typing import Dict, List, Tuple, Optional
import numpy as np

import logging
from ...arch import TileDevice
from ..hint import Hint, Stride, TileDict, IntrinInfo
from ..node import PrimFuncNode
from .common import coalesced_factor, factorize, get_all_factors
from .default import DefaultPolicy
from ..rasterization import NoRasterization, Rasterization2DColumn

logger = logging.getLogger(__name__)


class TensorCorePolicy(DefaultPolicy):

Expand Down Expand Up @@ -47,9 +49,9 @@ def _legalize_info(self):
self.use_async_copy = False
# TODO: block reduction depth is not used for now.
# As there still exists some performance issues for block reduction.
# block_reduction_depth = self.prim_func_node.get_tag("block_reduction_depth")
# if block_reduction_depth:
# self.block_reduction_depth = block_reduction_depth
block_reduction_depth = self.prim_func_node.get_tag("block_reduction_depth")
if block_reduction_depth:
self.block_reduction_depth = block_reduction_depth

def _compute_tc_strides(
self,
Expand Down Expand Up @@ -120,7 +122,6 @@ def _check_small_tile(td: TileDict):

smem_limit = min(self.arch.max_smem_usage // td.block_per_SM, self.arch.smem_cap)
rstep_map = td.rstep_map.copy()
is_block_reduction = self.block_reduction_depth is not None

def _optimize(node, rstep):
all_steps = self.get_node_reduce_step_candidates(node)
Expand Down Expand Up @@ -185,12 +186,12 @@ def _enlarge(rstep_id):
rstep = _optimize(node, rstep_map)
rstep_map = rstep

if is_block_reduction:
# If block reduction, we should constrain the max value is 64
# Otherwise it will introduce an issue of cuda invalid args.
MAX_REDUCE_K = 64
for k in rstep_map:
rstep_map[k] = min(rstep_map[k], MAX_REDUCE_K)
# if is_block_reduction:
# # If block reduction, we should constrain the max value is 64
# # Otherwise it will introduce an issue of cuda invalid args.
# MAX_REDUCE_K = 64
# for k in rstep_map:
# rstep_map[k] = min(rstep_map[k], MAX_REDUCE_K)
td.rstep_map = rstep_map
td.smem_cost, td.cached_tensors_map = self._compute_shared_memory_usage(td)
return
Expand Down Expand Up @@ -315,7 +316,12 @@ def _score(node, thread): # small is better
if intrin_info["out_dtype"] in ["float32"]:
codegen_dict.shared_scope = "shared.dyn"
# smem capacity
if td.smem_cost > self.arch.smem_cap:
# TODO: This is a dummy mul which avoid reusing some shared memory.
# Should be removed in the future.
if td.smem_cost > (self.arch.smem_cap * 1.3):
info_message = f"Tile Dict: {td.output_tile} Shared memory exceeds the static capacity," \
" use dynamic shared memory."
logger.info(info_message)
codegen_dict.shared_scope = "shared.dyn"

codegen_dict.complete_config(node)
Expand Down
6 changes: 5 additions & 1 deletion bitblas/gpu/matmul_mma_dequantize.py
Original file line number Diff line number Diff line change
Expand Up @@ -1986,7 +1986,7 @@ def get_param_indices(
k0, kr = sch.split(k0, [None, reduce_k])

sch.reorder(i0, j0, i1, j1, i2, j2, kr, k0, k1, i3, j3)
# sch.reorder(i0, j0, i1, j1, i2, j2, k0, k1, i3, j3)

block_idy = sch.fuse(i0, j0)
block_idx = sch.fuse(i1, j1)
thread_idy = i2
Expand All @@ -1998,6 +1998,10 @@ def get_param_indices(
thread_idz = j2 = thread_idy = sch.fuse(thread_idy, thread_idz)
sch.bind(thread_idy, "threadIdx.y")

# Put the thread binding after the shared memory prefetch
# Otherwise there's a axis missing bug behind tvm
sch.bind(kr, "threadIdx.z")

def smooth_layout_recover(block, scope, l=16, r=16, enable=True): # noqa: E741
if not enable:
return
Expand Down
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