TileLink UL in context to Soc
In our Soc we have used TileLink Uncached Lightweight for memory operations. From now on we will represent the protocol as TL-UL which essentially means the same thing.
TL-UL is used to interface all the components that need to access the memory.
Here is the complete view of the SoC.
We are concerned with how these links (orange, yellow and purple) are implemented and how they work according to the TileLink protocol.
We know that in TileLink the modules that want to communicate with each other are called Agents and each Agent can have multiple master or slave interfaces. Each pair of Agents communicate with each other through a link.
Each link comprise of five channels but in TL-UL two channels are used.
We will refer to these links according to their color coding.
The purple link here connects the Master Interface of the Fetch Bus Controller with the Slave Interface of the ICCM Controller.
Here the Fetch Bus Controller and the ICCM Controller are both Agents that want to communicate with each other.
This link will have two Channels. Channel A is used by master interface to issue the requests and Channel D is used by slave interface to respond to the master interface's request.
Purpose. used for fetching the instructions from the instruction memory.
The orange link here connects the Master Interface of the Load/Store Bus Controller with the Slave Interface of the DCCM Controller.
Here the Load/Store Bus Controller and the DCCM Controller are both Agents that want to communicate with each other.
This link will again have two Channels. Channel A is used by master interface to issue the requests and Channel D is used by slave interface to respond to the master interface's request.
Purpose. used for loading the data from the data memory or storing the data into the data memory.
The yellow link here connects the Master Interface of the UART Controller with another Slave Interface of the ICCM Controller.
This means that the ICCM Controller contains two slave interfaces, one connected with the master interface of Fetch Bus Controller and the other connected with the master interface of the UART Controller.
Purpose. for loading programs from the external world into the instruction memory.
Now we know the general structure of where the TileLink is used in the SoC. Next we have to understand how these Master Interfaces and Slave Interfaces are implemented but before doing that we need to understand the channels these interfaces use. Channel A which is used by Master and Channel D which is used by Slave.