Silence warnings on RISC-V

Removes warnings while the RISC-V code paths do not support asm.
Once assembly routines are added, we will want to gradually add
the items configured out in this commit back in.

include/common/bitdepth.rs

@@ -546,7 +546,10 @@ where
 /// [`avx2`]: crate::src::cpu::CpuFlags::AVX2
 /// [`avx512icl`]: crate::src::cpu::CpuFlags::AVX512ICL
 /// [`neon`]: crate::src::cpu::CpuFlags::NEON
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! bd_fn {
     ($decl_fn:path, $BD:ty, $name:ident, $asm:ident) => {{
         use paste::paste;
@@ -588,18 +591,27 @@ macro_rules! bpc_fn {
     }};
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! fn_identity {
     (fn $name:ident) => {
         $name
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 pub(crate) use bd_fn;
 
 #[cfg(all(feature = "asm", any(target_arch = "x86", target_arch = "x86_64")))]
 pub(crate) use bpc_fn;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 pub(crate) use fn_identity;

src/cdef.rs

@@ -13,7 +13,10 @@ use std::cmp;
 use std::ffi::c_int;
 use std::ffi::c_uint;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::include::common::bitdepth::BPC;
 
 bitflags! {

src/filmgrain.rs

@@ -28,7 +28,10 @@ use std::ops::Shl;
 use std::ops::Shr;
 use to_method::To;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::include::common::bitdepth::bd_fn;
 
 pub const GRAIN_WIDTH: usize = 82;

src/ipred.rs

@@ -41,7 +41,10 @@ use std::ffi::c_void;
 use std::slice;
 use strum::FromRepr;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::include::common::bitdepth::bd_fn;
 
 #[cfg(all(feature = "asm", target_arch = "x86_64"))]

src/itx.rs

@@ -48,7 +48,10 @@ use std::cmp;
 use std::ffi::c_int;
 use std::ffi::c_void;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::include::common::bitdepth::bd_fn;
 
 #[cfg(all(feature = "asm", any(target_arch = "x86", target_arch = "x86_64")))]
@@ -190,7 +193,10 @@ pub struct Rav1dInvTxfmDSPContext {
     pub itxfm_add: [[itxfm_fn; N_TX_TYPES_PLUS_LL]; N_RECT_TX_SIZES],
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_itx_fn {
     ($name:ident) => {
         fn $name(
@@ -216,22 +222,31 @@ macro_rules! decl_itx_fn {
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_itx1_fns {
     ($w:literal x $h:literal, $bpc:literal bpc, $asm:ident) => {
         decl_itx_fn!(dct, dct, $w x $h, $bpc bpc, $asm);
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_itx2_fns {
     ($w:literal x $h:literal, $bpc:literal bpc, $asm:ident) => {
         decl_itx1_fns!($w x $h, $bpc bpc, $asm);
         decl_itx_fn!(identity, identity, $w x $h, $bpc bpc, $asm);
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_itx12_fns {
     ($w:literal x $h:literal, $bpc:literal bpc, $asm:ident) => {
         decl_itx2_fns!($w x $h, $bpc bpc, $asm);
@@ -248,7 +263,10 @@ macro_rules! decl_itx12_fns {
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_itx16_fns {
     ($w:literal x $h:literal, $bpc:literal bpc, $asm:ident) => {
         decl_itx12_fns!($w x $h, $bpc bpc, $asm);
@@ -259,7 +277,10 @@ macro_rules! decl_itx16_fns {
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_itx_fns {
     ($bpc:literal bpc, $asm:ident) => {
         decl_itx16_fns!( 4 x  4, $bpc bpc, $asm);
@@ -520,7 +541,10 @@ unsafe fn inv_txfm_add_wht_wht_4x4_rust<BD: BitDepth>(
     }
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! assign_itx_fn {
     ($c:ident, $BD:ty, $w:literal, $h:literal, $type:ident, $type_enum:ident, $ext:ident) => {{
         use paste::paste;

src/loopfilter.rs

@@ -9,7 +9,10 @@ use std::cmp;
 use std::ffi::c_int;
 use std::ffi::c_uint;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::include::common::bitdepth::BPC;
 
 pub type loopfilter_sb_fn = unsafe extern "C" fn(

src/mc.rs

@@ -21,7 +21,10 @@ use std::ffi::c_int;
 use std::iter;
 use to_method::To;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::include::common::bitdepth::bd_fn;
 
 #[cfg(all(feature = "asm", any(target_arch = "x86", target_arch = "x86_64")))]
@@ -2008,7 +2011,10 @@ pub(crate) unsafe extern "C" fn resize_c_erased<BD: BitDepth>(
 }
 
 // TODO(legare): Generated fns are temporarily pub until init fns are deduplicated.
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_fn {
     (avg, $name:ident) => {
         pub(crate) fn $name(
@@ -2126,7 +2132,10 @@ macro_rules! decl_fn {
     };
 }
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 macro_rules! decl_fns {
     ($fn_kind:ident, $name:ident, $asm:ident) => {
         paste::paste! {

src/refmvs.rs

@@ -28,7 +28,10 @@ use std::mem;
 use std::ptr;
 use zerocopy::FromZeroes;
 
-#[cfg(feature = "asm")]
+#[cfg(all(
+    feature = "asm",
+    not(any(target_arch = "riscv64", target_arch = "riscv32"))
+))]
 use crate::src::cpu::{rav1d_get_cpu_flags, CpuFlags};
 
 #[cfg(all(feature = "asm", any(target_arch = "x86", target_arch = "x86_64")))]