[TailDuplication] Add option to enable tail duplication of fallthrough BBs

llvm/lib/CodeGen/TailDuplicator.cpp

@@ -76,6 +76,13 @@ static cl::opt<bool>
 static cl::opt<unsigned> TailDupLimit("tail-dup-limit", cl::init(~0U),
                                       cl::Hidden);
 
+// EraVM local begin
+static cl::opt<bool>
+    TailDupFallthroughBBs("tail-dup-fallthrough-bbs",
+                          cl::desc("Tail duplicate fallthrough basic blocks"),
+                          cl::init(false), cl::Hidden);
+// EraVM local end
+
 void TailDuplicator::initMF(MachineFunction &MFin, bool PreRegAlloc,
                             const MachineBranchProbabilityInfo *MBPIin,
                             MBFIWrapper *MBFIin,
@@ -559,8 +566,10 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
   // When doing tail-duplication during layout, the block ordering is in flux,
   // so canFallThrough returns a result based on incorrect information and
   // should just be ignored.
-  if (!LayoutMode && TailBB.canFallThrough())
+  // EraVM local begin
+  if (!TailDupFallthroughBBs && !LayoutMode && TailBB.canFallThrough())
     return false;
+  // EraVM local end
 
   // Don't try to tail-duplicate single-block loops.
   if (TailBB.isSuccessor(&TailBB))

llvm/test/CodeGen/EraVM/tail-dup-fallthrough-bbs.mir

@@ -0,0 +1,50 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# RUN: llc -x mir -run-pass tailduplication -tail-dup-fallthrough-bbs -verify-machineinstrs -compile-twice=false < %s | FileCheck %s
+
+--- |
+
+  target datalayout = "E-p:256:256-i256:256:256-S32-a:256:256"
+  target triple = "eravm"
+
+  define void @test(i256 %cond) { ret void }
+
+...
+---
+name:            test
+tracksRegLiveness: true
+body:             |
+  ; CHECK-LABEL: name: test
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT:   liveins: $r1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   dead $r0 = SUBxrr_v i256 10, $r1, i256 0, implicit-def $flags
+  ; CHECK-NEXT:   JCl %bb.3, 3, implicit $flags
+  ; CHECK-NEXT:   J %bb.2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   liveins: $r1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $r1 = MOVEIMM i256 4
+  ; CHECK-NEXT:   RET 0, implicit $r1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3:
+  ; CHECK-NEXT:   liveins: $r1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   $r1 = MOVEIMM i256 5
+  ; CHECK-NEXT:   RET 0, implicit $r1
+  bb.0:
+    liveins: $r1
+    J %bb.1
+  bb.1:
+    liveins: $r1
+    dead $r0 = SUBxrr_v i256 10, $r1, i256 0, implicit-def $flags
+    JCl %bb.4, i256 3, implicit killed $flags
+  bb.3:
+    liveins: $r1
+    $r1 = MOVEIMM i256 4
+    RET 0, implicit $r1
+  bb.4:
+    liveins: $r1
+    $r1 = MOVEIMM i256 5
+    RET 0, implicit $r1