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mariamelsahharr / WatAi_PE Public

generated from TinyTapeout/tt09-verilog-template

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Up to register/ctl signals #9

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Up to register/ctl signals

Up to register/ctl signals #9

Summary
Jobs
- test
Run details
- Usage
- Workflow file

Usage Workflow file

Run time

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Job	Run time
test	23s
	23s

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