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Val june24 fixed ci #981
Val june24 fixed ci #981
Commits on Jul 12, 2024
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[clang/june24] in CODEGEN (backport gg_tt.mad) cudacpp.mk, fix clang1…
…6 builds #904 (disabling OMP only for clang16; add -no-pie for fcheck_cpp.exe)
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[clang/june24] in CODEGEN (backport gg_tt.mad) cudacpp.mk, fix clang1…
…7 builds #904 (disable OMP also for clang17)
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[clang/june24] in CODEGEN cudacpp.mk, improve clang16/17 fix #904: re…
…move link-time -no-pie, add compiler-time -fPIC to fortran
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[gtest/june24] in CODEGEN (backport gg_tt.mad), include header valgri…
…nd.h (BSD license) to detect when running on valgrind #906 This is needed as part of the fixes for runTest.exe #903, preliminary to #896 Note: the header as-is is copied from /cvmfs/sft.cern.ch/lcg/releases/valgrind/3.23.0-24262/x86_64-el9-gcc11-opt/ (except for the inclusion of "clang-format off" directives) See https://valgrind.org/docs/manual/manual-core-adv.html#manual-core-adv.clientreq
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[gtest/june24] in CODEGEN (backport gg_tt.mad) constexpr_math.h, comp…
…rehensive fixes and debug printouts for bug #903 (recursive iteration, stack overflow, segfault etc)
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[gtest/june24] in CODEGEN (from gg_tt.mad) cudacpp.mk, add an 'asan' …
…target (address sanitizer #207), but keep it commented out
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[gtest/june24] in CODEGEN (from gg_tt.mad) testmisc.cc, use higher to…
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[gtest/june24] in CODEGEN constexpr_math.h, switch off debugging mode…
… (I had forgotten it enabled)
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[gtest2/june24] in CODEGEN (backport gg_tt.mad) MadgraphTest.h, runTe…
…st.cc, testxxx.cc: simplify gtest templates, remove cudaDeviceReset to fix #907, complete preparation of two-test infrastructure #896 More in detail: - move to the simplest "TEST(" use case of Google tests in MadgraphTest.h and runTest.cc (remove unnecessary levels of templating) - move gpuDeviceReset() to an atexit function of main in testxxx and comment it out anyway, to fix the segfaults #907 (eventually it may be necessary to remove all CUDA API calls from destructors, if ever we need to put this back in) - in runTest.cc, complete a proff of concept for adding two separate tests (without/with multichannel #896) Fix some clang formatting issues with respect to the last gg_tt.mad
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[june24] regenerate gg_tt.mad, after including CODEGEN fixes from cla…
…ng PR #905, constexpr_math.h PR #908 and runTest/cudaDeviceReset PR #909 Add valgrind.h and its symlink in the repo for gg_tt.mad The new runTest.cc template now has a (commented out) proof of concept for including two tests (with/without multichannel) #896, I will resume from there After building bldall, the following succeeds for bck in none sse4 avx2 512y 512z cuda; do echo $bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done This instead is crashing (again?) for some AVX values for bck in none sse4 avx2 512y 512z cuda; do echo $bck; valgrind ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done On closer inspection, this is because valgrind does not support AVX512, so this is ok
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[june24] in gg_tt.mad, merge my previous attempts to add two tests wi…
…th/without multichannel #896 into the latest regenerated with fixes Revert "[june24] in gg_tt.mad, temporarely go back to the last code regeneration, removing the attempts to add two tests #896" This reverts commit 7ef597f. Fix conflicts: epochX/cudacpp/gg_tt.mad/SubProcesses/runTest.cc OK! Now the test runs, but nomultichannel succeeds, while multichannel fails as the reference ME is wrong! This is now back on track, must create a second reference file, then add the actual channelid filling of warps...
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Commits on Jul 15, 2024
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[june24] in gg_tt.mad runTest.cc, use <file.txt> as ref without multi…
…channel and <file.txt2> as ref with multichannel
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[june24] in gg_tt.mad, create new txt2 ref and recreate txt ref for r…
…unTest (use cuda/double as the reference platform) CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe Rerunning all tests then succeeds (but the channelid array is constant in all values for the moment...) for bck in none sse4 avx2 512y 512z cuda; do echo $bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done
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[june24] in CODEGEN (backport gg_tt.mad) runTest.cc, add two tests wi…
…th/without multichannel #896; use <file.txt> as ref without multichannel and <file.txt2> as ref with multichannel
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[june24] in CODEGEN for gg_tt.mad, create new txt2 ref #896 and recre…
…ate txt ref for runTest (use cuda/double as the reference platform) CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/ Rerunning all tests then succeeds (but the channelid array is constant in all values for the moment...)
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[june24] in gg_tt.mad, add CPPProcess::ndiagrams constexpr (e.g. for …
…channelid debugging)
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[june24] in CODEGEN (backport gg_tt.mad), add CPPProcess::ndiagrams c…
…onstexpr FIXME? #910 this is a third different expression for the number of diagrams, should sanity checks for internal consistency...
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[june24] in gg_tt.mad MEK, move ctor/dtor implementations from .h to …
….cc, move the dumpSignallingFPEs() call to the base clas dtor, add debug printouts commented out
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[june24] in CODEGEN (backport gg_tt.mad) MEK, move ctor/dtor implemen…
…tations from .h to .cc, move the dumpSignallingFPEs() call to the base clas dtor, add debug printouts commented out
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[june24] in gg_tt.mad MEK/cudacpp.mk/mgOnGpuConfig.h, add channelid d…
…ebug printouts if the code is compiled with 'make MG5AMC_CHANNELID_DEBUG=1' FIXME? Note that MEKDevice takes a device channelid array, it would be easier if this was always a host array and MEKD managed the copy?
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[june24] in CODEGEN (from gg_tt.mad) MEK/cudacpp.mk/mgOnGpuConfig.h, …
…add channelid debug printouts if the code is compiled with 'make MG5AMC_CHANNELID_DEBUG=1' FIXME? Note that MEKDevice takes a device channelid array, it would be easier if this was always a host array and MEKD managed the copy?
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[june24] in gg_tt.mad, modify the multichannel test #896 to use chann…
…els 1,2,3,1,2,3... for different events (previously it was 1 for all events) NB1: the cuda test now fails, the reference file must be recreated NB2: I expect the SIMD tests to fail using the CUDA reference, due to the different bugs in the current channelId implementation NB3: eventually #898 the implementation should enforce that all events in a warp use the same channelid
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[june24] in CODEGEN (backport gg_tt.mad) runTest.cc, modify the multi…
…channel test #896 to use channels 1,2,3,1,2,3... for different events (previously it was 1 for all events) NB1: the cuda test now fails, the reference file must be recreated NB2: I expect the SIMD tests to fail using the CUDA reference, due to the different bugs in the current channelId implementation NB3: eventually #898 the implementation should enforce that all events in a warp use the same channelid
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[june24] in CODEGEN and gg_tt.mad, create new txt2 ref #896 and recre…
…ate txt ref for runTest (use cuda/double as the reference platform) CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/ NB: the CUDA test succeeds with the new reference files, but the C++ multichannel test #896 fails due to bugs #894 and #899
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[june24] in gg_tt.mad and CODEGEN, add debug printouts to demonstrate…
… bug #899 make -j bldall -f cudacpp.mk for bck in none sse4 avx2 512y 512z cuda; do echo BACKEND=$bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done | egrep '(BACKEND|channelids_sv)' BACKEND=none channelids_sv 0 1 channelids_sv 1 1 channelids_sv 2 1 channelids_sv 3 1 channelids_sv 4 1 channelids_sv 5 1 channelids_sv 6 1 channelids_sv 7 1 channelids_sv 8 1 channelids_sv 9 1 channelids_sv 10 1 channelids_sv 11 1 channelids_sv 12 1 channelids_sv 13 1 channelids_sv 14 1 channelids_sv 15 1 BACKEND=sse4 channelids_sv 0 1 2 channelids_sv 2 1 2 channelids_sv 4 1 2 channelids_sv 6 1 2 channelids_sv 8 1 2 channelids_sv 10 1 2 channelids_sv 12 1 2 channelids_sv 14 1 2 BACKEND=avx2 channelids_sv 0 1 2 3 1 channelids_sv 4 1 2 3 1 channelids_sv 8 1 2 3 1 channelids_sv 12 1 2 3 1 BACKEND=512y channelids_sv 0 1 2 3 1 channelids_sv 4 1 2 3 1 channelids_sv 8 1 2 3 1 channelids_sv 12 1 2 3 1 BACKEND=512z channelids_sv 0 1 2 3 1 2 3 1 2 channelids_sv 8 1 2 3 1 2 3 1 2 BACKEND=cuda
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[june24] in gg_tt.mad and CODEGEN CPPProcess.cc, fix bug #899 by clea…
…nly separating allChannelIds and channelIds and adding a missing ieventAccessRecordConst call Also add the missing ieventAccessRecordConst function in MemoryAccessChannelIds.h and comment out unused non-const function kernelAccess The debug printouts show now that the issue is solved for bck in none sse4 avx2 512y 512z cuda; do echo BACKEND=$bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done | egrep '(BACKEND|channelids_sv)' BACKEND=none channelids_sv 0 1 channelids_sv 1 2 channelids_sv 2 3 channelids_sv 3 1 channelids_sv 4 2 channelids_sv 5 3 channelids_sv 6 1 channelids_sv 7 2 channelids_sv 8 3 channelids_sv 9 1 channelids_sv 10 2 channelids_sv 11 3 channelids_sv 12 1 channelids_sv 13 2 channelids_sv 14 3 channelids_sv 15 1 BACKEND=sse4 channelids_sv 0 1 2 channelids_sv 2 3 1 channelids_sv 4 2 3 channelids_sv 6 1 2 channelids_sv 8 3 1 channelids_sv 10 2 3 channelids_sv 12 1 2 channelids_sv 14 3 1 BACKEND=avx2 channelids_sv 0 1 2 3 1 channelids_sv 4 2 3 1 2 channelids_sv 8 3 1 2 3 channelids_sv 12 1 2 3 1 BACKEND=512y channelids_sv 0 1 2 3 1 channelids_sv 4 2 3 1 2 channelids_sv 8 3 1 2 3 channelids_sv 12 1 2 3 1 BACKEND=512z channelids_sv 0 1 2 3 1 2 3 1 2 channelids_sv 8 3 1 2 3 1 2 3 1 BACKEND=cuda NB: after fixing bug #899, the SIMD tests still fail because of bug #894 for bck in none sse4 avx2 512y 512z cuda; do echo BACKEND=$bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done | egrep '(BACKEND| ME |r.ME |In comparing)' BACKEND=none BACKEND=sse4 MadgraphTest.h:254: In comparing event 0 from iteration 0 ME 1.094026373218036e-01 r.ME 8.613813520483170e-02 BACKEND=avx2 MadgraphTest.h:254: In comparing event 0 from iteration 0 ME 1.914754413491214e-01 r.ME 8.613813520483170e-02 BACKEND=512y MadgraphTest.h:254: In comparing event 0 from iteration 0 ME 1.914754413491214e-01 r.ME 8.613813520483170e-02 BACKEND=512z MadgraphTest.h:254: In comparing event 0 from iteration 0 ME 1.972915668783644e-01 r.ME 8.613813520483170e-02 BACKEND=cuda
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[june24] in gg_tt.mad and CODEGEN, remove unused/unnecessary function…
…s in MemoryAccessChannelIds.h after fixing #899
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[june24] in gg_tt.mad and CODEGEN CPPProcess.cc, remove debug printou…
…ts for bug #899 after fixing the bug
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[june24] in gg_tt.mad and CODEGEN CPPProcess.cc, fix major bug #894 i…
…s SIMD handling of numertaors and denominators Now the tests #898 succeed when using channels123123123... for bck in none sse4 avx2 512y 512z cuda; do echo BACKEND=$bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done | egrep '(BACKEND| ME |r.ME> BACKEND=none BACKEND=sse4 BACKEND=avx2 BACKEND=512y BACKEND=512z BACKEND=cuda Note: the debug printout gives DEBUG: MEKB processed 512 events across 3 channels { 1 : 172, 2 : 170, 3 : 170 }
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[june24] in gg_tt.mad and CODEGEN CPPProcess.cc, implement sanity che…
…cks #898 that channelids are the same inside each warp As expected, the tests #898 using 123123123 etc fail the assertions for bck in none sse4 avx2 512y 512z cuda; do echo BACKEND=$bck; ./build.${bck}_d_inl0_hrd0/runTest_*.exe; done |& egrep '(BACKEND|Assert)' BACKEND=none BACKEND=sse4 runTest_cpp.exe: CPPProcess.cc:335: void mg5amcCpu::calculate_wavefunctions(int, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, mg5amcCpu::fptype_sv*, int): Assertion `channelId == channelIds_sv[i]' failed. BACKEND=avx2 runTest_cpp.exe: CPPProcess.cc:335: void mg5amcCpu::calculate_wavefunctions(int, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, mg5amcCpu::fptype_sv*, int): Assertion `channelId == channelIds_sv[i]' failed. BACKEND=512y runTest_cpp.exe: CPPProcess.cc:335: void mg5amcCpu::calculate_wavefunctions(int, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, mg5amcCpu::fptype_sv*, int): Assertion `channelId == channelIds_sv[i]' failed. BACKEND=512z runTest_cpp.exe: CPPProcess.cc:335: void mg5amcCpu::calculate_wavefunctions(int, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, mg5amcCpu::fptype_sv*, int): Assertion `channelId == channelIds_sv[i]' failed. BACKEND=cuda
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[june24] in CODEGEN and gg_tt.mad runTest.cc, modify the multichannel…
… test #896 to use channels 1,2,3,1,2,3... for different WARPS of 32 events NB: the cuda test now fails, the reference file must be recreated
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[june24] in CODEGEN and gg_tt.mad, create new txt2 ref #896 and recre…
…ate txt ref for runTest (use cuda/double as the reference platform) CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/ Note: the debug printout is now the following, all multiples of 32 DEBUG: MEKB processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 }
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[june24] regenerate gg_tt.mad after implementing sanity checks #898, …
…check all is ok
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Commits on Jul 16, 2024
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[june24] in gg_tt.mad and CODEGEN, simplify CPPProcess.cc exploiting …
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[june24] regenerate all processes with the new implementation of chan…
…nelids - add new files for d in $(git ls-tree --name-only HEAD *.mad *.sa); do \ git add $d/SubProcesses/MemoryAccessChannelIds.h $d/SubProcesses/P*/MemoryAccessChannelIds.h \ $d/SubProcesses/valgrind.h $d/SubProcesses/P*/valgrind.h; done
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[june24] add a CODEGEN/recreateRefs.sh script to recreate the txt/txt…
…2 reference logs for all processes (from cuda)
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[june24] update txt reference logs and add txt2 reference ogs #898 fo…
…r all processes (using the CODEGEN/recreateRefs.sh script) Note: some processes fail (some of the fixes in upstream/master may be needed...) [ RUN ] SIGMA_SM_GG_TTXGG_GPU_MULTICHANNEL.compareMomAndME DEBUG: MatrixElementKernelDevice::computeMatrixElements 0x1420650 T 256 runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. [ RUN ] SIGMA_SM_GG_TTXGGG_GPU_MULTICHANNEL.compareMomAndME DEBUG: MatrixElementKernelDevice::computeMatrixElements 0x3a1fe00 T 256 runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. [----------] 1 test from SIGMA_SM_GG_TTXGG_GPU_MULTICHANNEL [ RUN ] SIGMA_SM_GG_TTXGG_GPU_MULTICHANNEL.compareMomAndME DEBUG: MatrixElementKernelDevice::computeMatrixElements 0x15e77f0 T 256 runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed.
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[june24] upgrade mg5amcnlo from 434b4a700 (previous valassi_gpucpp_ju…
…ne24) to 6c7fda883 (current valassi_gpucpp_june24 including merge of current gpucpp) Note: what remains to be done is to include the changes in gpucpp_june24 that are not yet used by master_june24 (see #886)
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[june24] regenerate all processes - MG5AMC update only changed restor…
…e_data, txt ref files also changes in .sa processes (and add .txt2 in .sa even if not strcictly needed)
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[june24] progress towards merging upstream/master into june24: prepar…
…e to merge the valgrind branch, checkout all .mad but gg_tt.mad for d in $(git ls-tree --name-only HEAD *.mad | grep -v ^gg_tt.mad); do git checkout valgrind $d; done
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Merge branch 'valgrind' into june24
Fix conflicts: MG5aMC/mg5amcnlo (git add ../../MG5aMC/mg5amcnlo) epochX/cudacpp/gg_tt.mad/SubProcesses/reweight.f (use Olivier's latest MG5AMC fix)
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Merge remote-tracking branch 'actions' into june24
Fix conflicts (use current june24, which was synced wfrom upstream/master and is more recent: git checkout june24 ../../.github) .github/workflows/testsuite_oneprocess.sh .github/workflows/testsuite_oneprocess.yml No need to regenerate, this only changed tmad and .github
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[june24] progress towards merging upstream/master into june24: prepar…
…e to merge the tmad branch, checkout CODEGEN and tmad logs from tmad for d in $(git ls-tree --name-only HEAD cudacpp/*/CODEGEN*txt cudacpp/tmad); do git checkout tmad $d; done
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Merge branch 'tmad' into june24
Fix conflicts: .github/workflows/testsuite_oneprocess.sh (keep june24 version: git checkout june24 ../../.github/) MG5aMC/mg5amcnlo (keep june24 version: git add ../../MG5aMC/mg5amcnlo)
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[june24] progress towards merging upstream/master into june24: prepar…
…e to merge the color2 branch, checkout all .sa (and gg_tt.mad CODEGEN log) from color2 for d in $(git ls-tree --name-only HEAD *.sa); do git checkout color2 $d; done for d in $(git ls-tree --name-only HEAD gg_tt.mad/CODEGEN*); do git checkout color2 $d; done
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Commits on Jul 17, 2024
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Merge branch 'color2' into june24
Fix conflicts: MG5aMC/mg5amcnlo (keep june24 version: git add ../../MG5aMC/mg5amcnlo) epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/madgraph/iolibs/template_files/gpu/process_sigmaKin_function.inc epochX/cudacpp/gg_tt.mad/SubProcesses/P1_gg_ttx/CPPProcess.cc epochX/cudacpp/gg_tt.mad/SubProcesses/P1_gg_ttx/coloramps.h
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Merge branch 'omp' into june24
Fix conflicts (use june24 versions in all cases: ignore omp/clang lines in cudacpp.mk, these will be merged from omp/clang branches later on) epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/madgraph/iolibs/template_files/gpu/cudacpp.mk epochX/cudacpp/gg_tt.mad/CODEGEN_mad_gg_tt_log.txt epochX/cudacpp/gg_tt.mad/SubProcesses/cudacpp.mk
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Merge branch 'submod' into june24
Fix conflicts (keep the june24 version of MG5AMC as this already includes the merge of gpucpp into valassi_gpucpp_june24 MG5aMC/mg5amcnlo (git add ../../MG5aMC/mg5amcnlo) epochX/cudacpp/gg_tt.mad/CODEGEN_mad_gg_tt_log.txt (git checkout june24 gg_tt.mad/CODEGEN_mad_gg_tt_log.txt)
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Merge remote-tracking branch 'upstream/master' into june24
Fix conflicts (keep the june24 of runTest.cc, including two tests without/with multichannel) epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/madgraph/iolibs/template_files/gpu/runTest.cc epochX/cudacpp/gg_tt.mad/SubProcesses/runTest.cc
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[june24] regenerate gg_tt.mad after merging upstream/master, check al…
…l is ok, no changes
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[june24] in CODEGEN and gg_tt.mad runTest.cc, instantiate test2 first…
… and test1 second to ensure that the channelid printout comes from test1 first
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[june24] in CODEGEN and gg_tt.mad MatrixElementKernels.cc, improve th…
…e channelid debug printouts
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[june24] regenerate all processes after completing the merge of maste…
…r into the modified master_june24
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[june24] modify CODEGEN/recreateRefs.sh to recreate txt/txt2 for gg_t…
…t and gg_ttg, but this was not needed...
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[june24] in CODEGEN/recreateRefs.sh undo the previous changes but kee…
…p some debug printouts
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[june24] in .github/workflows/testsuite_oneprocess.sh, replace OMPFLA…
…GS by USEOPENMP (keep OMP disabled byut add the option to enable it)
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[june24] in .github/workflows/testsuite_oneprocess.sh, export MG5AMC_…
…CHANNELID_DEBUG=1 to debug channelid in MatrixElementKernelBase
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[omp/june24] in gg_tt.mad makefile, as done in cudacpp.mk #758, disab…
…le OpenMP by default unless USEOPENMP=1
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[omp/june24] in CODEGEN, recreate patches from gg_tt.mad
./CODEGEN/generateAndCompare.sh gg_tt --mad --nopatch git diff --no-ext-diff -R gg_tt.mad/Source/makefile gg_tt.mad/Source/dsample.f gg_tt.mad/Source/genps.inc gg_tt.mad/SubProcesses/makefile > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/bin/internal/banner.py gg_tt.mad/bin/internal/gen_ximprove.py gg_tt.mad/bin/internal/madevent_interface.py >> CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/SubProcesses/P1_gg_ttx/auto_dsig1.f gg_tt.mad/SubProcesses/P1_gg_ttx/driver.f gg_tt.mad/SubProcesses/P1_gg_ttx/matrix1.f > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 git checkout gg_tt.mad
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[june24] in tput/throughputX.sh, replace OMPFLAGS by USEOPENMP #758 (…
…keep OMP disabled but add the option to enable it)
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[june24] in tput/throughputX.sh, export MG5AMC_CHANNELID_DEBUG=1 to d…
…ebug channelid in MatrixElementKernelBase
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[june24] first attempt to run all tput tests - many failures in GPU t…
…ests STARTED AT Wed Jul 17 01:07:19 PM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Wed Jul 17 02:54:54 PM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Wed Jul 17 03:10:55 PM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Wed Jul 17 03:16:02 PM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Wed Jul 17 03:17:40 PM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Wed Jul 17 03:19:15 PM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Wed Jul 17 03:20:54 PM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean ENDED(7) AT Wed Jul 17 03:49:01 PM CEST 2024 [Status=2] ./tput/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0_bridge.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0_bridge.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0_common.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0_curhst.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl1_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl1_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl1_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0_curhst.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0_bridge.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl1_hrd0.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd1.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0_bridge.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0_rmbhst.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0_rmbhst.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed. ./tput/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0_common.txt:runTest_cuda.exe: GpuRuntime.h:26: void assertGpu(cudaError_t, const char*, int, bool): Assertion `code == gpuSuccess' failed.
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[june24] in CODEGEN, clean formatting of output.py (remove trailing s…
…paces and too many empty lines)
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[june24] in CODEGEN, add copyright to smatrix_multi.f and improve com…
…ments when inserting into auto_dsig1.f
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[june24] in gg_tt.mad CPPProcess.cc and Bridge.h, debug channelID==0 …
…in sigmaKin...? (This is from a cppnone build) ./madevent_cpp < /tmp/avalassi/input_ggtt_x1_cudacpp ... DEBUG Bridge::cpu_sequence channelIds=0x47c1c4, nevt=64 DEBUG: channelIds[0..nevt]={0, 16, 1, 0, 0, 0, 0, 2, 2, 2, 2, 4294967295, 4294967295, 4294967295, 1, 4294967295, 4294967295, 4294967295, 4294967295, 4294967295, 4294967295, 1, 1, 4294967295, 4294967295, 1, 4294967295, 4294967295, 1, 4294967295, 1, 4294967295, 1, 4294967295, 4294967295, 4294967295, 1, 1, 1, 4294967295, 1, 1, 4294967295, 1, 4294967295, 4294967295, 1, 1, 4294967295, 4294967295, 4294967295, 1, 4294967295, 1, 1, 1, 4294967295, 1, 4294967295, 1, 1, 4294967295, 1, 1 } INTERNAL ERROR! channelId == 0? DEBUG: allChannelIds=0x63f0480, nevt=64 DEBUG: allChannelIds[0..nevt]={0, 16, 1, 0, 0, 0, 0, 2, 2, 2, 2, 4294967295, 4294967295, 4294967295, 1, 4294967295, 4294967295, 4294967295, 4294967295, 4294967295, 4294967295, 1, 1, 4294967295, 4294967295, 1, 4294967295, 4294967295, 1, 4294967295, 1, 4294967295, 1, 4294967295, 4294967295, 4294967295, 1, 1, 1, 4294967295, 1, 1, 4294967295, 1, 4294967295, 4294967295, 1, 1, 4294967295, 4294967295, 4294967295, 1, 4294967295, 1, 1, 1, 4294967295, 1, 4294967295, 1, 1, 4294967295, 1, 1 } madevent_cpp: CPPProcess.cc:1096: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId > 0' failed.
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[june24] in gg_tt.mad and CODEGEN auto_dsig1.f, #914 add back FBRIDGE…
…SEQUENCE_NOMULTICHANNEL and replace CHANNELS(1) by CHANNELS in FBRIDGESEQUENCE call Compilation fails: there is a bug in fbridge.inc #916 gfortran -w -fPIC -O3 -ffast-math -fbounds-check -ffixed-line-length-132 -w -cpp -c -DMG5AMC_MEEXPORTER_CUDACPP auto_dsig1.f -I../../Source/ -o auto_dsig1_cudacpp.o auto_dsig1.f:612:32: 612 | & HEL_RAND, COL_RAND, CHANNELS, OUT2, | 1 Error: Rank mismatch in argument ‘chanid’ at (1) (scalar and rank-1)
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[june24] in gg_tt.mad and CODEGEN fbridge.inc, #916, fix the interfac…
…e of the fbridgesequence call in Fortran to accept channelid arrays In fbridge.cc, improve the comment and variable names (channelIds is a ponter like all others) Now madevent completes successfullly and prints out a cross section DEBUG: MEK 0x6dc99a0 processed 8320 events across 3 channels { 0 : 64, 1 : 8256 }
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[june24] in gg_tt.mad, remove temporary debug printouts in CPPProcess…
….cc and Bridge.h Revert "[june24] in gg_tt.mad CPPProcess.cc and Bridge.h, debug channelID==0 in sigmaKin...?" This reverts commit 19105b6.
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[june24] in gg_tt.mad MEK and runTest.cc, improve the debug printout …
…for MEK channelid processing (less verbose, add a tag)
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[june24] update MG5AMC, to implement nb_warp_used #885 and #765 in au…
…to_dsig.f and auto_dsig1.f,
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[june24] regenerate gg_tt.mad after implementing nb_warp_used #885 and …
…#765, all ok no change
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[june24] in gg_ttgg.mad and CODEGEN CPPProcess.cc, add a sanity check…
… that iconfig>0 (turn the segfault #917 into an assert)
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[june24] in gg_ttgg.mad and CODEGEN coloramps.h, add a constexpr ncon…
…figSDE #917 (Previously I had throught of adding it as CPPProcess::nconfig, but this is slightly more complex to code-generate)
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[june24] in gg_ttgg.mad and CODEGEN runTest.cc, use only channels wit…
…h an associated iconfig in the multichannel test #917 This builds in C++ but gives a warning in CUDA ccache /usr/local/cuda-12.0/bin/nvcc -I. -I../../src -I../../../../../test/googletest/install_gcc11.3.1/include -I../../../../../test/googletest/install_gcc11.3.1/include -Xcompiler -g -Xcompiler -O0 -gencode arch=compute_70,code=compute_70 -gencode arch=compute_70,code=sm_70 -G -use_fast_math -Xcompiler -Wunused-parameter -I/usr/local/cuda-12.0/include/ -DUSE_NVTX -std=c++17 -ccbin /usr/lib64/ccache/g++ -DMGONGPU_FPTYPE_DOUBLE -DMGONGPU_FPTYPE2_DOUBLE -Xcompiler -fPIC -DMGONGPU_CHANNELID_DEBUG -c -x cu runTest.cc -o runTest_cuda.o runTest.cc(61): warning #20091-D: a __device__ variable "mgOnGpu::channel2iconfig" cannot be directly read in a host function Remark: The warnings can be suppressed with "-diag-suppress <warning-number>"
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[june24] in gg_ttgg.mad and CODEGEN runTest.cc and coloramps.h, fix c…
…uda builds #917 by adding a second copy of the channel2iconfig array on the host This is quite ugly, a better solution could eventually be implemented using a single host instance with a cudaMemCpyToSymbol?
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[june24] in gg_ttgg.mad and CODEGEN, recreate the txt2 reference log …
…after fixing the segfault #917 in runTest CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref
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[june24] regenerate gg_ttggg.mad with all recent fixes including #917,…
… will now be able to regenerate the txt2 file However, this fails at runtime: - in C++, "runTest.cc:67: Assertion `channelId > 0' failed" - in CUDA, "iconfig=1, channelId=4528" while "iconfig=2, channelId=2"?
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[june24] in gg_ttgg.sa and CODEGEN runTest.cc, add fixes for sa build…
…s (coloramps.h is missing)
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[june24] in gg_ttggg.mad runTest.cc, add some debug printouts of chan…
…nel tests... this points to bug #919
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[june24] regenerate gg_ttggg.mad, this adds the coloramps.h header fi…
…x for .sa and removes the debug printouts
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[june24] in gg_ttggg.mad and CODEGEN runTest.cc, fix #920 (start idia…
…gram loop at 0) and work around #919 (loop until nchannels, not ndiagrams) The test now proceeds without asserts in cppnone but needs a new reference txt2, will create it on a cuda build
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[june24] in CODEGEN generateAndCompare.sh, go back to WARP_SIZE=32 an…
…d NB_WARP=512 (total 16384) after fixing the crash #885
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[june24] at last, rerun a gg_tt tmad test and this succeeds normally …
…(after fixing #885 for NB_WARP_USED) ./tmad/teeMadX.sh -ggtt +10x
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[june24] in gg_ttggg.mad and CODEGEN, recreate the txt2 reference log…
… after fixing the assert #920 in runTest CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref
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[june24] in tmad/madX.sh, export MG5AMC_CHANNELID_DEBUG=1 to debug ch…
…annelid in MatrixElementKernelBase, and replace OMPFLAGS by USEOPENMP #758
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Commits on Jul 18, 2024
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[june24] regenerate all processes after fixes for #917 #920 and more …
…- will rerun the CI and all manual tests
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[june24] next attempt to run all tput tests - much better, but a few …
…issues remain STARTED AT Thu Jul 18 01:32:29 AM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Thu Jul 18 03:05:32 AM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Thu Jul 18 03:22:07 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Thu Jul 18 03:29:29 AM CEST 2024 [Status=2] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Thu Jul 18 03:31:45 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Thu Jul 18 03:33:58 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Thu Jul 18 03:36:17 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean ENDED(7) AT Thu Jul 18 03:54:13 AM CEST 2024 [Status=2] Note: the PASSED tag has disappeared (since a while), the throughputX.sh script must be fixed #922
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[june24] next attempt to run all tmad tests - this seems as good as m…
…aster now? Note: a printout from MEK about the channels has to be added STARTED AT Thu Jul 18 03:54:13 AM CEST 2024 (SM tests) ENDED(1) AT Thu Jul 18 08:18:13 AM CEST 2024 [Status=0] (BSM tests) ENDED(1) AT Thu Jul 18 08:26:52 AM CEST 2024 [Status=0] 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt
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[june24/gtest] bug fix in tput/throughputX.sh, distinguish between ex…
…e variables in main sequence and inside functions
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[june24] in gg_tt.mad (on LUMI) and CODEGEN, replace __CUDACC_ to sup…
…port HIP where relevant (#893), add a comment elsewhere when __CUDACC is needed
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[june24] in gg_ttg.mad, recreate the txt and txt2 reference logs afte…
…r fixing various issues #922 CUDACPP_RUNTEST_DUMPEVENTS=1 ./runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref
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[june24] in CODEGEN MatrixElementKernels.cc, further reduce verbosity…
… of MEK channelid debugging
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[june24] in tmad/allTees.sh, print out a summary of the MEK channelid…
… debugging at the end Presently this gives the following scrdir=$(pwd)/tmad \grep MEK ${scrdir}/logs_*/* | sed "s|${scrdir}/logs_||" | sed 's|_mad.*DEBUG:||' | awk '{$3=""; print $0}' | sed 's|MEK |MEK|' | sort -u eemumu MEK processed 16384 events across 2 channels { no-multichannel : 8192, 1 : 8192 } eemumu MEK processed 98304 events across 2 channels { no-multichannel : 8192, 1 : 90112 } ggttggg MEK processed 16384 events across 1240 channels { no-multichannel : 8192, 1 : 8192 } ggttggg MEK processed 98304 events across 1240 channels { no-multichannel : 8192, 1 : 90112 } ggttgg MEK processed 16384 events across 123 channels { no-multichannel : 8192, 112 : 8192 } ggttgg MEK processed 98304 events across 123 channels { no-multichannel : 8192, 112 : 90112 } ggttg MEK processed 16384 events across 16 channels { no-multichannel : 8192, 1 : 8192 } ggttg MEK processed 98304 events across 16 channels { no-multichannel : 8192, 1 : 90112 } ggtt MEK processed 16384 events across 3 channels { no-multichannel : 8192, 1 : 8192 } ggtt MEK processed 98304 events across 3 channels { no-multichannel : 8192, 1 : 90112 } gqttq MEK processed 16384 events across 5 channels { no-multichannel : 8192, 1 : 8192 } gqttq MEK processed 98304 events across 5 channels { no-multichannel : 8192, 1 : 90112 } heftggbb MEK processed 16384 events across 4 channels { no-multichannel : 8192, 1 : 8192 } heftggbb MEK processed 98304 events across 4 channels { no-multichannel : 8192, 1 : 90112 } smeftggtttt MEK processed 16384 events across 72 channels { no-multichannel : 8192, 1 : 8192 } smeftggtttt MEK processed 98304 events across 72 channels { no-multichannel : 8192, 1 : 90112 } susyggtt MEK processed 16384 events across 3 channels { no-multichannel : 8192, 1 : 8192 } susyggtt MEK processed 98304 events across 3 channels { no-multichannel : 8192, 1 : 90112 }
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[june24] in gg_tt01g.mad, pp_tt012j.mad, susy_gg_t1t1.mad and CODEGEN…
…, recreate txt/txt2 ref logs using the ./CODEGEN/recreateRefs.sh script
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[june24] in gg_tt.mad and CODEGEN MemoryBuffers.h, fix the comments a…
…bout channelId memory buffers...........
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[june24] regenerate all processes (then also recreated all refs, but …
…there was no change)
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Commits on Jul 19, 2024
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[june24] rerun all tput tests on itscrd90 - finally all ok in the jun…
…e24 branch STARTED AT Thu Jul 18 09:46:41 PM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Thu Jul 18 11:31:39 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Thu Jul 18 11:50:56 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Thu Jul 18 11:58:49 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Fri Jul 19 12:01:04 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Fri Jul 19 12:03:16 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Fri Jul 19 12:05:34 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean ENDED(7) AT Fri Jul 19 12:32:54 AM CEST 2024 [Status=0] No errors found in logs eemumu MEK (channelid array) processed 512 events across 2 channels { 1 : 256, 2 : 256 } eemumu MEK (no multichannel) processed 512 events across 2 channels { no-multichannel : 512 } ggttggg MEK (channelid array) processed 512 events across 1240 channels { 1 : 32, 2 : 32, 4 : 32, 5 : 32, 7 : 32, 8 : 32, 14 : 32, 15 : 32, 16 : 32, 18 : 32, 19 : 32, 20 : 32, 22 : 32, 23 : 32, 24 : 32, 26 : 32 } ggttggg MEK (no multichannel) processed 512 events across 1240 channels { no-multichannel : 512 } ggttgg MEK (channelid array) processed 512 events across 123 channels { 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32, 16 : 32, 17 : 32 } ggttgg MEK (no multichannel) processed 512 events across 123 channels { no-multichannel : 512 } ggttg MEK (channelid array) processed 512 events across 16 channels { 1 : 64, 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32 } ggttg MEK (no multichannel) processed 512 events across 16 channels { no-multichannel : 512 } ggtt MEK (channelid array) processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 } ggtt MEK (no multichannel) processed 512 events across 3 channels { no-multichannel : 512 } gqttq MEK (channelid array) processed 512 events across 5 channels { 1 : 128, 2 : 96, 3 : 96, 4 : 96, 5 : 96 } gqttq MEK (no multichannel) processed 512 events across 5 channels { no-multichannel : 512 } heftggbb MEK (channelid array) processed 512 events across 4 channels { 1 : 128, 2 : 128, 3 : 128, 4 : 128 } heftggbb MEK (no multichannel) processed 512 events across 4 channels { no-multichannel : 512 } smeftggtttt MEK (channelid array) processed 512 events across 72 channels { 1 : 32, 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32, 16 : 32 } smeftggtttt MEK (no multichannel) processed 512 events across 72 channels { no-multichannel : 512 } susyggt1t1 MEK (channelid array) processed 512 events across 6 channels { 2 : 128, 3 : 96, 4 : 96, 5 : 96, 6 : 96 } susyggt1t1 MEK (no multichannel) processed 512 events across 6 channels { no-multichannel : 512 } susyggtt MEK (channelid array) processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 } susyggtt MEK (no multichannel) processed 512 events across 3 channels { no-multichannel : 512 }
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[june24] rerun all tmad test on itscrd90 in the june24 branch - every…
…thing looks as expected STARTED AT Fri Jul 19 12:32:54 AM CEST 2024 (SM tests) ENDED(1) AT Fri Jul 19 04:55:08 AM CEST 2024 [Status=0] (BSM tests) ENDED(1) AT Fri Jul 19 05:03:44 AM CEST 2024 [Status=0] 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt eemumu MEK processed 16384 events across 2 channels { no-multichannel : 8192, 1 : 8192 } eemumu MEK processed 98304 events across 2 channels { no-multichannel : 8192, 1 : 90112 } ggttggg MEK processed 16384 events across 1240 channels { no-multichannel : 8192, 1 : 8192 } ggttggg MEK processed 98304 events across 1240 channels { no-multichannel : 8192, 1 : 90112 } ggttgg MEK processed 16384 events across 123 channels { no-multichannel : 8192, 112 : 8192 } ggttgg MEK processed 98304 events across 123 channels { no-multichannel : 8192, 112 : 90112 } ggttg MEK processed 16384 events across 16 channels { no-multichannel : 8192, 1 : 8192 } ggttg MEK processed 98304 events across 16 channels { no-multichannel : 8192, 1 : 90112 } ggtt MEK processed 16384 events across 3 channels { no-multichannel : 8192, 1 : 8192 } ggtt MEK processed 98304 events across 3 channels { no-multichannel : 8192, 1 : 90112 } gqttq MEK processed 16384 events across 5 channels { no-multichannel : 8192, 1 : 8192 } gqttq MEK processed 98304 events across 5 channels { no-multichannel : 8192, 1 : 90112 } heftggbb MEK processed 16384 events across 4 channels { no-multichannel : 8192, 1 : 8192 } heftggbb MEK processed 98304 events across 4 channels { no-multichannel : 8192, 1 : 90112 } smeftggtttt MEK processed 16384 events across 72 channels { no-multichannel : 8192, 1 : 8192 } smeftggtttt MEK processed 98304 events across 72 channels { no-multichannel : 8192, 1 : 90112 } susyggtt MEK processed 16384 events across 3 channels { no-multichannel : 8192, 1 : 8192 } susyggtt MEK processed 98304 events across 3 channels { no-multichannel : 8192, 1 : 90112 }
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[june24] in gg_tt.mad and CODEGEN, MadgraphTest.h and runTest.cc, add…
… comparison of selected helicity and color #925
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[june24] in gg_tt.mad and CODEGEN, create new reference files includi…
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[june24] in gg_tt.mad and CODEGEN runTest.cc, turn off debugging unle…
…ss CUDACPP_RUNTEST_DEBUG is set
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[june24] in gg_tt.mad and CODEGEN runTest.cc, TEMPORARELY move to war…
…pSize=4 and run some tests - recreate the ref with cuda first Then execute the following test #924 make -j bldall -f cudacpp.mk FPTYPE=m make -j bldall -f cudacpp.mk FPTYPE=f make -j bldall -f cudacpp.mk FPTYPE=d for fp in d f m; do for bck in none sse4 avx2 512y 512z cuda; do \ echo $fp $bck; ./build.${bck}_${fp}_inl0_hrd0/runTest_*.exe |& \egrep '(PASS|FAILED TEST|Assert)'; done ; done This gives the following d none [ PASSED ] 4 tests. d sse4 [ PASSED ] 4 tests. d avx2 [ PASSED ] 4 tests. d 512y [ PASSED ] 4 tests. d 512z runTest_cpp.exe: CPPProcess.cc:1101: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. d cuda [ PASSED ] 4 tests. f none [ PASSED ] 4 tests. f sse4 [ PASSED ] 4 tests. f avx2 runTest_cpp.exe: CPPProcess.cc:1101: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. f 512y runTest_cpp.exe: CPPProcess.cc:1101: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. f 512z runTest_cpp.exe: CPPProcess.cc:1101: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. f cuda [ PASSED ] 4 tests. m none [ PASSED ] 4 tests. m sse4 [ PASSED ] 4 tests. m avx2 [ PASSED ] 3 tests. 1 FAILED TEST m 512y [ PASSED ] 3 tests. 1 FAILED TEST m 512z runTest_cpp.exe: CPPProcess.cc:1101: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. m cuda [ PASSED ] 4 tests.
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[june24] in gg_tt.mad and CODEGEN CPPProcess.cc, in mixed mode check …
…that the 2nd neppV vector has the same channelId as the 1st SIMD vector #924 (Note that calculate_wavefunction is called only once for the two vectors using a single channelId) The previous TEMPORARY test with warp_size=4 now makes much more sense #924 In mixed mode, avx2 and 512y now throw an assertion (a different one, checking that the 2md vector has the same channelId as the 1st one) for fp in d f m; do for bck in none sse4 avx2 512y 512z cuda; do echo =============== $fp $bck; ./build.${bck}_${fp}_inl0_hrd0/runTest_*.exe |& \egrep '(PASS|FAILED TEST|Assert)'; done ; done =============== d none [ PASSED ] 4 tests. =============== d sse4 [ PASSED ] 4 tests. =============== d avx2 [ PASSED ] 4 tests. =============== d 512y [ PASSED ] 4 tests. =============== d 512z runTest_cpp.exe: CPPProcess.cc:1103: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. =============== d cuda [ PASSED ] 4 tests. =============== f none [ PASSED ] 4 tests. =============== f sse4 [ PASSED ] 4 tests. =============== f avx2 runTest_cpp.exe: CPPProcess.cc:1103: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. =============== f 512y runTest_cpp.exe: CPPProcess.cc:1103: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. =============== f 512z runTest_cpp.exe: CPPProcess.cc:1103: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. =============== f cuda [ PASSED ] 4 tests. =============== m none [ PASSED ] 4 tests. =============== m sse4 [ PASSED ] 4 tests. =============== m avx2 runTest_cpp.exe: CPPProcess.cc:1114: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds2_v[i]' failed. =============== m 512y runTest_cpp.exe: CPPProcess.cc:1114: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds2_v[i]' failed. =============== m 512z runTest_cpp.exe: CPPProcess.cc:1103: void mg5amcCpu::sigmaKin(const fptype*, const fptype*, const fptype*, const fptype*, mgOnGpu::fptype*, const unsigned int*, mgOnGpu::fptype*, mgOnGpu::fptype*, int*, int*, int): Assertion `channelId == channelIds_sv[i]' failed. =============== m cuda [ PASSED ] 4 tests.
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[june24] in gg_tt.mad and CODEGEN runTest.cc, go back to warpSize=32 …
…and to the previous relevant ref log (I also recreated the relevant reflog with cuda using the latest code, but there was no change) Revert "[june24] in gg_tt.mad and CODEGEN runTest.cc, TEMPORARELY move to warpSize=4 and run some tests - recreate the ref with cuda first" This reverts commit a398b7b.
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[june24] recreate reference logs for all processes (now including sel…
…hel and selcol #925) ./CODEGEN/recreateRefs.sh
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[june24] regenerate all processes again, now with new reflogs propaga…
…ted to the .sa processes
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[june24] in gg_tt.mad, temporarely go back to an older commit, to lat…
…er show an old WIP related to #926 git checkout 8ba0ceb9b7fabf54d220c6c7c19137f8e65f9998 gg_tt.mad/SubProcesses/P1_gg_ttx/CPPProcess.cc
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[june24] in gg_tt.mad CPPProcess.cc #924, determine a second channelI…
…d in the second event page... but calculate_wavefunction is called only once? (PS This was WIP under assumptions similar to #926, i.e. allowing two neppV vectors with different channels)
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[june24] in gg_tt.mad, undo the previous two commits: this shows the …
…difference to a partial implementation of #926 (determine two channelIds, then should add a second argument to calculate_wavefunction) Revert "[june24] in gg_tt.mad CPPProcess.cc #924, determine a second channelId in the second event page... but calculate_wavefunction is called only once?" This reverts commit ca7375d. Revert "[june24] in gg_tt.mad, temporarely go back to an older commit, to later show an old WIP related to #926" This reverts commit 7997296.
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[june24] in gg_tt.mad try to remove the hack in counters.cc #891, but…
… this still crashes - will need to revert ./tmad/teeMadX.sh -ggtt -makeclean
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[june24] TEMPORARELY add back (again) the hack in counters.cc, while …
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Commits on Jul 22, 2024
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[june24] rerun 102 tput tests on itgold91, all ok
STARTED AT Sun Jul 21 09:21:49 PM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Sun Jul 21 09:46:08 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Sun Jul 21 09:55:02 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Sun Jul 21 09:59:47 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Sun Jul 21 10:01:15 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Sun Jul 21 10:01:29 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Sun Jul 21 10:02:57 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean ENDED(7) AT Sun Jul 21 10:14:02 PM CEST 2024 [Status=0] No errors found in logs eemumu MEK (channelid array) processed 512 events across 2 channels { 1 : 256, 2 : 256 } eemumu MEK (no multichannel) processed 512 events across 2 channels { no-multichannel : 512 } ggttggg MEK (channelid array) processed 512 events across 1240 channels { 1 : 32, 2 : 32, 4 : 32, 5 : 32, 7 : 32, 8 : 32, 14 : 32, 15 : 32, 16 : 32, 18 : 32, 19 : 32, 20 : 32, 22 : 32, 23 : 32, 24 : 32, 26 : 32 } ggttggg MEK (no multichannel) processed 512 events across 1240 channels { no-multichannel : 512 } ggttgg MEK (channelid array) processed 512 events across 123 channels { 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32, 16 : 32, 17 : 32 } ggttgg MEK (no multichannel) processed 512 events across 123 channels { no-multichannel : 512 } ggttg MEK (channelid array) processed 512 events across 16 channels { 1 : 64, 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32 } ggttg MEK (no multichannel) processed 512 events across 16 channels { no-multichannel : 512 } ggtt MEK (channelid array) processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 } ggtt MEK (no multichannel) processed 512 events across 3 channels { no-multichannel : 512 } gqttq MEK (channelid array) processed 512 events across 5 channels { 1 : 128, 2 : 96, 3 : 96, 4 : 96, 5 : 96 } gqttq MEK (no multichannel) processed 512 events across 5 channels { no-multichannel : 512 } heftggbb MEK (channelid array) processed 512 events across 4 channels { 1 : 128, 2 : 128, 3 : 128, 4 : 128 } heftggbb MEK (no multichannel) processed 512 events across 4 channels { no-multichannel : 512 } smeftggtttt MEK (channelid array) processed 512 events across 72 channels { 1 : 32, 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32, 16 : 32 } smeftggtttt MEK (no multichannel) processed 512 events across 72 channels { no-multichannel : 512 } susyggt1t1 MEK (channelid array) processed 512 events across 6 channels { 2 : 128, 3 : 96, 4 : 96, 5 : 96, 6 : 96 } susyggt1t1 MEK (no multichannel) processed 512 events across 6 channels { no-multichannel : 512 } susyggtt MEK (channelid array) processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 } susyggtt MEK (no multichannel) processed 512 events across 3 channels { no-multichannel : 512 }
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[june24] rerun 30 tmad tests on itgold91, all as expected
Note, with respect to the last run 7bfe75c - susy_gg_tt tmad has been fixed #825 - there is an extra Fortran MEs 0s printout related to #891 STARTED AT Sun Jul 21 10:14:02 PM CEST 2024 (SM tests) ENDED(1) AT Mon Jul 22 01:41:40 AM CEST 2024 [Status=0] (BSM tests) ENDED(1) AT Mon Jul 22 01:47:09 AM CEST 2024 [Status=0] 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt eemumu MEK processed 16384 events across 2 channels { no-multichannel : 8192, 1 : 8192 } eemumu MEK processed 98304 events across 2 channels { no-multichannel : 8192, 1 : 90112 } ggttggg MEK processed 16384 events across 1240 channels { no-multichannel : 8192, 1 : 8192 } ggttggg MEK processed 98304 events across 1240 channels { no-multichannel : 8192, 1 : 90112 } ggttgg MEK processed 16384 events across 123 channels { no-multichannel : 8192, 112 : 8192 } ggttgg MEK processed 98304 events across 123 channels { no-multichannel : 8192, 112 : 90112 } ggttg MEK processed 16384 events across 16 channels { no-multichannel : 8192, 1 : 8192 } ggttg MEK processed 98304 events across 16 channels { no-multichannel : 8192, 1 : 90112 } ggtt MEK processed 16384 events across 3 channels { no-multichannel : 8192, 1 : 8192 } ggtt MEK processed 98304 events across 3 channels { no-multichannel : 8192, 1 : 90112 } gqttq MEK processed 16384 events across 5 channels { no-multichannel : 8192, 1 : 8192 } gqttq MEK processed 98304 events across 5 channels { no-multichannel : 8192, 1 : 90112 } heftggbb MEK processed 16384 events across 4 channels { no-multichannel : 8192, 1 : 8192 } heftggbb MEK processed 98304 events across 4 channels { no-multichannel : 8192, 1 : 90112 } smeftggtttt MEK processed 16384 events across 72 channels { no-multichannel : 8192, 1 : 8192 } smeftggtttt MEK processed 98304 events across 72 channels { no-multichannel : 8192, 1 : 90112 } susyggtt MEK processed 16384 events across 3 channels { no-multichannel : 8192, 1 : 8192 } susyggtt MEK processed 98304 events across 3 channels { no-multichannel : 8192, 1 : 90112 }
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[june24] in gg_tt.mad and CODEGEN MadgraphTest.h, fix printout of fai…
…ling tests for SelCol #931 on LUMI
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[june24] in gg_tt.mad and CODEGEN CPPProcess.cc, set SelCol=0 if chan…
…neldId==0 (fix nomultichannel test on LUMI #931) Also add debug printouts for color selection (commented out)
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[june24] in gg_tt.mad CPPProcess.cc, temporarely add debug printouts …
…for #931 on LUMI The problem is that rndCol is always 0 and in the HIP case it is even negative... CUDA: [ RUN ] SIGMA_SM_GG_TTX_GPU_MULTICHANNEL.compareMomAndME INFO: Opening reference file ../../test/ref/dump_CPUTest.Sigma_sm_gg_ttx.txt2 sigmaKin: iconfig=1 icolC=0 icolamp=1 targetamp=4.420031 sigmaKin: iconfig=1 icolC=1 icolamp=1 targetamp=35.558544 sigmaKin: ievt= 0 rndcol=0.000000 icolC=0 target/total=0.124303 sigmaKin: ievt=0 icol=1 sigmaKin: iconfig=3 icolC=0 icolamp=0 targetamp=0.000000 sigmaKin: iconfig=3 icolC=1 icolamp=1 targetamp=20.371895 sigmaKin: ievt= 0 rndcol=0.000000 icolC=0 target/total=0.000000 sigmaKin: ievt= 0 rndcol=0.000000 icolC=1 target/total=1.000000 sigmaKin: ievt=0 icol=2 [ OK ] SIGMA_SM_GG_TTX_GPU_MULTICHANNEL.compareMomAndME (23 ms) HIP/LUMI [ RUN ] SIGMA_SM_GG_TTX_GPU_MULTICHANNEL.compareMomAndME INFO: Opening reference file ../../test/ref/dump_CPUTest.Sigma_sm_gg_ttx.txt2 sigmaKin: iconfig=1 icolC=0 icolamp=1 targetamp=4.420031 sigmaKin: iconfig=1 icolC=1 icolamp=1 targetamp=35.558544 sigmaKin: ievt= 0 rndcol=-0.000002 icolC=0 target/total=0.124303 sigmaKin: ievt=0 icol=1 ./MadgraphTest.h:328: Failure Expected equality of these values: testDriver->getSelectedColor( ievt ) Which is: 1 referenceData[iiter].SelCols[ievt] Which is: 2 Google Test trace: ./MadgraphTest.h:296: In comparing event 64 from iteration 0 0 7.500000000000000e+02 0.000000000000000e+00 0.000000000000000e+00 7.500000000000000e+02 ref0 7.500000000000000e+02 0.000000000000000e+00 0.000000000000000e+00 7.500000000000000e+02 1 7.500000000000000e+02 0.000000000000000e+00 0.000000000000000e+00 -7.500000000000000e+02 ref1 7.500000000000000e+02 0.000000000000000e+00 0.000000000000000e+00 -7.500000000000000e+02 2 7.499999999999999e+02 3.967977363399760e+02 1.264105709968620e+02 -6.237563017523095e+02 ref2 7.499999999999998e+02 3.967977363399760e+02 1.264105709968621e+02 -6.237563017523095e+02 3 7.500000000000000e+02 -3.967977363399760e+02 -1.264105709968621e+02 6.237563017523095e+02 ref3 7.499999999999999e+02 -3.967977363399760e+02 -1.264105709968621e+02 6.237563017523095e+02 ME 2.911980883026979e+00 r.ME 2.911980883026980e+00 ChanId 3 r.ChanId 3 SelHel 1 r.SelHel 1 SelCol 1 r.SelCol 2 sigmaKin: iconfig=3 icolC=0 icolamp=0 targetamp=0.000000 sigmaKin: iconfig=3 icolC=1 icolamp=1 targetamp=20.371895 sigmaKin: ievt= 0 rndcol=-0.000002 icolC=0 target/total=0.000000 sigmaKin: ievt=0 icol=1 [ FAILED ] SIGMA_SM_GG_TTX_GPU_MULTICHANNEL.compareMomAndME (11 ms)
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[june24] in gg_tt.mad and CODEGEN runTest.cc, add the computation of …
…random numbers for helicities and colors (fix #931) NB tests now fail, the txt/txt2 reference logs must be regenerated...
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[june24] in gg_tt.mad and CODEGEN, recreate new reference files inclu…
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[june24] regenerate all processes with fixes for #931 color/helicity …
…selection causing test failures on LUMI/HIP
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[june24] regenerate all processes - this propagates new reference log…
…s to all .sa after fixing #931
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[june24] in gg_tt.mad and CODEGEN, remove the hack in counters.cc #891 …
…(this still crashes now but I will shortly fix the issue)
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[june24] in gg_tt.mad auto_dsig1.f fix counters.cc #891 (remove the u…
…nnecessary second call to COUNTERS_SMATRIX1MULTI_START outside #ifdef MG5AMC_MEEXPORTER_CUDACPP)
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[june24] in CODEGEN smatrix_multi.f (backport gg_tt.mad auto_dsig1.f)…
… add the first part of the fix for counters.cc #891
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[june24] in CODEGEN, recreate patches from gg_tt.mad to complete the …
…fix for counters.cc/auto_dsig1.f bug #891 ./CODEGEN/generateAndCompare.sh gg_tt --mad --nopatch git diff --no-ext-diff -R gg_tt.mad/Source/makefile gg_tt.mad/Source/dsample.f gg_tt.mad/Source/genps.inc gg_tt.mad/SubProcesses/makefile > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/bin/internal/banner.py gg_tt.mad/bin/internal/gen_ximprove.py gg_tt.mad/bin/internal/madevent_interface.py >> CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/SubProcesses/P1_gg_ttx/auto_dsig1.f gg_tt.mad/SubProcesses/P1_gg_ttx/driver.f gg_tt.mad/SubProcesses/P1_gg_ttx/matrix1.f > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 git checkout gg_tt.mad
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[june24] in CODEGEN output.py, improve the fix for #891 so that a sma…
…ller patch.P1 is needed (and auto_dsig1.f can be removed from patch.P1)
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[june24] in gg_tt.mad auto_dsig1.f, improve the fix for #891 so that …
…a smaller patch.P1 is needed (and auto_dsig1.f can be removed from patch.P1)
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[june24] in CODEGEN, recreate patches from gg_tt.mad after improving …
…the #891 fix: now patch.P1 *no longer includes auto_dsig1.f* ./CODEGEN/generateAndCompare.sh gg_tt --mad --nopatch git diff --no-ext-diff -R gg_tt.mad/Source/makefile gg_tt.mad/Source/dsample.f gg_tt.mad/Source/genps.inc gg_tt.mad/SubProcesses/makefile > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/bin/internal/banner.py gg_tt.mad/bin/internal/gen_ximprove.py gg_tt.mad/bin/internal/madevent_interface.py >> CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/SubProcesses/P1_gg_ttx/driver.f gg_tt.mad/SubProcesses/P1_gg_ttx/matrix1.f > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 git checkout gg_tt.mad
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[june24] regenerate gg_tt.mad, check that all is ok after the #891 fi…
…xes and patch.P1 improvements
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[june24] regenerate all processes after fixing issue #891 in counters…
….cc and auto_dsig1.f
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[june24] in tput scripts, add -nocuda in throughputX.sh and propagate…
… it from allTees.s -hip (part of #933)
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[june24] in tmad scripts, add -hip option (skipping cuda) and skip gg…
…ttggg builds in that case (workaround for #933)
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Commits on Jul 23, 2024
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[june24] rerun 102 tput tests on itscrd90 - again all ok in the june2…
…4 branch after the latest fixes STARTED AT Mon Jul 22 07:42:51 PM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Mon Jul 22 09:25:11 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Mon Jul 22 09:45:21 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Mon Jul 22 09:54:15 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Mon Jul 22 09:57:00 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Mon Jul 22 09:59:42 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Mon Jul 22 10:02:29 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean ENDED(7) AT Mon Jul 22 10:31:45 PM CEST 2024 [Status=0] No errors found in logs
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[june24] rerun 30 tmads tests on itscrd90 on june24 branch - everythi…
…ng again as expected STARTED AT Mon Jul 22 10:31:45 PM CEST 2024 (SM tests) ENDED(1) AT Tue Jul 23 02:55:45 AM CEST 2024 [Status=0] (BSM tests) ENDED(1) AT Tue Jul 23 03:05:25 AM CEST 2024 [Status=0] 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt
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[june24] rerun 30 tmad tests on itgold91, all as expected (./tmad/all…
…Tees.sh) With respect to 07cedb5, the counters issue #891 has been fixed STARTED AT Mon Jul 22 07:30:57 PM CEST 2024 (SM tests) ENDED(1) AT Mon Jul 22 11:00:43 PM CEST 2024 [Status=0] (BSM tests) ENDED(1) AT Mon Jul 22 11:06:11 PM CEST 2024 [Status=0] 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 0 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 20 /data/avalassi/GPU2024/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt
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[june24] in tput/throughputX.sh (wip on itgold91 issues), rename -bld…
…allnocuda as -nocuda for simplicity and consistency
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[june24] in tput/allTees.sh (wip on itgold91 issues), rename -hip as …
…-nocuda for simplicity and consistency
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[june24] in tput throughputX.sh and teeThroughputX.sh (wip on itgold9…
…1 issues), add the -cpponly option
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[june24] in tput/allTees.sh (finally fix itgold91 issues), restructur…
…e backend options, add the -cppall option and use it as default on itgold91
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[june24] rerun 96 tput tests on LUMI - ok (with known errors on gqttq…
…; previous failure #843 in smeft was fixed) (1) Step 1 - build tests on login node (~2h, now excluding ggttggg) ./tput/allTees.sh -hip -makeonly STARTED AT Mon 22 Jul 2024 08:09:14 PM EEST ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean -nocuda -makeonly ENDED(1) AT Mon 22 Jul 2024 09:02:01 PM EEST [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean -nocuda -makeonly ENDED(2) AT Mon 22 Jul 2024 09:29:15 PM EEST [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean -nocuda -makeonly ENDED(3) AT Mon 22 Jul 2024 09:37:38 PM EEST [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst -nocuda -makeonly ENDED(4) AT Mon 22 Jul 2024 09:37:53 PM EEST [Status=0] SKIP './tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common -nocuda -makeonly' ENDED(5) AT Mon 22 Jul 2024 09:37:53 PM EEST [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common -nocuda -makeonly ENDED(6) AT Mon 22 Jul 2024 09:38:09 PM EEST [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean -nocuda -makeonly ENDED(7) AT Mon 22 Jul 2024 10:04:18 PM EEST [Status=0] (2) Step 2 - run tests on worker nodes (~1h) ./tput/allTees.sh -hip STARTED AT Tue 23 Jul 2024 09:44:09 AM EEST ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean -nocuda ENDED(1) AT Tue 23 Jul 2024 10:08:44 AM EEST [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean -nocuda ENDED(2) AT Tue 23 Jul 2024 10:18:07 AM EEST [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean -nocuda ENDED(3) AT Tue 23 Jul 2024 10:28:11 AM EEST [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst -nocuda ENDED(4) AT Tue 23 Jul 2024 10:30:09 AM EEST [Status=0] SKIP './tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common -nocuda' ENDED(5) AT Tue 23 Jul 2024 10:30:09 AM EEST [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common -nocuda ENDED(6) AT Tue 23 Jul 2024 10:32:05 AM EEST [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean -nocuda ENDED(7) AT Tue 23 Jul 2024 10:44:30 AM EEST [Status=0] tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0_bridge.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_d_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0_bridge.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_d_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_d_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_d_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd1.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_d_inl0_hrd1/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd1.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_d_inl0_hrd1/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0_bridge.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_f_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0_bridge.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_f_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_f_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_f_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd1.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_f_inl0_hrd1/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd1.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_f_inl0_hrd1/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_m_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_m_inl0_hrd0/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd1.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_m_inl0_hrd1/check_hip.exe: Segmentation fault tput/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd1.txt:/users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/gq_ttq.mad/SubProcesses/P1_gux_ttxux/build.hip_m_inl0_hrd1/check_hip.exe: Segmentation fault
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[june24] in tmad/madX.sh, bug fix on LUMI in my previous patch adding…
… the -hip option (I tried to run tmad tests on LUMI for -hip but this had many issues, will rerun later)
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[june24] in tmad/madX.sh, on LUMI improve my previous patch adding th…
…e -hip option (allow parallel bldall builds for HIP except on ggttggg)
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Commits on Jul 24, 2024
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[jtmk2] rerun 30 tmad tests on LUMI - all as expected
The list of known issues includes - ggttggg tests on HIP have been skipped due to builds failing with out of memory #933 - gqttq tests crash on HIP #806 - heft_gg_bb LHE mismatch for FPTYPE=f (on all platforms) #833 - susy_gg_t1t1 no cross section #826 STARTED AT Tue 23 Jul 2024 04:08:55 PM EEST (SM tests) ENDED(1) AT Tue 23 Jul 2024 06:56:47 PM EEST [Status=0] (BSM tests) ENDED(1) AT Tue 23 Jul 2024 07:04:44 PM EEST [Status=0] 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 12 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 12 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 12 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 12 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 12 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 12 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 0 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 0 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 0 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 16 /users/valassia/GPU2024/madgraph4gpu/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt
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[june24] rerun 96 tput tests on itgold91 using the new scripts (./tpu…
…t/allTees.sh), all ok again (Using the scripts as of 822343d, the builds were failing in cuda and only 54 logs were produced) ("../../src/cudacpp_config.mk:64: *** BACKEND=cuda but nvcc was not found. Stop.") STARTED AT Tue Jul 23 08:44:37 AM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean -cpponly ENDED(1) AT Tue Jul 23 09:04:01 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean -cpponly ENDED(2) AT Tue Jul 23 09:09:16 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean -cpponly ENDED(3) AT Tue Jul 23 09:14:12 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst -cpponly ENDED(4) AT Tue Jul 23 09:15:40 AM CEST 2024 [Status=0] SKIP './tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common -cpponly' ENDED(5) AT Tue Jul 23 09:15:40 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common -cpponly ENDED(6) AT Tue Jul 23 09:17:07 AM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean -cpponly ENDED(7) AT Tue Jul 23 09:21:50 AM CEST 2024 [Status=0] No errors found in logs
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[june24] on LUMI, revert to 126 previous itscrd90 logs for easier mer…
…ging git checkout 822343d tput/logs_* tmad/logs_*
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[june24] on itgold91, revert to 126 previous itscrd90 logs for easier…
… merging git checkout 822343d tput/logs_* tmad/logs_*
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Merge branch 'june24' (with LUMI logs) of https://gitlab.cern.ch:8443…
…/valassi/madgraph4gpu into june24 (with itgold91 logs)
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Merge branch 'june24' (with LUMI and itgold91 logs) of https://gitlab…
….cern.ch:8443/valassi/madgraph4gpu into june24 (with new itscrd90 logs)
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([june24] ** COMPLETE JUNE24 **) Merge remote-tracking branch 'upstre…
…am/master' (including CI fixes PR #938) into june24
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Commits on Jul 29, 2024
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[june24] move to CODEGEN logs from the latest upstream/master for eas…
…ier merging git checkout upstream/master $(git ls-tree --name-only HEAD */CODEGEN*txt)
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[june24] move to tput/tmad susyggt1t1 logs from the latest upstream/m…
…aster for easier merging git checkout upstream/master $(git ls-tree --name-only HEAD tmad/logs* tput/logs* | \grep susyggt1t1)
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[june24] move to susyggt1t1 reference test logs from the latest upstr…
…eam/master for easier merging git checkout upstream/master $(git ls-tree --name-only HEAD CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/dump_CPUTest.Sigma_MSSM_SLHA2_gg_t1t1x.txt susy_gg_t1t1.*/test/ref/dump_CPUTest.Sigma_MSSM_SLHA2_gg_t1t1x.txt)
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Merge remote-tracking branch 'upstream/master' into june24
Fix conflicts: epochX/cudacpp/tput/throughputX.sh
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[june24] in susy_gg_t1t1.mad (copy to .sa and CODEGEN), update the re…
…ference log files for susy_gg_t1t1.mad after merging upstream/master CUDACPP_RUNTEST_DUMPEVENTS=1 ./build.cuda_d_inl0_hrd0/runTest_cuda.exe \cp ../../test/ref/dump* ../../../CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/test/ref/ \cp ../../test/ref/dump* ../../../susy_gg_t1t1.sa/test/ref/
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[june24] upgrade mg5amcnlo from 2f4c46765 (previous valassi_gpucpp_ju…
…ne24) to f0b429915 (current valassi_gpucpp_june24 including merge of mg5amcnlo#125 to fix #947)
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Merge remote-tracking branch 'upstream/master' (including merge of #949…
… fixing #947 via mg5amcnlo#125) into june24 Fix conflicts: epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common (keep the upstream/master version)
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[june24] in CODEGEN, recreate patch.common and patch.P1 after merging…
… upstream/master The patches do not change substantially (only some line/commit numbers change) NB1: with respect to the previous june24, this clarifies that no python files are patches any more NB2: with respect to upstream/master, this also removes auto_dsig1.f The only files that still need to be patched are - 3 in patch.common: Source/makefile, Source/genps.inc, SubProcesses/makefile - 2 in patch.P1: driver.f, matrix1.f ./CODEGEN/generateAndCompare.sh gg_tt --mad --nopatch git diff --no-ext-diff -R gg_tt.mad/Source/makefile gg_tt.mad/Source/genps.inc gg_tt.mad/SubProcesses/makefile > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/SubProcesses/P1_gg_ttx/driver.f gg_tt.mad/SubProcesses/P1_gg_ttx/matrix1.f > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 git checkout gg_tt.mad
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[june24] in gg_tt.sa and CODEGEN, disable comparison of channelId in …
…runTest.exe if MULTICHANNEL is disabled #976
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[mac] in .github/workflows/c-cpp.yml, move from gfortran-11 to gfortr…
…an-14 on Mac githib-hosted runners (fix #971)
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[june24] in CODEGEN/allGenerateAndCompare.sh, add nobm_pp_ttW.mad to …
…list of processes to regenerate (tested in CI, hence need updated refs and must be in repo)
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[june24] add nobm_pp_ttW.mad to repo (tested in CI, hence need update…
…d refs and must be in repo)
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[june24] in nobm_pp_ttW.mad and CODEGEN, update txt refs and add txt2…
… refs for this process
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[june24] in gg_tt.mad and CODEGEN Bridge.h, remove unnecessay initial…
…ization of m_hstChannelIds
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[june24] in CODEGEN patchMad.sh, remove '-f' option from patch comman…
…ds (introduced in 55b3e74): I prefer that users get and report an error if there is something wrong here...
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[june24] in gg_tt.mad and CODEGEN Bridge.h, fix clang formatting for …
…the previous patch
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[june24] move to tput/tmad logs from the latest upstream/master for e…
…asier merging git checkout upstream/master $(git ls-tree --name-only HEAD tmad/logs* tput/logs*)
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[june24] move to codegen logs from the latest upstream/master for eas…
…ier merging git checkout upstream/master $(git ls-tree --name-only upstream/master */CODEGEN*txt)
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[june24] move to all generated processes from upstream/master, except…
… gg_tt.mad, to ease merging and conflict resolution (From the cudacpp directory) git checkout upstream/master $(git ls-tree --name-only upstream/master *.mad *.sa | grep -v ^gg_tt.mad)
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Merge remote-tracking branch 'upstream/master' (with hel #960, mac #974…
…, nvcc #966) into june24 Fix conflicts: epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/madgraph/iolibs/template_files/gpu/counters.cc epochX/cudacpp/CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/madgraph/iolibs/template_files/gpu/fbridge.cc epochX/cudacpp/gg_tt.mad/SubProcesses/P1_gg_ttx/auto_dsig1.f epochX/cudacpp/gg_tt.mad/SubProcesses/counters.cc epochX/cudacpp/gg_tt.mad/SubProcesses/fbridge.cc NB: here I essentially fixed gg_tt.mad, not CODEGEN, which will need to be adjusted a posteriori with a backport In particular: - Note1: patch.P1 is now taken from june24, but will need to be recomputed git checkout HEAD CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 - Note2: I need to manually port some upstream/master changes in auto_dsig1.f to smatrix_multi.f, which did not yet exist
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[june24] in CODEGEN, backport to smatrix_multi.f the gg_tt.mad auto_d…
…sig1.f changes in the latest upstream/master merge
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[june24] in gg_tt.mad auto_dsig1.f and CODEGEN smatrix_multi.f, move …
…'call counters_' to uppercase 'CALL COUNTERS_'...
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[june24] in gg_tt.mad auto_dsig1.f and CODEGEN smatrix_multi.f, add a…
… double space before '!' comments in fortran to please the MG formatter...
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[june24] in CODEGEN output.py, manually fix a codegen fragment for au…
…to_dsig1.f after merging upstream/master
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[june24] in CODEGEN, recreate patch.common and patch.P1 after merging…
… upstream/master Only patch.P1 changes: in practice, the only three changes are the removal of counters_smatrix1_start/stop calls. Note that auto_dsig1.f can still be kept out of patching The only files that still need to be patched are - 3 in patch.common: Source/makefile, Source/genps.inc, SubProcesses/makefile - 2 in patch.P1: driver.f, matrix1.f ./CODEGEN/generateAndCompare.sh gg_tt --mad --nopatch git diff --no-ext-diff -R gg_tt.mad/Source/makefile gg_tt.mad/Source/genps.inc gg_tt.mad/SubProcesses/makefile > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.common git diff --no-ext-diff -R gg_tt.mad/SubProcesses/P1_gg_ttx/driver.f gg_tt.mad/SubProcesses/P1_gg_ttx/matrix1.f > CODEGEN/PLUGIN/CUDACPP_SA_OUTPUT/MG5aMC_patches/PROD/patch.P1 git checkout gg_tt.mad
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[june24] rerun 102 tput tests on itscrd90 - all ok
STARTED AT Wed Aug 21 08:07:41 PM CEST 2024 ./tput/teeThroughputX.sh -mix -hrd -makej -eemumu -ggtt -ggttg -ggttgg -gqttq -ggttggg -makeclean ENDED(1) AT Wed Aug 21 08:45:12 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -flt -hrd -makej -eemumu -ggtt -ggttgg -inlonly -makeclean ENDED(2) AT Wed Aug 21 08:55:06 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -makej -eemumu -ggtt -ggttg -gqttq -ggttgg -ggttggg -flt -bridge -makeclean ENDED(3) AT Wed Aug 21 09:04:04 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -rmbhst ENDED(4) AT Wed Aug 21 09:06:49 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -curhst ENDED(5) AT Wed Aug 21 09:09:32 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -eemumu -ggtt -ggttgg -flt -common ENDED(6) AT Wed Aug 21 09:12:19 PM CEST 2024 [Status=0] ./tput/teeThroughputX.sh -mix -hrd -makej -susyggtt -susyggt1t1 -smeftggtttt -heftggbb -makeclean ENDED(7) AT Wed Aug 21 09:32:51 PM CEST 2024 [Status=0] No errors found in logs eemumu MEK (channelid array) processed 512 events across 2 channels { 1 : 256, 2 : 256 } eemumu MEK (no multichannel) processed 512 events across 2 channels { no-multichannel : 512 } ggttggg MEK (channelid array) processed 512 events across 1240 channels { 1 : 32, 2 : 32, 4 : 32, 5 : 32, 7 : 32, 8 : 32, 14 : 32, 15 : 32, 16 : 32, 18 : 32, 19 : 32, 20 : 32, 22 : 32, 23 : 32, 24 : 32, 26 : 32 } ggttggg MEK (no multichannel) processed 512 events across 1240 channels { no-multichannel : 512 } ggttgg MEK (channelid array) processed 512 events across 123 channels { 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32, 16 : 32, 17 : 32 } ggttgg MEK (no multichannel) processed 512 events across 123 channels { no-multichannel : 512 } ggttg MEK (channelid array) processed 512 events across 16 channels { 1 : 64, 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32 } ggttg MEK (no multichannel) processed 512 events across 16 channels { no-multichannel : 512 } ggtt MEK (channelid array) processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 } ggtt MEK (no multichannel) processed 512 events across 3 channels { no-multichannel : 512 } gqttq MEK (channelid array) processed 512 events across 5 channels { 1 : 128, 2 : 96, 3 : 96, 4 : 96, 5 : 96 } gqttq MEK (no multichannel) processed 512 events across 5 channels { no-multichannel : 512 } heftggbb MEK (channelid array) processed 512 events across 4 channels { 1 : 128, 2 : 128, 3 : 128, 4 : 128 } heftggbb MEK (no multichannel) processed 512 events across 4 channels { no-multichannel : 512 } smeftggtttt MEK (channelid array) processed 512 events across 72 channels { 1 : 32, 2 : 32, 3 : 32, 4 : 32, 5 : 32, 6 : 32, 7 : 32, 8 : 32, 9 : 32, 10 : 32, 11 : 32, 12 : 32, 13 : 32, 14 : 32, 15 : 32, 16 : 32 } smeftggtttt MEK (no multichannel) processed 512 events across 72 channels { no-multichannel : 512 } susyggt1t1 MEK (channelid array) processed 512 events across 6 channels { 2 : 128, 3 : 96, 4 : 96, 5 : 96, 6 : 96 } susyggt1t1 MEK (no multichannel) processed 512 events across 6 channels { no-multichannel : 512 } susyggtt MEK (channelid array) processed 512 events across 3 channels { 1 : 192, 2 : 160, 3 : 160 } susyggtt MEK (no multichannel) processed 512 events across 3 channels { no-multichannel : 512 }
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Commits on Aug 22, 2024
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[june24] ** COMPLETE JUNE24 ** rerun 30 tmad tests on itscrd90 on jun…
…e24 branch - everything ok STARTED AT Wed Aug 21 11:17:50 PM CEST 2024 (SM tests) ENDED(1) AT Thu Aug 22 03:22:15 AM CEST 2024 [Status=0] (BSM tests) ENDED(1) AT Thu Aug 22 03:33:50 AM CEST 2024 [Status=0] 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_eemumu_mad/log_eemumu_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttggg_mad/log_ggttggg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttgg_mad/log_ggttgg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggttg_mad/log_ggttg_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_ggtt_mad/log_ggtt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_gqttq_mad/log_gqttq_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_d_inl0_hrd0.txt 1 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_heftggbb_mad/log_heftggbb_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_smeftggtttt_mad/log_smeftggtttt_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggt1t1_mad/log_susyggt1t1_mad_m_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_d_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_f_inl0_hrd0.txt 24 /data/avalassi/GPU2023/madgraph4gpuX/epochX/cudacpp/tmad/logs_susyggtt_mad/log_susyggtt_mad_m_inl0_hrd0.txt eemumu MEK processed 8192 events across 2 channels { 1 : 8192 } eemumu MEK processed 90112 events across 2 channels { 1 : 90112 } ggttggg MEK processed 8192 events across 1240 channels { 1 : 8192 } ggttggg MEK processed 90112 events across 1240 channels { 1 : 90112 } ggttgg MEK processed 8192 events across 123 channels { 112 : 8192 } ggttgg MEK processed 90112 events across 123 channels { 112 : 90112 } ggttg MEK processed 8192 events across 16 channels { 1 : 8192 } ggttg MEK processed 90112 events across 16 channels { 1 : 90112 } ggtt MEK processed 8192 events across 3 channels { 1 : 8192 } ggtt MEK processed 90112 events across 3 channels { 1 : 90112 } gqttq MEK processed 8192 events across 5 channels { 1 : 8192 } gqttq MEK processed 90112 events across 5 channels { 1 : 90112 } heftggbb MEK processed 8192 events across 4 channels { 1 : 8192 } heftggbb MEK processed 90112 events across 4 channels { 1 : 90112 } smeftggtttt MEK processed 8192 events across 72 channels { 1 : 8192 } smeftggtttt MEK processed 90112 events across 72 channels { 1 : 90112 } susyggt1t1 MEK processed 8192 events across 6 channels { 3 : 8192 } susyggt1t1 MEK processed 90112 events across 6 channels { 3 : 90112 } susyggtt MEK processed 8192 events across 3 channels { 1 : 8192 } susyggtt MEK processed 90112 events across 3 channels { 1 : 90112 }
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Commits on Aug 30, 2024
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fix wrong name/cross-section for ggtt (the check was pptt originally)…
… and put ee_mumua to the sde=1 cross-section
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