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[reggen] Generate constants for only the main block
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Some IP blocks have more than one register set.  `regtool` doesn't
understand there may be multiple multiple register blocks and it
generates constants for all of them and overlays their offsets (ie:
there may be multiple registers at offset 0).

1. Allow `regtool` to filter regblocks so that we can generate separate
outputs per register block.
2. Generate only the main reglbock for flash_ctrl, otp_ctrl and
   rom_ctrl.

Signed-off-by: Chris Frantz <[email protected]>
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cfrantz committed Aug 4, 2023
1 parent 3c8ae99 commit b9f93f2
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Showing 9 changed files with 143 additions and 144 deletions.
1 change: 1 addition & 0 deletions hw/ip/flash_ctrl/data/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ autogen_hjson_header(
srcs = [
"flash_ctrl.hjson",
],
node = "core",
)

filegroup(
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1 change: 1 addition & 0 deletions hw/ip/otp_ctrl/data/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,7 @@ autogen_hjson_header(
srcs = [
"otp_ctrl.hjson",
],
node = "core",
)

exports_files(["otp_ctrl_mmap.hjson"])
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1 change: 1 addition & 0 deletions hw/ip/rom_ctrl/data/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ autogen_hjson_header(
srcs = [
"rom_ctrl.hjson",
],
node = "regs",
)

filegroup(
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1 change: 1 addition & 0 deletions hw/top_earlgrey/ip/flash_ctrl/data/autogen/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ autogen_hjson_header(
srcs = [
"flash_ctrl.hjson",
],
node = "core",
)

filegroup(
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11 changes: 9 additions & 2 deletions rules/autogen.bzl
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,10 @@ from hjson register descriptions.

def _hjson_header(ctx):
header = ctx.actions.declare_file("{}.h".format(ctx.label.name))
node = []
if ctx.attr.node:
node.append("--node={}".format(ctx.attr.node))

ctx.actions.run(
outputs = [header],
inputs = ctx.files.srcs + [ctx.executable._regtool],
Expand All @@ -19,7 +23,7 @@ def _hjson_header(ctx):
"-q",
"-o",
header.path,
] + [src.path for src in ctx.files.srcs],
] + node + [src.path for src in ctx.files.srcs],
executable = ctx.executable._regtool,
)

Expand All @@ -33,7 +37,7 @@ def _hjson_header(ctx):
"-q",
"-o",
tock.path,
] + [src.path for src in ctx.files.srcs],
] + node + [src.path for src in ctx.files.srcs],
executable = ctx.executable._regtool,
)

Expand All @@ -53,6 +57,9 @@ autogen_hjson_header = rule(
implementation = _hjson_header,
attrs = {
"srcs": attr.label_list(allow_files = True),
"node": attr.string(
doc = "Register block node to generate",
),
"version_stamp": attr.label(
default = "//util:full_version_file",
allow_single_file = True,
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1 change: 1 addition & 0 deletions util/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,7 @@ py_binary(
"//util/reggen:gen_rust",
"//util/reggen:gen_sec_cm_testplan",
"//util/reggen:gen_selfdoc",
"//util/reggen:gen_tock",
"//util/reggen:ip_block",
"//util/reggen:version",
requirement("tabulate"),
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23 changes: 16 additions & 7 deletions util/reggen/gen_tock.py
Original file line number Diff line number Diff line change
Expand Up @@ -123,7 +123,8 @@ def data_type(name: str, val: int, as_hex: bool) -> str:
filler_no = 0


def possibly_gen_filler(regout: TextIO, highest_address: Set[int], next_address: int) -> None:
def possibly_gen_filler(regout: TextIO, highest_address: Set[int],
next_address: int) -> None:
r"""Tock requires any gaps between registers do be declared as a reserved field.
"""

Expand Down Expand Up @@ -214,13 +215,15 @@ def gen_field_definitions(
if field.auto_split:
for sub_field_id in range(field.bits.lsb, field.bits.width()):
genout(fieldout, "\n{} OFFSET({}) NUMBITS({}) [],",
"{}_{}".format(field.name.upper(), sub_field_id), sub_field_id, 1)
"{}_{}".format(field.name.upper(),
sub_field_id), sub_field_id, 1)
else:
genout(fieldout, "\n{} OFFSET({}) NUMBITS({}) [", field.name.upper(),
field.bits.lsb, field.bits.width())
genout(fieldout, "\n{} OFFSET({}) NUMBITS({}) [",
field.name.upper(), field.bits.lsb, field.bits.width())
if getattr(field, 'enum', None) is not None:
for enum in field.enum:
genout(fieldout, "\n{} = {},", sanitize_name(enum.name).upper(), enum.value)
genout(fieldout, "\n{} = {},",
sanitize_name(enum.name).upper(), enum.value)
genout(fieldout, "\n],")
else:
genout(fieldout, "],")
Expand Down Expand Up @@ -387,7 +390,10 @@ def gen_tock(block: IpBlock, outfile: TextIO, src_file: Optional[str],
# both Apache and MIT licenses.
# Since these generated files are meant to be imported into the Tock
# codebase, emit a header acceptable to Tock's license checker.
genout(outfile, "// Licensed under the Apache License, Version 2.0 or the MIT License.\n")
genout(
outfile,
"// Licensed under the Apache License, Version 2.0 or the MIT License.\n"
)
genout(outfile, "// SPDX-License-Identifier: Apache-2.0 OR MIT\n")
genout(outfile, "// Copyright lowRISC contributors {}.\n", dt.year)
genout(outfile, '\n')
Expand All @@ -406,7 +412,10 @@ def gen_tock(block: IpBlock, outfile: TextIO, src_file: Optional[str],

for access in sorted(access_type):
genout(outfile, "use kernel::utilities::registers::{};\n", access)
genout(outfile, "use kernel::utilities::registers::{{register_bitfields, register_structs}};\n")
genout(
outfile,
"use kernel::utilities::registers::{{register_bitfields, register_structs}};\n"
)

outfile.write(indent(paramstr))
outfile.write(indent(regstr))
Expand Down
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