Merge branch 'devel'

.gitmodules

@@ -1,9 +1,6 @@
-[submodule "mbed-os"]
-	path = legacy/mbed-os
-	url = git://github.com/ARMmbed/mbed-os
 [submodule "nuttx"]
 	path = nuttx
-	url = https://github.com/Palmitoxico/nuttx.git
+	url = https://github.com/lnls-dig/nuttx.git
 [submodule "apps"]
 	path = apps
-	url = https://github.com/Palmitoxico/nuttx-apps.git
+	url = https://github.com/lnls-dig/nuttx-apps.git

README.md

@@ -48,7 +48,7 @@ Make sure to include the ```your_prefix_path/usr/bin``` directory in your ```PAT
 
 ## Flashing
 
-The nuttx.bin image does not contains the bootloader and is expected to be loaded at 0x00010000, so if you are flashing blank uCs, flash the bootloader from legacy/bootloader first.
+The nuttx.bin image does not contains the bootloader and is expected to be loaded at 0x00010000, so if you are flashing blank uCs, flash the bootloader from bootloader/ first.
 
 ### Via CMSIS-DAP
 

bootloader/.clang_complete

@@ -0,0 +1 @@
+-I./inc/

bootloader/.gitignore

@@ -0,0 +1,8 @@
+*.o
+*.a
+*.hex
+*.bin
+*.elf
+*.d
+openocd.log
+.interface

bootloader/Makefile

@@ -0,0 +1,43 @@
+PRJ_NAME   = bootloader
+CC         = arm-none-eabi-gcc
+SRCDIR     = src
+SRC        = $(wildcard $(SRCDIR)/*.c)
+ASRC       = $(wildcard $(SRCDIR)/*.s)
+OBJ        = $(SRC:.c=.o) $(ASRC:.s=.o)
+OBJCOPY    = arm-none-eabi-objcopy
+OBJDUMP    = arm-none-eabi-objdump
+PROGRAMMER = openocd
+PGFLAGS    = -f ../scripts/openocd/lpc17-cmsis.cfg -c "program $(PRJ_NAME).bin verify reset" -c shutdown
+OPT       ?= -Og
+LDSCRIPT   = ld.script
+CFLAGS     = -fdata-sections -ffunction-sections -g3 -Wall -mcpu=cortex-m3 -mlittle-endian -mthumb $(OPT) -I inc/ -mlong-calls
+ASFLAGS    =  $(CFLAGS)
+LDFLAGS    = -T $(LDSCRIPT) -Wl,--gc-sections --specs=nano.specs --specs=nosys.specs
+
+.PHONY: all clean flash
+
+all: $(PRJ_NAME).bin
+
+$(PRJ_NAME).elf: $(OBJ)
+	$(CC) $(CFLAGS) $(OBJ) -o $@ $(LDFLAGS)
+	arm-none-eabi-size $(PRJ_NAME).elf
+
+%.o: %.c $(DEPS)
+	$(CC) -MMD -c $(CFLAGS) $< -o $@
+
+%.o: %.s $(DEPS)
+	$(CC) -MMD -c $(ASFLAGS) $< -o $@
+
+-include $(SRCDIR)/*.d
+
+clean:
+	rm -f $(OBJ) $(PRJ_NAME).elf $(PRJ_NAME)-pad.elf $(PRJ_NAME).hex $(PRJ_NAME).bin $(SRCDIR)/*.d
+
+flash: $(PRJ_NAME).bin
+	$(PROGRAMMER) $(PGFLAGS)
+
+$(PRJ_NAME)-pad.elf: $(PRJ_NAME).elf
+	$(OBJCOPY) --gap-fill 0xFF --pad-to 0x10000 $< $@
+
+$(PRJ_NAME).bin: $(PRJ_NAME)-pad.elf
+	$(OBJCOPY) -O binary $< $@

bootloader/README.md

@@ -0,0 +1,21 @@
+# RFFE Bootloader
+
+The flash memory is divided in three regions:
+* Bootloader 0x00000000 - 0x0000FFFF (64KiB);
+* Application 0x00010000 - 0x00047FFF (224KiB);
+* Firmware update 0x00048000 - 0x00080000 (224KiB).
+
+```
+New firmware record at flash address 0x0007FFF0:
+
+  +-----------------+-----------------+-----------------+---------------+------------+
+  |  Major version  |  Minor version  |  Build version  | Firmware type | Magic word |
+  | number (1 byte) | number (1 byte) | number (1 byte) |   (1 byte)    | (4 bytes)  |
+  +-----------------+-----------------+-----------------+---------------+------------+
+
+```
+
+The bootloader checks the last 32bit word in flash is equal to 0xAAAAAAAA (firmware update magic word), if it is, the new firmware will be copied from 0x00048000 to 0x00010000 or 0x00000000 depending on the firmware type (application or bootloader). After finishing the copying, the bootloader will erase the last flash sector to prevent unnecessary rewrites to flash after reset.
+
+The Firmware type byte indicates what to update, (0x01: application, 0x02: bootloader). All flash writing logic is executed from SRAM to allow self updating.
+

bootloader/gdbcmd

@@ -0,0 +1,24 @@
+define rst
+	tb main
+	monitor reset halt
+	c
+end
+
+define ld
+	make
+	load
+	rst
+end
+
+target remote | openocd -c "gdb_port pipe; log_output openocd.log" -f ../scripts/openocd/lpc17-cmsis.cfg
+
+python
+from cmdebug.svd_gdb import LoadSVD
+from cmdebug.dwt_gdb import DWT
+
+DWT()
+LoadSVD()
+
+end
+
+svd_load ../scripts/gdb/LPC176x5x_v0.2.svd