sm_io/*/acq: fix missing checking if ram_size reg is implemented

Previously, we just assumed that ram_size = 0
meant exactly that, but for unimplemented gateware
this is 0 for the single reason that this register
was for reserved use.

This changed was due to lnls-dig/infra-cores@51135ac8b3

core/sm_io/src/sm_io/c/modules/acq/sm_io_acq_core.c

@@ -52,15 +52,24 @@ smio_acq_t * smio_acq_new (smio_t *parent, uint32_t num_samples_pre,
         self->num_chan = END_CHAN_ID;
     }
 
-    /* Get the number of multishot RAM size. If 0, this register is probably
-     * unimplemented in gateware, so default it to the old value */
+    /* Get the number of multishot RAM size */
+    uint32_t multishot_ram_size_impl = 0;
+    GET_PARAM(parent, acq, 0x0, ACQ_CORE, SHOTS,
+            MULTISHOT_RAM_SIZE_IMPL, SINGLE_BIT_PARAM, multishot_ram_size_impl, 
+            NO_FMT_FUNC);
     GET_PARAM(parent, acq, 0x0, ACQ_CORE, SHOTS,
             MULTISHOT_RAM_SIZE, MULT_BIT_PARAM, self->multishot_ram_size, NO_FMT_FUNC);
-    if (self->multishot_ram_size == 0) {
+    if (!multishot_ram_size_impl) {
+        self->multishot_ram_size = ACQ_CORE_MULTISHOT_MEM_SIZE;
+    }
+    else if (self->multishot_ram_size == 0) {
         DBE_DEBUG (DBG_SM_IO | DBG_LVL_WARN, "[sm_io:acq_core] Multishot RAM size is 0. "
             "It will not be possible to perform multishot acquisitions for this module\n");
     }
 
+    DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, "[sm_io:acq_core] Multishot RAM size: %u\n",
+        self->multishot_ram_size);
+
     /* Initialize acq_buf */
     self->acq_buf = (acq_buf_t *) zmalloc ((sizeof *self->acq_buf) * self->num_chan);
     ASSERT_ALLOC (self->acq_buf, err_acq_buf_alloc);