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[ClangLinkerWrapper] Fix intermediate file naming for multi-arch compilation #99325

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merged 1 commit into from
Jul 17, 2024

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When save-temps is enabled and the given offload-archs differ
only in target features with the same arch, the intermediate
postlink.bc and postopt.bc files were getting overwritten. This
fix, suffixes the intermediate file names with the complete
TargetID.

E.g. helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postlink.bc
and helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postopt.bc

…ilation

When save-temps is enabled and the given offload-archs differ only
in target features with the same arch, the intermediate postlink.bc
and postopt.bc files were getting overwritten. This fix, suffixes
the intermediate file names with the complete TargetID.

E.g. `helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postlink.bc`
and `helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postopt.bc`
@llvmbot llvmbot added the clang Clang issues not falling into any other category label Jul 17, 2024
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llvmbot commented Jul 17, 2024

@llvm/pr-subscribers-clang

Author: Saiyedul Islam (saiislam)

Changes

When save-temps is enabled and the given offload-archs differ
only in target features with the same arch, the intermediate
postlink.bc and postopt.bc files were getting overwritten. This
fix, suffixes the intermediate file names with the complete
TargetID.

E.g. helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postlink.bc
and helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postopt.bc


Full diff: https://github.com/llvm/llvm-project/pull/99325.diff

1 Files Affected:

  • (modified) clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp (+4-2)
diff --git a/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp b/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
index cb4cc5debae87..5edf4c982baa4 100644
--- a/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
+++ b/clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
@@ -14,6 +14,7 @@
 //
 //===---------------------------------------------------------------------===//
 
+#include "clang/Basic/TargetID.h"
 #include "clang/Basic/Version.h"
 #include "llvm/ADT/MapVector.h"
 #include "llvm/BinaryFormat/Magic.h"
@@ -668,7 +669,8 @@ std::unique_ptr<lto::LTO> createLTO(
     ModuleHook Hook = [](size_t, const Module &) { return true; }) {
   const llvm::Triple Triple(Args.getLastArgValue(OPT_triple_EQ));
   // We need to remove AMD's target-id from the processor if present.
-  StringRef Arch = Args.getLastArgValue(OPT_arch_EQ).split(":").first;
+  StringRef TargetID = Args.getLastArgValue(OPT_arch_EQ);
+  StringRef Arch = clang::getProcessorFromTargetID(Triple, TargetID);
   lto::Config Conf;
   lto::ThinBackend Backend;
   // TODO: Handle index-only thin-LTO
@@ -712,7 +714,7 @@ std::unique_ptr<lto::LTO> createLTO(
 
   if (SaveTemps) {
     std::string TempName = (sys::path::filename(ExecutableName) + "." +
-                            Triple.getTriple() + "." + Arch)
+                            Triple.getTriple() + "." + TargetID)
                                .str();
     Conf.PostInternalizeModuleHook = [=](size_t Task, const Module &M) {
       std::string File =

@saiislam saiislam merged commit ead486c into llvm:main Jul 17, 2024
7 of 8 checks passed
sgundapa pushed a commit to sgundapa/upstream_effort that referenced this pull request Jul 23, 2024
…ilation (llvm#99325)

When save-temps is enabled and the given offload-archs differ
only in target features with the same arch, the intermediate
postlink.bc and postopt.bc files were getting overwritten. This
fix, suffixes the intermediate file names with the complete
TargetID.

E.g. `helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postlink.bc`
and `helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postopt.bc`
yuxuanchen1997 pushed a commit that referenced this pull request Jul 25, 2024
…ilation (#99325)

Summary:
When save-temps is enabled and the given offload-archs differ
only in target features with the same arch, the intermediate
postlink.bc and postopt.bc files were getting overwritten. This
fix, suffixes the intermediate file names with the complete
TargetID.

E.g. `helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postlink.bc`
and `helloworld.amdgcn-amd-amdhsa.gfx90a:xnack+.postopt.bc`

Test Plan: 

Reviewers: 

Subscribers: 

Tasks: 

Tags: 


Differential Revision: https://phabricator.intern.facebook.com/D60250993
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3 participants