[InstCombine][NFC] Pre-Commit Tests for Select of Symmetric Selects

[tgymnich]

Tests for #99245

[llvmbot]

@llvm/pr-subscribers-llvm-transforms

Author: Tim Gymnich (tgymnich)

Changes

Tests for #99245

---

Full diff: https://github.com/llvm/llvm-project/pull/99244.diff

1 Files Affected:

• (added) llvm/test/Transforms/InstCombine/select-of-symmetric-selects.ll (+96)

diff --git a/llvm/test/Transforms/InstCombine/select-of-symmetric-selects.ll b/llvm/test/Transforms/InstCombine/select-of-symmetric-selects.ll
new file mode 100644
index 0000000000000..8cae70bb3c948
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/select-of-symmetric-selects.ll
@@ -0,0 +1,96 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+define i32 @select_of_symmetric_selects(i32 %a, i32 %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects(
+; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[C1:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C1]], i32 [[B]], i32 [[A]]
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[C2:%.*]], i32 [[SEL1]], i32 [[SEL2]]
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %sel1 = select i1 %c1, i32 %a, i32 %b
+  %sel2 = select i1 %c1, i32 %b, i32 %a
+  %ret = select i1 %c2, i32 %sel1, i32 %sel2
+  ret i32 %ret
+}
+
+define i32 @select_of_symmetric_selects_negative1(i32 %a, i32 %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects_negative1(
+; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[C1:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[C2:%.*]], i32 [[SEL1]], i32 [[A]]
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %sel1 = select i1 %c1, i32 %a, i32 %b
+  %sel2 = select i1 %c2, i32 %b, i32 %a
+  %ret = select i1 %c2, i32 %sel1, i32 %sel2
+  ret i32 %ret
+}
+
+define i32 @select_of_symmetric_selects_negative2(i32 %a, i32 %b, i32 %c, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects_negative2(
+; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[C1:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C1]], i32 [[B]], i32 [[C:%.*]]
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[C2:%.*]], i32 [[SEL1]], i32 [[SEL2]]
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %sel1 = select i1 %c1, i32 %a, i32 %b
+  %sel2 = select i1 %c1, i32 %b, i32 %c
+  %ret = select i1 %c2, i32 %sel1, i32 %sel2
+  ret i32 %ret
+}
+
+declare void @use(i32)
+
+define i32 @select_of_symmetric_selects_multi_use(i32 %a, i32 %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects_multi_use(
+; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[C1:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C1]], i32 [[B]], i32 [[A]]
+; CHECK-NEXT:    call void @use(i32 [[SEL2]])
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[C2:%.*]], i32 [[SEL1]], i32 [[SEL2]]
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %sel1 = select i1 %c1, i32 %a, i32 %b
+  %sel2 = select i1 %c1, i32 %b, i32 %a
+  call void @use(i32 %sel2)
+  %ret = select i1 %c2, i32 %sel1, i32 %sel2
+  ret i32 %ret
+}
+
+define i32 @select_of_symmetric_selects_commuted(i32 %a, i32 %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects_commuted(
+; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[C1:%.*]], i32 [[A:%.*]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C1]], i32 [[B]], i32 [[A]]
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[C2:%.*]], i32 [[SEL2]], i32 [[SEL1]]
+; CHECK-NEXT:    ret i32 [[RET]]
+;
+  %sel1 = select i1 %c1, i32 %a, i32 %b
+  %sel2 = select i1 %c1, i32 %b, i32 %a
+  %ret = select i1 %c2, i32 %sel2, i32 %sel1
+  ret i32 %ret
+}
+
+define <4 x i32> @select_of_symmetric_selects_vector1(<4 x i32> %a, <4 x i32> %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects_vector1(
+; CHECK-NEXT:    [[SEL1:%.*]] = select i1 [[C1:%.*]], <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
+; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C1]], <4 x i32> [[B]], <4 x i32> [[A]]
+; CHECK-NEXT:    [[RET:%.*]] = select i1 [[C2:%.*]], <4 x i32> [[SEL2]], <4 x i32> [[SEL1]]
+; CHECK-NEXT:    ret <4 x i32> [[RET]]
+;
+  %sel1 = select i1 %c1, <4 x i32> %a, <4 x i32> %b
+  %sel2 = select i1 %c1, <4 x i32> %b, <4 x i32> %a
+  %ret = select i1 %c2, <4 x i32> %sel2, <4 x i32> %sel1
+  ret <4 x i32> %ret
+}
+
+define <4 x i32> @select_of_symmetric_selects_vector2(<4 x i32> %a, <4 x i32> %b, <4 x i1> %c1, <4 x i1> %c2) {
+; CHECK-LABEL: @select_of_symmetric_selects_vector2(
+; CHECK-NEXT:    [[SEL1:%.*]] = select <4 x i1> [[C1:%.*]], <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
+; CHECK-NEXT:    [[SEL2:%.*]] = select <4 x i1> [[C1]], <4 x i32> [[B]], <4 x i32> [[A]]
+; CHECK-NEXT:    [[RET:%.*]] = select <4 x i1> [[C2:%.*]], <4 x i32> [[SEL2]], <4 x i32> [[SEL1]]
+; CHECK-NEXT:    ret <4 x i32> [[RET]]
+;
+  %sel1 = select <4 x i1> %c1, <4 x i32> %a, <4 x i32> %b
+  %sel2 = select <4 x i1> %c1, <4 x i32> %b, <4 x i32> %a
+  %ret = select <4 x i1> %c2, <4 x i32> %sel2, <4 x i32> %sel1
+  ret <4 x i32> %ret
+}