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[compiler-rt][X86] Unify getAMDProcessorTypeAndSubType #97863

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Jul 8, 2024
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48 changes: 42 additions & 6 deletions compiler-rt/lib/builtins/cpu_model/x86.c
Original file line number Diff line number Diff line change
Expand Up @@ -367,13 +367,13 @@ static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
}
}

#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0

static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
unsigned Model,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0

// We select CPU strings to match the code in Host.cpp, but we don't use them
// in compiler-rt.
const char *CPU = 0;
Expand Down Expand Up @@ -662,14 +662,48 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
// We select CPU strings to match the code in Host.cpp, but we don't use them
// in compiler-rt.
const char *CPU = 0;

switch (Family) {
case 4:
CPU = "i486";
break;
case 5:
CPU = "pentium";
switch (Model) {
case 6:
case 7:
CPU = "k6";
break;
case 8:
CPU = "k6-2";
break;
case 9:
case 13:
CPU = "k6-3";
break;
case 10:
CPU = "geode";
break;
}
break;
case 6:
if (testFeature(FEATURE_SSE)) {
CPU = "athlon-xp";
break;
}
CPU = "athlon";
break;
case 15:
if (testFeature(FEATURE_SSE3)) {
CPU = "k8-sse3";
break;
}
CPU = "k8";
break;
case 16:
CPU = "amdfam10";
*Type = AMDFAM10H;
*Type = AMDFAM10H; // "amdfam10"
switch (Model) {
case 2:
*Subtype = AMDFAM10H_BARCELONA;
Expand Down Expand Up @@ -745,7 +779,7 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
case 25:
CPU = "znver3";
*Type = AMDFAM19H;
if ((Model <= 0x0f) || (Model >= 0x20 && Model <= 0x2f) ||
if (Model <= 0x0f || (Model >= 0x20 && Model <= 0x2f) ||
(Model >= 0x30 && Model <= 0x3f) || (Model >= 0x40 && Model <= 0x4f) ||
(Model >= 0x50 && Model <= 0x5f)) {
// Family 19h Models 00h-0Fh (Genesis, Chagall) Zen 3
Expand Down Expand Up @@ -776,6 +810,8 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
return CPU;
}

#undef testFeature

static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
unsigned *Features) {
unsigned EAX = 0, EBX = 0;
Expand Down
32 changes: 15 additions & 17 deletions llvm/lib/TargetParser/Host.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -703,14 +703,13 @@ static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
}
}

static StringRef
getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
const unsigned *Features,
unsigned *Type, unsigned *Subtype) {
auto testFeature = [&](unsigned F) {
return (Features[F / 32] & (1U << (F % 32))) != 0;
};
#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
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static StringRef getIntelProcessorTypeAndSubtype(unsigned Family,
unsigned Model,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
StringRef CPU;

switch (Family) {
Expand Down Expand Up @@ -1067,15 +1066,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
return CPU;
}

static StringRef
getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
const unsigned *Features,
unsigned *Type, unsigned *Subtype) {
auto testFeature = [&](unsigned F) {
return (Features[F / 32] & (1U << (F % 32))) != 0;
};

StringRef CPU;
static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
unsigned Model,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
const char *CPU = 0;

switch (Family) {
case 4:
Expand Down Expand Up @@ -1215,14 +1211,16 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::AMDFAM19H_ZNVER4;
break; // "znver4"
}
break;
break; // family 19h
default:
break; // Unknown AMD CPU.
}

return CPU;
}

#undef testFeature;

static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
unsigned *Features) {
unsigned EAX, EBX;
Expand Down
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