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[RISCV] Add support for getHostCPUFeatures using hwprobe #94352

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merged 26 commits into from
Jul 16, 2024
Merged

[RISCV] Add support for getHostCPUFeatures using hwprobe #94352

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ff839be
[RISCV] Add support for getHostCPUFeatures using hwprobe
dtcxzyw Jun 4, 2024
a2fa6e3
[RISCV] Address review comments.
dtcxzyw Jun 4, 2024
f3f61d6
[RISCV] Check IMA
dtcxzyw Jun 10, 2024
212ddab
[Clang][RISCV] Add clang -mcpu=native support
dtcxzyw Jun 10, 2024
8a40b9e
[RISCV] Fix generic targets
dtcxzyw Jun 22, 2024
0176960
[RISCV] Fix typo. NFC.
dtcxzyw Jun 22, 2024
8c01bdd
[RISCV] Fix missing return statement
dtcxzyw Jun 24, 2024
753d1af
[RISCV] Mark ztso as experimental
dtcxzyw Jun 24, 2024
835bd26
Revert "[RISCV] Mark ztso as experimental"
dtcxzyw Jun 24, 2024
3f6d0d6
Merge branch 'main' into rv-native-hwprobe
dtcxzyw Jun 24, 2024
6c63389
[RISCV] Update release notes. NFC.
dtcxzyw Jun 24, 2024
2e4f615
Merge branch 'main' into rv-native-hwprobe
dtcxzyw Jun 24, 2024
fc8998f
[RISCV] Remove ztso support.
dtcxzyw Jun 24, 2024
7563384
[RISCV] Detect target features in `riscv::getRISCVArch`
dtcxzyw Jun 27, 2024
622bd65
Revert "[RISCV] Detect target features in `riscv::getRISCVArch`"
dtcxzyw Jun 27, 2024
7ce92bb
Merge branch 'main' into rv-native-hwprobe
dtcxzyw Jul 7, 2024
6be7eea
[RISCV][Driver] Remove `Args.MakeArgString`
dtcxzyw Jul 7, 2024
33c063e
Merge branch 'main' into rv-native-hwprobe
dtcxzyw Jul 10, 2024
a515f3b
[RISCV] Format code. NFC.
dtcxzyw Jul 10, 2024
ad887bc
Reland `[RISCV] Add support for getHostCPUFeatures using hwprobe`
dtcxzyw Jul 10, 2024
208a172
[RISCV] Set ztso
dtcxzyw Jul 10, 2024
4acb528
Merge branch 'main' into rv-native-hwprobe
dtcxzyw Jul 13, 2024
adbb036
[RISCV] Fix compilation error
dtcxzyw Jul 13, 2024
6b6fd88
[RISCV] Fallback when hwprobe is unavailable
dtcxzyw Jul 13, 2024
513d9f5
Merge branch 'main' into rv-native-hwprobe
dtcxzyw Jul 15, 2024
558bc0c
[RISCV][Clang] Address review comments.
dtcxzyw Jul 15, 2024
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68 changes: 68 additions & 0 deletions llvm/lib/TargetParser/Host.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1998,6 +1998,74 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {

return true;
}
#elif defined(__linux__) && defined(__riscv)
#ifdef __has_include
#if __has_include(<asm/hwprobe.h>)
#include <asm/hwprobe.h>
#endif
#endif
bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
#ifdef RISCV_HWPROBE_KEY_MVENDORID
riscv_hwprobe Query[2]{
{RISCV_HWPROBE_KEY_IMA_EXT_0, 0},
{RISCV_HWPROBE_KEY_CPUPERF_0, 0},
};
int Ret = syscall(/*__NR_riscv_hwprobe=*/258, /*pairs=*/&Query,
/*pair_count=*/1, /*cpu_count=*/0, /*cpus=*/0, /*flags=*/0);
if (Ret != 0)
return false;

uint64_t ExtMask = Query[0].value;
Features["f"] = ExtMask & RISCV_HWPROBE_IMA_FD;
Features["d"] = ExtMask & RISCV_HWPROBE_IMA_FD;
Features["c"] = ExtMask & RISCV_HWPROBE_IMA_C;
Features["v"] = ExtMask & RISCV_HWPROBE_IMA_V;
Features["zba"] = ExtMask & RISCV_HWPROBE_IMA_ZBA;
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Features["zbb"] = ExtMask & RISCV_HWPROBE_IMA_ZBB;
Features["zbs"] = ExtMask & RISCV_HWPROBE_IMA_ZBS;
Features["zicboz"] = ExtMask & RISCV_HWPROBE_IMA_ZICBOZ;
Features["zbc"] = ExtMask & RISCV_HWPROBE_IMA_ZBC;
Features["zbkb"] = ExtMask & RISCV_HWPROBE_IMA_ZBKB;
Features["zbkc"] = ExtMask & RISCV_HWPROBE_IMA_ZBKC;
Features["zbkx"] = ExtMask & RISCV_HWPROBE_IMA_ZBKX;
Features["zknd"] = ExtMask & RISCV_HWPROBE_IMA_ZKND;
Features["zkne"] = ExtMask & RISCV_HWPROBE_IMA_ZKNE;
Features["zknh"] = ExtMask & RISCV_HWPROBE_IMA_ZKNH;
Features["zksed"] = ExtMask & RISCV_HWPROBE_IMA_ZKSED;
Features["zksh"] = ExtMask & RISCV_HWPROBE_IMA_ZKSH;
Features["zkt"] = ExtMask & RISCV_HWPROBE_IMA_ZKT;
Features["zvbb"] = ExtMask & RISCV_HWPROBE_IMA_ZVBB;
Features["zvbc"] = ExtMask & RISCV_HWPROBE_IMA_ZVBC;
Features["zvkb"] = ExtMask & RISCV_HWPROBE_IMA_ZVKB;
Features["zvkg"] = ExtMask & RISCV_HWPROBE_IMA_ZVKG;
Features["zvkned"] = ExtMask & RISCV_HWPROBE_IMA_ZVKNED;
Features["zvknha"] = ExtMask & RISCV_HWPROBE_IMA_ZVKNHA;
Features["zvknhb"] = ExtMask & RISCV_HWPROBE_IMA_ZVKNHB;
Features["zvksed"] = ExtMask & RISCV_HWPROBE_IMA_ZVKSED;
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Features["zvksh"] = ExtMask & RISCV_HWPROBE_IMA_ZVKSH;
Features["zvkt"] = ExtMask & RISCV_HWPROBE_IMA_ZVKT;
Features["zfh"] = ExtMask & RISCV_HWPROBE_IMA_ZFH;
Features["zfhmin"] = ExtMask & RISCV_HWPROBE_IMA_ZFHMIN;
Features["zihintntl"] = ExtMask & RISCV_HWPROBE_IMA_ZIHINTNTL;
Features["zvfh"] = ExtMask & RISCV_HWPROBE_IMA_ZVFH;
Features["zvfhmin"] = ExtMask & RISCV_HWPROBE_IMA_ZVFHMIN;
Features["zfa"] = ExtMask & RISCV_HWPROBE_IMA_ZFA;
Features["ztso"] = ExtMask & RISCV_HWPROBE_IMA_ZTSO;
Features["zacas"] = ExtMask & RISCV_HWPROBE_IMA_ZACAS;
Features["zicond"] = ExtMask & RISCV_HWPROBE_IMA_ZICOND;
Features["zihintpause"] = ExtMask & RISCV_HWPROBE_IMA_ZIHINTPAUSE;

uint64_t MisalignedMask = Query[1].value;
if (MisalignedMask == RISCV_HWPROBE_MISALIGNED_FAST) {
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Features["unaligned-scalar-mem"] = true;
Features["unaligned-vector-mem"] = true;
}

return true;
#else
return false;
#endif
}
#else
bool sys::getHostCPUFeatures(StringMap<bool> &Features) { return false; }
#endif
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