[AArch64] set AppleA14 architecture version to v8.4-a

[tmatheson-arm]

Putting this up for review to double check, because Wikipedia claims it is v8.5-a but I noticed the citation is... TargetParser.

[llvmbot]

@llvm/pr-subscribers-debuginfo
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-driver

@llvm/pr-subscribers-backend-aarch64

Author: Tomas Matheson (tmatheson-arm)

Changes

Putting this up for review to double check, because Wikipedia claims it is v8.5-a but I noticed the citation is... TargetParser.

---

Full diff: https://github.com/llvm/llvm-project/pull/92600.diff

1 Files Affected:

• (modified) llvm/lib/Target/AArch64/AArch64Processors.td (+1-1)

diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index f2286ae17dba5..96422758bc618 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -718,7 +718,7 @@ def ProcessorFeatures {
   list<SubtargetFeature> AppleA13 = [HasV8_4aOps, FeatureCrypto, FeatureFPARMv8,
                                      FeatureNEON, FeaturePerfMon, FeatureFullFP16,
                                      FeatureFP16FML, FeatureSHA3];
-  list<SubtargetFeature> AppleA14 = [HasV8_4aOps, FeatureCrypto, FeatureFPARMv8,
+  list<SubtargetFeature> AppleA14 = [HasV8_5aOps, FeatureCrypto, FeatureFPARMv8,
                                      FeatureNEON, FeaturePerfMon, FeatureFRInt3264,
                                      FeatureSpecRestrict, FeatureSSBS, FeatureSB,
                                      FeaturePredRes, FeatureCacheDeepPersist,

[AreaZR]

Apple's Apple Silicon Optimization Guide indeed says it is 8.5

[AreaZR]

@tmatheson-arm can you verify that the information in the guide matches what information is here regarding the chipset?

https://developer.apple.com/file/?file=applesiliconcpuoptimizationguide&agree=true

[AreaZR]

Said document also says M1 and A14 don't have the BTI feature that guards against execution of instructions that are not the intended target of a branch

[AreaZR]

Just checked. This is called: FeatureBranchTargetId, so we need to exclude it from A14, as it is the only thing from the 8.5 spec it doesn't support.

[tmatheson-arm]

Thanks @AtariDreams for pointing that out. They do both seem to be "8.5 without BTI". I had a look at what current versions of clang/llvm do in this regard:

Current builds of clang set __ARM_FEATURE_BTI for these processors:

$ clang-19 ~/hello.c --target=aarch64 -march=armv8.4-a -E -dM -o - | rg __ARM_FEATURE_BTI

$ clang-19 ~/hello.c --target=aarch64 -march=armv8.5-a -E -dM -o - | rg __ARM_FEATURE_BTI
#define __ARM_FEATURE_BTI 1

$ clang-19 ~/hello.c --target=aarch64 -mcpu=apple-a14 -E -dM -o - | rg __ARM_FEATURE_BTI
#define __ARM_FEATURE_BTI 1

$ clang-19 ~/hello.c --target=aarch64 -mcpu=apple-m1 -E -dM -o - | rg __ARM_FEATURE_BTI
#define __ARM_FEATURE_BTI 1

They will also disassemble BTI instructions (rather than outputting "hint"):

$ clang-19 ~/hello.c --target=aarch64 -march=armv8.4-a -S -o - -mbranch-protection=pac-ret+bti | rg '(bti|hint)'
	hint	#34
$ clang-19 ~/hello.c --target=aarch64 -march=armv8.5-a -S -o - -mbranch-protection=pac-ret+bti | rg '(bti|hint)'
	bti	c
$ clang-19 ~/hello.c --target=aarch64 -mcpu=apple-a14 -S -o - -mbranch-protection=pac-ret+bti | rg '(bti|hint)'
	bti	c
$ clang-19 ~/hello.c --target=aarch64 -mcpu=apple-m1 -S -o - -mbranch-protection=pac-ret+bti | rg '(bti|hint)'
	bti	c

I don't think either of those is correct. Unfortunately in the backend we can't model negative features, so the best thing to do might be to model them as armv8.4-a and manually add all of the 8.5-a SubtargetFeatures except for BTI. I have updated the PR to do that.

[jroelofs]

Correct, apple-m1 does not have BTI, but BTI is required for v8.5. My mistake.

[AreaZR]

Correct, apple-m1 does not have BTI, but BTI is required for v8.5. My mistake.

Not sure if you are involved in writing the optimization guide itself at Apple, but the way the chip is described as having 8.5 minus BTI is a bit confusing since that would technically make the chip not v8.5 @jroelofs

[AreaZR]

Any updates on this?

[ahmedbougacha]

Correct, apple-m1 does not have BTI, but BTI is required for v8.5. My mistake.

Not sure if you are involved in writing the optimization guide itself at Apple, but the way the chip is described as having 8.5 minus BTI is a bit confusing since that would technically make the chip not v8.5 @jroelofs

Sure, it makes the chip "v8.5 (excluding FEAT_BTI)", which is what's written in the guide ;) The guide is intended as a human-readable guide for high-performance software writers, not as much as the almost-only-machine-readable specifications we're used to reading. The alternative would have been "v8.4a + all these features from v8.5" which is worse.

[AreaZR]

@jroelofs on a slight tangent, when do we get to add information on the M4 chip?

[AreaZR]

Is this ready to merge?

[AreaZR]

@jroelofs Can we please merge this?

[jroelofs]

@jroelofs Can we please merge this?

It's up to @tmatheson-arm, it's their patch. I've already given an 'LGTM'.

[jroelofs]

@jroelofs on a slight tangent, when do we get to add information on the M4 chip?

#95478