[llvm][ARM][AArch64] Don't use module attr as function attr. #83154
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DanielKristofKiss
requested review from
mstorsjo,
stuij,
nickdesaulniers,
ostannard,
momchil-velikov and
tmatheson-arm
llvmbot
added
backend:ARM
backend:AArch64
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|
@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-aarch64 Author: Dani (DanielKristofKiss) Changes#82819 and #83153 ensure the attributes are attached to every function that uses BTI, PAC, GCS features. Patch is 32.47 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/83154.diff 23 Files Affected:
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index ab2f42d2024ccc..40a991e2a62252 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -11584,10 +11584,6 @@ void SelectionDAGBuilder::lowerWorkItem(SwitchWorkListItem W, Value *Cond,
HasBranchTargetEnforcement =
CurFunc.getFnAttribute("branch-target-enforcement")
.getValueAsBool();
- } else {
- HasBranchTargetEnforcement =
- CurMF->getMMI().getModule()->getModuleFlag(
- "branch-target-enforcement");
}
if (!HasBranchTargetEnforcement)
JTH->FallthroughUnreachable = true;
diff --git a/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp b/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
index 1a8c71888a852f..a96b0110100fcc 100644
--- a/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
@@ -41,19 +41,8 @@ static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
// The function should be signed in the following situations:
// - sign-return-address=all
// - sign-return-address=non-leaf and the functions spills the LR
- if (!F.hasFnAttribute("sign-return-address")) {
- const Module &M = *F.getParent();
- if (const auto *Sign = mdconst::extract_or_null<ConstantInt>(
- M.getModuleFlag("sign-return-address"))) {
- if (Sign->getZExtValue()) {
- if (const auto *All = mdconst::extract_or_null<ConstantInt>(
- M.getModuleFlag("sign-return-address-all")))
- return {true, All->getZExtValue()};
- return {true, false};
- }
- }
+ if (!F.hasFnAttribute("sign-return-address"))
return {false, false};
- }
StringRef Scope = F.getFnAttribute("sign-return-address").getValueAsString();
if (Scope.equals("none"))
@@ -68,9 +57,6 @@ static std::pair<bool, bool> GetSignReturnAddress(const Function &F) {
static bool ShouldSignWithBKey(const Function &F, const AArch64Subtarget &STI) {
if (!F.hasFnAttribute("sign-return-address-key")) {
- if (const auto *BKey = mdconst::extract_or_null<ConstantInt>(
- F.getParent()->getModuleFlag("sign-return-address-with-bkey")))
- return BKey->getZExtValue();
if (STI.getTargetTriple().isOSWindows())
return true;
return false;
@@ -93,24 +79,19 @@ AArch64FunctionInfo::AArch64FunctionInfo(const Function &F,
// TODO: skip functions that have no instrumented allocas for optimization
IsMTETagged = F.hasFnAttribute(Attribute::SanitizeMemTag);
- // BTI/PAuthLR may be set either on the function or the module. Set Bool from
- // either the function attribute or module attribute, depending on what is
- // set.
- // Note: the module attributed is numeric (0 or 1) but the function attribute
- // is stringy ("true" or "false").
- auto TryFnThenModule = [&](StringRef AttrName, bool &Bool) {
+ // BTI/PAuthLR are set on the function attribute.
+ auto TryFnAttr = [&](StringRef AttrName, bool &Bool) {
if (F.hasFnAttribute(AttrName)) {
const StringRef V = F.getFnAttribute(AttrName).getValueAsString();
assert(V.equals_insensitive("true") || V.equals_insensitive("false"));
Bool = V.equals_insensitive("true");
- } else if (const auto *ModVal = mdconst::extract_or_null<ConstantInt>(
- F.getParent()->getModuleFlag(AttrName))) {
- Bool = ModVal->getZExtValue();
+ } else {
+ Bool = false;
}
};
- TryFnThenModule("branch-target-enforcement", BranchTargetEnforcement);
- TryFnThenModule("branch-protection-pauth-lr", BranchProtectionPAuthLR);
+ TryFnAttr("branch-target-enforcement", BranchTargetEnforcement);
+ TryFnAttr("branch-protection-pauth-lr", BranchProtectionPAuthLR);
// The default stack probe size is 4096 if the function has no
// stack-probe-size attribute. This is a safe default because it is the
diff --git a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
index a364992fab3ed5..c1bbf82b485819 100644
--- a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
@@ -30,12 +30,8 @@ static bool GetBranchTargetEnforcement(const Function &F,
if (!Subtarget->isMClass() || !Subtarget->hasV7Ops())
return false;
- if (!F.hasFnAttribute("branch-target-enforcement")) {
- if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
- F.getParent()->getModuleFlag("branch-target-enforcement")))
- return BTE->getZExtValue();
+ if (!F.hasFnAttribute("branch-target-enforcement"))
return false;
- }
const StringRef BTIEnable =
F.getFnAttribute("branch-target-enforcement").getValueAsString();
diff --git a/llvm/test/CodeGen/AArch64/kcfi-bti.ll b/llvm/test/CodeGen/AArch64/kcfi-bti.ll
index d3febb536824e3..d80fdc6164b92b 100644
--- a/llvm/test/CodeGen/AArch64/kcfi-bti.ll
+++ b/llvm/test/CodeGen/AArch64/kcfi-bti.ll
@@ -3,7 +3,7 @@
; RUN: llc -mtriple=aarch64-- -verify-machineinstrs -stop-after=kcfi < %s | FileCheck %s --check-prefixes=MIR,KCFI
; ASM: .word 12345678
-define void @f1(ptr noundef %x) !kcfi_type !2 {
+define void @f1(ptr noundef %x) #1 !kcfi_type !2 {
; ASM-LABEL: f1:
; ASM: // %bb.0:
; ASM: ldur w16, [x0, #-4]
@@ -30,7 +30,7 @@ define void @f1(ptr noundef %x) !kcfi_type !2 {
}
; ASM: .word 12345678
-define void @f2(ptr noundef %x) !kcfi_type !2 {
+define void @f2(ptr noundef %x) #1 !kcfi_type !2 {
; ASM-LABEL: f2:
; ASM: // %bb.0:
; ASM: ldur w16, [x0, #-4]
@@ -58,7 +58,7 @@ define void @f2(ptr noundef %x) !kcfi_type !2 {
}
; ASM-NOT: .word:
-define void @f3(ptr noundef %x) {
+define void @f3(ptr noundef %x) #1 {
; ASM-LABEL: f3:
; ASM: // %bb.0:
; ASM: ldur w9, [x16, #-4]
@@ -85,6 +85,7 @@ define void @f3(ptr noundef %x) {
}
attributes #0 = { returns_twice }
+attributes #1 = { "branch-target-enforcement"="true" }
!llvm.module.flags = !{!0, !1}
!0 = !{i32 8, !"branch-target-enforcement", i32 1}
diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-1.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-1.ll
index 4a2c17d8a6c4e6..0c459a6d36e373 100644
--- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-1.ll
+++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-1.ll
@@ -14,7 +14,7 @@ entry:
declare void @__asan_init()
declare void @__asan_version_mismatch_check_v8()
-define internal void @asan.module_ctor() {
+define internal void @asan.module_ctor() #0 {
call void @__asan_init()
call void @__asan_version_mismatch_check_v8()
ret void
diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
index 1515db46efc46d..e3394f79c62702 100644
--- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
+++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
@@ -58,8 +58,8 @@ entry:
;; CHECK-NEXT: .cfi_negate_ra_state
attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" }
-attributes #1 = { noinline }
-attributes #2 = { nofree noinline norecurse nounwind writeonly }
+attributes #1 = { noinline "sign-return-address"="all" "sign-return-address-key"="b_key" }
+attributes #2 = { nofree noinline norecurse nounwind writeonly "sign-return-address"="all" "sign-return-address-key"="b_key" }
!llvm.module.flags = !{!0, !1, !2, !3, !4, !5}
diff --git a/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll b/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll
index ba4772178211dd..65c2112caeedc6 100644
--- a/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll
+++ b/llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll
@@ -66,7 +66,7 @@ attributes #1 = { nounwind "branch-target-enforcement"="true" "sign-return-addr
attributes #2 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="non-leaf" "sign-return-address-key"="a_key" }
attributes #3 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" }
attributes #4 = { nounwind "branch-target-enforcement"="false" "sign-return-address"="all" "sign-return-address-key"="a_key" }
-attributes #5 = { nounwind }
+attributes #5 = { nounwind "branch-target-enforcement"="true" "sign-return-address"="all" "sign-return-address-key"="a_key" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
diff --git a/llvm/test/CodeGen/AArch64/setjmp-bti-outliner.ll b/llvm/test/CodeGen/AArch64/setjmp-bti-outliner.ll
index 36fc2f5b31c149..675dae2af726ca 100644
--- a/llvm/test/CodeGen/AArch64/setjmp-bti-outliner.ll
+++ b/llvm/test/CodeGen/AArch64/setjmp-bti-outliner.ll
@@ -27,7 +27,7 @@
; return 2 + a * (a + b) / (c + d);
; }
-define i32 @f(i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d) {
+define i32 @f(i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d) #0 {
; BTI-LABEL: f:
; BTI: bl OUTLINED_FUNCTION_1
; BTI-NEXT: bl setjmp
@@ -39,7 +39,7 @@ define i32 @f(i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d) {
; NOBTI-NEXT: bl OUTLINED_FUNCTION_1
entry:
- %call = call i32 @setjmp(ptr noundef null) #0
+ %call = call i32 @setjmp(ptr noundef null) #1
%add = add nsw i32 %b, %a
%mul = mul nsw i32 %add, %a
%add1 = add nsw i32 %d, %c
@@ -50,7 +50,7 @@ entry:
declare i32 @setjmp(ptr noundef) #0
-define i32 @g(i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d) {
+define i32 @g(i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d) #0 {
; BTI-LABEL: g:
; BTI: bl OUTLINED_FUNCTION_1
; BTI-NEXT: bl setjmp
@@ -62,7 +62,7 @@ define i32 @g(i32 noundef %a, i32 noundef %b, i32 noundef %c, i32 noundef %d) {
; NOBTI-NEXT: bl OUTLINED_FUNCTION_1
entry:
- %call = call i32 @setjmp(ptr noundef null) #0
+ %call = call i32 @setjmp(ptr noundef null) #1
%add = add nsw i32 %b, %a
%mul = mul nsw i32 %add, %a
%add1 = add nsw i32 %d, %c
@@ -76,8 +76,5 @@ entry:
; NOBTI: OUTLINED_FUNCTION_1:
; NOBTI-LABEL: ret
-attributes #0 = { returns_twice }
-
-!llvm.module.flags = !{!0}
-
-!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+attributes #0 = { "branch-target-enforcement"="true" }
+attributes #1 = { returns_twice }
diff --git a/llvm/test/CodeGen/AArch64/setjmp-bti.ll b/llvm/test/CodeGen/AArch64/setjmp-bti.ll
index 79a6bafffc8d8d..c963a73aef1236 100644
--- a/llvm/test/CodeGen/AArch64/setjmp-bti.ll
+++ b/llvm/test/CodeGen/AArch64/setjmp-bti.ll
@@ -24,7 +24,7 @@
; notsetjmp();
; }
-define void @bbb() {
+define void @bbb() #1 {
; BTI-LABEL: bbb:
; BTI: bl setjmp
; BTI-NEXT: hint #36
@@ -72,6 +72,4 @@ declare i32 @setjmp(ptr noundef) #0
declare void @notsetjmp()
attributes #0 = { returns_twice }
-
-!llvm.module.flags = !{!0}
-!0 = !{i32 8, !"branch-target-enforcement", i32 1}
+attributes #1 = { "branch-target-enforcement"="true" }
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
index a78fa853d99dc4..ab2b9ffcd4537a 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
@@ -15,17 +15,15 @@
; sign-return-address.ll tests combinations of -mbranch-protection=none/pac-ret
; and whether +pauth-lr is present or not.
-; sign-return-address-pauth-lr.ll is identical, with the addition of this module
+; sign-return-address-pauth-lr.ll is identical, with the addition of the function
; attribute, which enables -mbranch-protection=pac-ret+pc, and therefore tests
; the remaining parameter combinations in the table:
-!llvm.module.flags = !{!1}
-!1 = !{i32 1, !"branch-protection-pauth-lr", i32 1}
; RUN: llc -mtriple=aarch64 < %s | FileCheck --check-prefixes=CHECK,COMPAT %s
; RUN: llc -mtriple=aarch64 -mattr=v8.3a < %s | FileCheck --check-prefixes=CHECK,V83A %s
; RUN: llc -mtriple=aarch64 -mattr=v9a -mattr=pauth-lr < %s | FileCheck --check-prefixes=PAUTHLR %s
-define i32 @leaf(i32 %x) {
+define i32 @leaf(i32 %x) "branch-protection-pauth-lr"="true" {
; CHECK-LABEL: leaf:
; CHECK: // %bb.0:
; CHECK-NEXT: ret
@@ -36,7 +34,7 @@ define i32 @leaf(i32 %x) {
ret i32 %x
}
-define i32 @leaf_sign_none(i32 %x) "sign-return-address"="none" {
+define i32 @leaf_sign_none(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="none" {
; CHECK-LABEL: leaf_sign_none:
; CHECK: // %bb.0:
; CHECK-NEXT: ret
@@ -47,7 +45,7 @@ define i32 @leaf_sign_none(i32 %x) "sign-return-address"="none" {
ret i32 %x
}
-define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
+define i32 @leaf_sign_non_leaf(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="non-leaf" {
; CHECK-LABEL: leaf_sign_non_leaf:
; CHECK: // %bb.0:
; CHECK-NEXT: ret
@@ -58,7 +56,7 @@ define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
ret i32 %x
}
-define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" {
+define i32 @leaf_sign_all(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" {
; COMPAT-LABEL: leaf_sign_all:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #39
@@ -89,7 +87,7 @@ define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" {
ret i32 %x
}
-define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
+define i64 @leaf_clobbers_lr(i64 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="non-leaf" {
; COMPAT-LABEL: leaf_clobbers_lr:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #39
@@ -144,7 +142,7 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
declare i32 @foo(i32)
-define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
+define i32 @non_leaf_sign_all(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" {
; COMPAT-LABEL: non_leaf_sign_all:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #39
@@ -191,7 +189,7 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
ret i32 %call
}
-define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
+define i32 @non_leaf_sign_non_leaf(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="non-leaf" {
; COMPAT-LABEL: non_leaf_sign_non_leaf:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #39
@@ -239,7 +237,7 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
}
; Should not use the RETAA instruction.
-define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstack "target-features"="+v8.3a,+reserve-x18" {
+define i32 @non_leaf_scs(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="non-leaf" shadowcallstack "target-features"="+v8.3a,+reserve-x18" {
; CHECK-LABEL: non_leaf_scs:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [x18], #8
@@ -278,7 +276,7 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac
ret i32 %call
}
-define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" {
+define i32 @leaf_sign_all_v83(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "target-features"="+v8.3a" {
; CHECK-LABEL: leaf_sign_all_v83:
; CHECK: // %bb.0:
; CHECK-NEXT: hint #39
@@ -300,7 +298,7 @@ define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-featur
declare fastcc i64 @bar(i64)
-define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
+define fastcc void @spill_lr_and_tail_call(i64 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" {
; COMPAT-LABEL: spill_lr_and_tail_call:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #39
@@ -356,7 +354,7 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
ret void
}
-define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" {
+define i32 @leaf_sign_all_a_key(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "sign-return-address-key"="a_key" {
; COMPAT-LABEL: leaf_sign_all_a_key:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #39
@@ -387,7 +385,7 @@ define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return
ret i32 %x
}
-define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" {
+define i32 @leaf_sign_all_b_key(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "sign-return-address-key"="b_key" {
; COMPAT-LABEL: leaf_sign_all_b_key:
; COMPAT: // %bb.0:
; COMPAT-NEXT: .cfi_b_key_frame
@@ -421,7 +419,7 @@ define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return
ret i32 %x
}
-define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" {
+define i32 @leaf_sign_all_v83_b_key(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" {
; CHECK-LABEL: leaf_sign_all_v83_b_key:
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
@@ -444,7 +442,7 @@ define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target-
}
; Note that BTI instruction is not needed before PACIASP.
-define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" "branch-target-enforcement"="true"{
+define i32 @leaf_sign_all_a_key_bti(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "sign-return-address-key"="a_key" "branch-target-enforcement"="true" {
; COMPAT-LABEL: leaf_sign_all_a_key_bti:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #34
@@ -479,7 +477,7 @@ define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-re
}
; Note that BTI instruction is not needed before PACIBSP.
-define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" "branch-target-enforcement"="true"{
+define i32 @leaf_sign_all_b_key_bti(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "sign-return-address-key"="b_key" "branch-target-enforcement"="true"{
; COMPAT-LABEL: leaf_sign_all_b_key_bti:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #34
@@ -517,7 +515,7 @@ define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-re
}
; Note that BTI instruction is not needed before PACIBSP.
-define i32 @leaf_sign_all_v83_b_key_bti(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" "branch-target-enforcement"="true" {
+define i32 @leaf_sign_all_v83_b_key_bti(i32 %x) "branch-protection-pauth-lr"="true" "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" "branch-target-enforcement"="true" {
; CHECK-LABEL: leaf_sign_all_v83_b_key_bti:
; CHECK: // %bb.0:
; CHECK-NEXT: hint #34
diff --git a/llvm/test/CodeGen/AArch64/wineh-bti.ll b/llvm/test/CodeGen/AArch64/wineh-bti.ll
index a73f4d219bc314..6e2d1e7d9b5d1f 100644
--- a/llvm/test/CodeGen/AArch64/wineh-bti.ll
+++ b/llvm/test/CodeGen/AArch64/wineh-bti.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=aarch64-windows -aarch64-min-jump-table-entries=4 | FileCheck %s
-define dso_local i32 @func(i32 %in) {
+define dso_local i32 @func(i32 %in) "sign-return-address"="non-leaf" "sign-return-address-key"="a_key" "branch-target-enforcement"="true" {
entry:
call void asm sideeffect "", "~{x19}"()
switch i32 %in, label %def [
@@ -27,11 +27,6 @@ lbl4:
ret i32 8
}
-!llvm.module.flags = !{!0, !1}
-
-!0 = !{i32 8, !"branch-target-enforcement", i32 1}
-!1 = !{i32 8, !"sign-return-address", i32 1}
-
; CHECK-LABEL: func:
; CHECK-NEXT: .seh_proc func
; CHECK-NEXT: // %bb.0:
diff --git a/llvm/test/CodeGen/AArch64/wineh-pac.ll b/llvm/test/CodeGen/AArch64/wineh-pac.ll
index 85ef463c8c127a..797dd10d7e49de 100644
--- a/llvm/test/CodeGen/AArch64/wineh-pac.ll
+++ b/llvm/test/CodeGen/AArch64/wineh-pac.ll
@@ -1,20 +1,17 @@
; RUN: llc < %s -mtri...
[truncated]
|
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✅ With the latest revision this PR passed the C/C++ code formatter. |
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Changes landed in #82819 |
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#82819 and #83153 ensure the attributes are attached to every function that uses BTI, PAC, GCS features.
If the flag is not present means it isn't set.
Module attribute is still used for generating the binary marking.