-
Notifications
You must be signed in to change notification settings - Fork 11.9k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[RISCV][SLEEF]: Support SLEEF vector library for RISC-V target. #114014
base: main
Are you sure you want to change the base?
Changes from all commits
File filter
Filter by extension
Conversations
Jump to
Diff view
Diff view
There are no files selected for viewing
Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -42,6 +42,7 @@ static ParseRet tryParseISA(StringRef &MangledName, VFISAKind &ISA) { | |
ISA = StringSwitch<VFISAKind>(MangledName.take_front(1)) | ||
.Case("n", VFISAKind::AdvancedSIMD) | ||
.Case("s", VFISAKind::SVE) | ||
.Case("v", VFISAKind::RVV) | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Is this letter choice internal to LLVM or is it agreement with SLEEF? I'm surprised we don't use "r" for RISC-V. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Now, there is no VFABIDemagler support for RISC-V. Letter |
||
.Case("b", VFISAKind::SSE) | ||
.Case("c", VFISAKind::AVX) | ||
.Case("d", VFISAKind::AVX2) | ||
|
@@ -79,9 +80,9 @@ static ParseRet tryParseVLEN(StringRef &ParseString, VFISAKind ISA, | |
std::pair<unsigned, bool> &ParsedVF) { | ||
if (ParseString.consume_front("x")) { | ||
// SVE is the only scalable ISA currently supported. | ||
if (ISA != VFISAKind::SVE) { | ||
if (ISA != VFISAKind::SVE && ISA != VFISAKind::RVV) { | ||
LLVM_DEBUG(dbgs() << "Vector function variant declared with scalable VF " | ||
<< "but ISA is not SVE\n"); | ||
<< "but ISA supported for SVE and RVV only\n"); | ||
return ParseRet::Error; | ||
} | ||
// We can't determine the VF of a scalable vector by looking at the vlen | ||
|
@@ -301,9 +302,8 @@ static ParseRet tryParseAlign(StringRef &ParseString, Align &Alignment) { | |
// the number of elements of the given type which would fit in such a vector. | ||
static std::optional<ElementCount> getElementCountForTy(const VFISAKind ISA, | ||
const Type *Ty) { | ||
// Only AArch64 SVE is supported at present. | ||
assert(ISA == VFISAKind::SVE && | ||
"Scalable VF decoding only implemented for SVE\n"); | ||
assert((ISA == VFISAKind::SVE || ISA == VFISAKind::RVV) && | ||
"Scalable VF decoding only implemented for SVE and RVV\n"); | ||
|
||
if (Ty->isIntegerTy(64) || Ty->isDoubleTy() || Ty->isPointerTy()) | ||
return ElementCount::getScalable(2); | ||
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Where does the "u10" and "u05" etc come from. I don't see that in the name of the SVE SLEEF functions.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Yes, ARM replaces vector functions using format "ABI_name". For this purpose, they create GNUABI support in SLEEF for AArch64 only - (look at sleef.org support Francesco Petrogalli and llvm aarch64 sleef support)
Actually, SLEEF has own function naming.
I made the names match as in SLEEF library.