Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[HLSL][SPIRV] Added clamp intrinsic #113394

Open
wants to merge 8 commits into
base: main
Choose a base branch
from
+825 −196
Open

[HLSL][SPIRV] Added clamp intrinsic #113394

Show file tree
Hide file tree
Changes from 7 commits
Commits
Show all changes
8 commits
Select commit Hold shift + click to select a range
8cf5032
Added the intrinsics and modified the clang test
adam-yang Oct 14, 2024
15897ba
LLC tests
adam-yang Oct 22, 2024
b669cfb
Testing opencl too
adam-yang Oct 22, 2024
47b1e85
Fixed a weirdness in the CG
adam-yang Oct 22, 2024
549d95a
Addressed feedback.
adam-yang Oct 24, 2024
f9b7e30
Formatting
adam-yang Oct 24, 2024
ffdcebb
Clamp-vec is now gone for all the targets
adam-yang Oct 25, 2024
7e32a4c
Moved the declarations to the bottom
adam-yang Oct 28, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
17 changes: 12 additions & 5 deletions clang/lib/CodeGen/CGBuiltin.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18661,14 +18661,21 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
Value *OpMax = EmitScalarExpr(E->getArg(2));

QualType Ty = E->getArg(0)->getType();
bool IsUnsigned = false;
if (auto *VecTy = Ty->getAs<VectorType>())
Ty = VecTy->getElementType();
IsUnsigned = Ty->isUnsignedIntegerType();

Intrinsic::ID Intr;
if (Ty->isFloatingType()) {
Intr = CGM.getHLSLRuntime().getNClampIntrinsic();
} else if (Ty->isUnsignedIntegerType()) {
Intr = CGM.getHLSLRuntime().getUClampIntrinsic();
} else {
assert(Ty->isSignedIntegerType());
Intr = CGM.getHLSLRuntime().getSClampIntrinsic();
}
return Builder.CreateIntrinsic(
/*ReturnType=*/OpX->getType(),
IsUnsigned ? Intrinsic::dx_uclamp : Intrinsic::dx_clamp,
ArrayRef<Value *>{OpX, OpMin, OpMax}, nullptr, "dx.clamp");
/*ReturnType=*/OpX->getType(), Intr,
ArrayRef<Value *>{OpX, OpMin, OpMax}, nullptr, "hlsl.clamp");
}
case Builtin::BI__builtin_hlsl_cross: {
Value *Op0 = EmitScalarExpr(E->getArg(0));
Expand Down
3 changes: 3 additions & 0 deletions clang/lib/CodeGen/CGHLSLRuntime.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -91,6 +91,9 @@ class CGHLSLRuntime {
GENERATE_HLSL_INTRINSIC_FUNCTION(UDot, udot)
GENERATE_HLSL_INTRINSIC_FUNCTION(WaveIsFirstLane, wave_is_first_lane)
GENERATE_HLSL_INTRINSIC_FUNCTION(WaveReadLaneAt, wave_readlane)
GENERATE_HLSL_INTRINSIC_FUNCTION(NClamp, nclamp)
GENERATE_HLSL_INTRINSIC_FUNCTION(SClamp, sclamp)
GENERATE_HLSL_INTRINSIC_FUNCTION(UClamp, uclamp)

GENERATE_HLSL_INTRINSIC_FUNCTION(CreateHandleFromBinding, handle_fromBinding)

Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGenHLSL/builtins/clamp-builtin.hlsl
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s

// CHECK-LABEL: builtin_test_clamp_int4
// CHECK: %dx.clamp = call <4 x i32> @llvm.dx.clamp.v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2)
// CHECK: ret <4 x i32> %dx.clamp
// CHECK: %hlsl.clamp = call <4 x i32> @llvm.dx.sclamp.v4i32(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2)
// CHECK: ret <4 x i32> %hlsl.clamp
int4 builtin_test_clamp_int4(int4 p0, int4 p1, int4 p2) {
return __builtin_hlsl_elementwise_clamp(p0, p1, p2);
}
174 changes: 92 additions & 82 deletions clang/test/CodeGenHLSL/builtins/clamp.hlsl
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,133 +1,143 @@
// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \
// RUN: -fnative-half-type -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF
// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF \
// RUN: -DTARGET=dx -DFNATTRS=noundef
// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \
// RUN: -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,NO_HALF
// RUN: FileCheck %s --check-prefixes=CHECK,NO_HALF \
// RUN: -DTARGET=dx -DFNATTRS=noundef
// RUN: %clang_cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute %s \
// RUN: -fnative-half-type -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF \
// RUN: -DTARGET=spv -DFNATTRS="spir_func noundef"
// RUN: %clang_cc1 -finclude-default-header -triple spirv-unknown-vulkan-compute %s \
// RUN: -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,NO_HALF \
// RUN: -DTARGET=spv -DFNATTRS="spir_func noundef"

#ifdef __HLSL_ENABLE_16_BIT
// NATIVE_HALF-LABEL: define noundef i16 @_Z16test_clamp_short
// NATIVE_HALF: call i16 @llvm.dx.clamp.i16(
// NATIVE_HALF: define [[FNATTRS]] i16 @_Z16test_clamp_short
// NATIVE_HALF: call i16 @llvm.[[TARGET]].sclamp.i16(
int16_t test_clamp_short(int16_t p0, int16_t p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <2 x i16> @_Z17test_clamp_short2
// NATIVE_HALF: call <2 x i16> @llvm.dx.clamp.v2i16(
// NATIVE_HALF: define [[FNATTRS]] <2 x i16> @_Z17test_clamp_short2
// NATIVE_HALF: call <2 x i16> @llvm.[[TARGET]].sclamp.v2i16(
int16_t2 test_clamp_short2(int16_t2 p0, int16_t2 p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <3 x i16> @_Z17test_clamp_short3
// NATIVE_HALF: call <3 x i16> @llvm.dx.clamp.v3i16
// NATIVE_HALF: define [[FNATTRS]] <3 x i16> @_Z17test_clamp_short3
// NATIVE_HALF: call <3 x i16> @llvm.[[TARGET]].sclamp.v3i16
int16_t3 test_clamp_short3(int16_t3 p0, int16_t3 p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <4 x i16> @_Z17test_clamp_short4
// NATIVE_HALF: call <4 x i16> @llvm.dx.clamp.v4i16
// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z17test_clamp_short4
// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].sclamp.v4i16
int16_t4 test_clamp_short4(int16_t4 p0, int16_t4 p1) { return clamp(p0, p1,p1); }

// NATIVE_HALF-LABEL: define noundef i16 @_Z17test_clamp_ushort
// NATIVE_HALF: call i16 @llvm.dx.uclamp.i16(
// NATIVE_HALF: define [[FNATTRS]] i16 @_Z17test_clamp_ushort
// NATIVE_HALF: call i16 @llvm.[[TARGET]].uclamp.i16(
uint16_t test_clamp_ushort(uint16_t p0, uint16_t p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <2 x i16> @_Z18test_clamp_ushort2
// NATIVE_HALF: call <2 x i16> @llvm.dx.uclamp.v2i16
// NATIVE_HALF: define [[FNATTRS]] <2 x i16> @_Z18test_clamp_ushort2
// NATIVE_HALF: call <2 x i16> @llvm.[[TARGET]].uclamp.v2i16
uint16_t2 test_clamp_ushort2(uint16_t2 p0, uint16_t2 p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <3 x i16> @_Z18test_clamp_ushort3
// NATIVE_HALF: call <3 x i16> @llvm.dx.uclamp.v3i16
// NATIVE_HALF: define [[FNATTRS]] <3 x i16> @_Z18test_clamp_ushort3
// NATIVE_HALF: call <3 x i16> @llvm.[[TARGET]].uclamp.v3i16
uint16_t3 test_clamp_ushort3(uint16_t3 p0, uint16_t3 p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <4 x i16> @_Z18test_clamp_ushort4
// NATIVE_HALF: call <4 x i16> @llvm.dx.uclamp.v4i16
// NATIVE_HALF: define [[FNATTRS]] <4 x i16> @_Z18test_clamp_ushort4
// NATIVE_HALF: call <4 x i16> @llvm.[[TARGET]].uclamp.v4i16
uint16_t4 test_clamp_ushort4(uint16_t4 p0, uint16_t4 p1) { return clamp(p0, p1,p1); }
#endif

// CHECK-LABEL: define noundef i32 @_Z14test_clamp_int
// CHECK: call i32 @llvm.dx.clamp.i32(
// CHECK: define [[FNATTRS]] i32 @_Z14test_clamp_int
// CHECK: call i32 @llvm.[[TARGET]].sclamp.i32(
int test_clamp_int(int p0, int p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <2 x i32> @_Z15test_clamp_int2
// CHECK: call <2 x i32> @llvm.dx.clamp.v2i32
// CHECK: define [[FNATTRS]] <2 x i32> @_Z15test_clamp_int2
// CHECK: call <2 x i32> @llvm.[[TARGET]].sclamp.v2i32
int2 test_clamp_int2(int2 p0, int2 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <3 x i32> @_Z15test_clamp_int3
// CHECK: call <3 x i32> @llvm.dx.clamp.v3i32
// CHECK: define [[FNATTRS]] <3 x i32> @_Z15test_clamp_int3
// CHECK: call <3 x i32> @llvm.[[TARGET]].sclamp.v3i32
int3 test_clamp_int3(int3 p0, int3 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <4 x i32> @_Z15test_clamp_int4
// CHECK: call <4 x i32> @llvm.dx.clamp.v4i32
// CHECK: define [[FNATTRS]] <4 x i32> @_Z15test_clamp_int4
// CHECK: call <4 x i32> @llvm.[[TARGET]].sclamp.v4i32
int4 test_clamp_int4(int4 p0, int4 p1) { return clamp(p0, p1,p1); }

// CHECK-LABEL: define noundef i32 @_Z15test_clamp_uint
// CHECK: call i32 @llvm.dx.uclamp.i32(
// CHECK: define [[FNATTRS]] i32 @_Z15test_clamp_uint
// CHECK: call i32 @llvm.[[TARGET]].uclamp.i32(
int test_clamp_uint(uint p0, uint p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <2 x i32> @_Z16test_clamp_uint2
// CHECK: call <2 x i32> @llvm.dx.uclamp.v2i32
// CHECK: define [[FNATTRS]] <2 x i32> @_Z16test_clamp_uint2
// CHECK: call <2 x i32> @llvm.[[TARGET]].uclamp.v2i32
uint2 test_clamp_uint2(uint2 p0, uint2 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <3 x i32> @_Z16test_clamp_uint3
// CHECK: call <3 x i32> @llvm.dx.uclamp.v3i32
// CHECK: define [[FNATTRS]] <3 x i32> @_Z16test_clamp_uint3
// CHECK: call <3 x i32> @llvm.[[TARGET]].uclamp.v3i32
uint3 test_clamp_uint3(uint3 p0, uint3 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <4 x i32> @_Z16test_clamp_uint4
// CHECK: call <4 x i32> @llvm.dx.uclamp.v4i32
// CHECK: define [[FNATTRS]] <4 x i32> @_Z16test_clamp_uint4
// CHECK: call <4 x i32> @llvm.[[TARGET]].uclamp.v4i32
uint4 test_clamp_uint4(uint4 p0, uint4 p1) { return clamp(p0, p1,p1); }

// CHECK-LABEL: define noundef i64 @_Z15test_clamp_long
// CHECK: call i64 @llvm.dx.clamp.i64(
// CHECK: define [[FNATTRS]] i64 @_Z15test_clamp_long
// CHECK: call i64 @llvm.[[TARGET]].sclamp.i64(
int64_t test_clamp_long(int64_t p0, int64_t p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <2 x i64> @_Z16test_clamp_long2
// CHECK: call <2 x i64> @llvm.dx.clamp.v2i64
// CHECK: define [[FNATTRS]] <2 x i64> @_Z16test_clamp_long2
// CHECK: call <2 x i64> @llvm.[[TARGET]].sclamp.v2i64
int64_t2 test_clamp_long2(int64_t2 p0, int64_t2 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <3 x i64> @_Z16test_clamp_long3
// CHECK: call <3 x i64> @llvm.dx.clamp.v3i64
// CHECK: define [[FNATTRS]] <3 x i64> @_Z16test_clamp_long3
// CHECK: call <3 x i64> @llvm.[[TARGET]].sclamp.v3i64
int64_t3 test_clamp_long3(int64_t3 p0, int64_t3 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <4 x i64> @_Z16test_clamp_long4
// CHECK: call <4 x i64> @llvm.dx.clamp.v4i64
// CHECK: define [[FNATTRS]] <4 x i64> @_Z16test_clamp_long4
// CHECK: call <4 x i64> @llvm.[[TARGET]].sclamp.v4i64
int64_t4 test_clamp_long4(int64_t4 p0, int64_t4 p1) { return clamp(p0, p1,p1); }

// CHECK-LABEL: define noundef i64 @_Z16test_clamp_ulong
// CHECK: call i64 @llvm.dx.uclamp.i64(
// CHECK: define [[FNATTRS]] i64 @_Z16test_clamp_ulong
// CHECK: call i64 @llvm.[[TARGET]].uclamp.i64(
uint64_t test_clamp_ulong(uint64_t p0, uint64_t p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <2 x i64> @_Z17test_clamp_ulong2
// CHECK: call <2 x i64> @llvm.dx.uclamp.v2i64
// CHECK: define [[FNATTRS]] <2 x i64> @_Z17test_clamp_ulong2
// CHECK: call <2 x i64> @llvm.[[TARGET]].uclamp.v2i64
uint64_t2 test_clamp_ulong2(uint64_t2 p0, uint64_t2 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <3 x i64> @_Z17test_clamp_ulong3
// CHECK: call <3 x i64> @llvm.dx.uclamp.v3i64
// CHECK: define [[FNATTRS]] <3 x i64> @_Z17test_clamp_ulong3
// CHECK: call <3 x i64> @llvm.[[TARGET]].uclamp.v3i64
uint64_t3 test_clamp_ulong3(uint64_t3 p0, uint64_t3 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <4 x i64> @_Z17test_clamp_ulong4
// CHECK: call <4 x i64> @llvm.dx.uclamp.v4i64
// CHECK: define [[FNATTRS]] <4 x i64> @_Z17test_clamp_ulong4
// CHECK: call <4 x i64> @llvm.[[TARGET]].uclamp.v4i64
uint64_t4 test_clamp_ulong4(uint64_t4 p0, uint64_t4 p1) { return clamp(p0, p1,p1); }

// NATIVE_HALF-LABEL: define noundef half @_Z15test_clamp_half
// NATIVE_HALF: call half @llvm.dx.clamp.f16(
// NO_HALF-LABEL: define noundef float @_Z15test_clamp_half
// NO_HALF: call float @llvm.dx.clamp.f32(
// NATIVE_HALF: define [[FNATTRS]] half @_Z15test_clamp_half
// NATIVE_HALF: call half @llvm.[[TARGET]].nclamp.f16(
// NO_HALF: define [[FNATTRS]] float @_Z15test_clamp_half
// NO_HALF: call float @llvm.[[TARGET]].nclamp.f32(
half test_clamp_half(half p0, half p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <2 x half> @_Z16test_clamp_half2
// NATIVE_HALF: call <2 x half> @llvm.dx.clamp.v2f16
// NO_HALF-LABEL: define noundef <2 x float> @_Z16test_clamp_half2
// NO_HALF: call <2 x float> @llvm.dx.clamp.v2f32(
// NATIVE_HALF: define [[FNATTRS]] <2 x half> @_Z16test_clamp_half2
// NATIVE_HALF: call <2 x half> @llvm.[[TARGET]].nclamp.v2f16
// NO_HALF: define [[FNATTRS]] <2 x float> @_Z16test_clamp_half2
// NO_HALF: call <2 x float> @llvm.[[TARGET]].nclamp.v2f32(
half2 test_clamp_half2(half2 p0, half2 p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <3 x half> @_Z16test_clamp_half3
// NATIVE_HALF: call <3 x half> @llvm.dx.clamp.v3f16
// NO_HALF-LABEL: define noundef <3 x float> @_Z16test_clamp_half3
// NO_HALF: call <3 x float> @llvm.dx.clamp.v3f32(
// NATIVE_HALF: define [[FNATTRS]] <3 x half> @_Z16test_clamp_half3
// NATIVE_HALF: call <3 x half> @llvm.[[TARGET]].nclamp.v3f16
// NO_HALF: define [[FNATTRS]] <3 x float> @_Z16test_clamp_half3
// NO_HALF: call <3 x float> @llvm.[[TARGET]].nclamp.v3f32(
half3 test_clamp_half3(half3 p0, half3 p1) { return clamp(p0, p1,p1); }
// NATIVE_HALF-LABEL: define noundef <4 x half> @_Z16test_clamp_half4
// NATIVE_HALF: call <4 x half> @llvm.dx.clamp.v4f16
// NO_HALF-LABEL: define noundef <4 x float> @_Z16test_clamp_half4
// NO_HALF: call <4 x float> @llvm.dx.clamp.v4f32(
// NATIVE_HALF: define [[FNATTRS]] <4 x half> @_Z16test_clamp_half4
// NATIVE_HALF: call <4 x half> @llvm.[[TARGET]].nclamp.v4f16
// NO_HALF: define [[FNATTRS]] <4 x float> @_Z16test_clamp_half4
// NO_HALF: call <4 x float> @llvm.[[TARGET]].nclamp.v4f32(
half4 test_clamp_half4(half4 p0, half4 p1) { return clamp(p0, p1,p1); }

// CHECK-LABEL: define noundef float @_Z16test_clamp_float
// CHECK: call float @llvm.dx.clamp.f32(
// CHECK: define [[FNATTRS]] float @_Z16test_clamp_float
// CHECK: call float @llvm.[[TARGET]].nclamp.f32(
float test_clamp_float(float p0, float p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <2 x float> @_Z17test_clamp_float2
// CHECK: call <2 x float> @llvm.dx.clamp.v2f32
// CHECK: define [[FNATTRS]] <2 x float> @_Z17test_clamp_float2
// CHECK: call <2 x float> @llvm.[[TARGET]].nclamp.v2f32
float2 test_clamp_float2(float2 p0, float2 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <3 x float> @_Z17test_clamp_float3
// CHECK: call <3 x float> @llvm.dx.clamp.v3f32
// CHECK: define [[FNATTRS]] <3 x float> @_Z17test_clamp_float3
// CHECK: call <3 x float> @llvm.[[TARGET]].nclamp.v3f32
float3 test_clamp_float3(float3 p0, float3 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <4 x float> @_Z17test_clamp_float4
// CHECK: call <4 x float> @llvm.dx.clamp.v4f32
// CHECK: define [[FNATTRS]] <4 x float> @_Z17test_clamp_float4
// CHECK: call <4 x float> @llvm.[[TARGET]].nclamp.v4f32
float4 test_clamp_float4(float4 p0, float4 p1) { return clamp(p0, p1,p1); }

// CHECK-LABEL: define noundef double @_Z17test_clamp_double
// CHECK: call double @llvm.dx.clamp.f64(
// CHECK: define [[FNATTRS]] double @_Z17test_clamp_double
// CHECK: call double @llvm.[[TARGET]].nclamp.f64(
double test_clamp_double(double p0, double p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <2 x double> @_Z18test_clamp_double2
// CHECK: call <2 x double> @llvm.dx.clamp.v2f64
// CHECK: define [[FNATTRS]] <2 x double> @_Z18test_clamp_double2
// CHECK: call <2 x double> @llvm.[[TARGET]].nclamp.v2f64
double2 test_clamp_double2(double2 p0, double2 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <3 x double> @_Z18test_clamp_double3
// CHECK: call <3 x double> @llvm.dx.clamp.v3f64
// CHECK: define [[FNATTRS]] <3 x double> @_Z18test_clamp_double3
// CHECK: call <3 x double> @llvm.[[TARGET]].nclamp.v3f64
double3 test_clamp_double3(double3 p0, double3 p1) { return clamp(p0, p1,p1); }
// CHECK-LABEL: define noundef <4 x double> @_Z18test_clamp_double4
// CHECK: call <4 x double> @llvm.dx.clamp.v4f64
// CHECK: define [[FNATTRS]] <4 x double> @_Z18test_clamp_double4
// CHECK: call <4 x double> @llvm.[[TARGET]].nclamp.v4f64
double4 test_clamp_double4(double4 p0, double4 p1) { return clamp(p0, p1,p1); }
3 changes: 2 additions & 1 deletion llvm/include/llvm/IR/IntrinsicsDirectX.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -40,8 +40,9 @@ def int_dx_cast_handle : Intrinsic<[llvm_any_ty], [llvm_any_ty]>;

def int_dx_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty], [IntrNoMem]>;
def int_dx_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_any_ty], [IntrNoMem]>;
def int_dx_clamp : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_uclamp : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_sclamp : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_nclamp : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
adam-yang marked this conversation as resolved.
Show resolved Hide resolved
def int_dx_cross : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_dx_saturate : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;

Expand Down
3 changes: 3 additions & 0 deletions llvm/include/llvm/IR/IntrinsicsSPIRV.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,9 @@ let TargetPrefix = "spv" in {
def int_spv_wave_readlane : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;
def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;
def int_spv_radians : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty], [IntrNoMem]>;
def int_spv_uclamp : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_spv_sclamp : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;
def int_spv_nclamp : DefaultAttrsIntrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>;

// Create resource handle given the binding information. Returns a
// type appropriate for the kind of resource given the set id, binding id,
Expand Down
32 changes: 13 additions & 19 deletions llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -53,9 +53,10 @@ static bool isIntrinsicExpansion(Function &F) {
case Intrinsic::pow:
case Intrinsic::dx_all:
case Intrinsic::dx_any:
case Intrinsic::dx_clamp:
case Intrinsic::dx_cross:
case Intrinsic::dx_uclamp:
case Intrinsic::dx_sclamp:
case Intrinsic::dx_nclamp:
case Intrinsic::dx_degrees:
case Intrinsic::dx_lerp:
case Intrinsic::dx_length:
Expand Down Expand Up @@ -452,29 +453,21 @@ static Value *expandRadiansIntrinsic(CallInst *Orig) {
return Builder.CreateFMul(X, PiOver180);
}

static Intrinsic::ID getMaxForClamp(Type *ElemTy,
Intrinsic::ID ClampIntrinsic) {
static Intrinsic::ID getMaxForClamp(Intrinsic::ID ClampIntrinsic) {
if (ClampIntrinsic == Intrinsic::dx_uclamp)
return Intrinsic::umax;
assert(ClampIntrinsic == Intrinsic::dx_clamp);
if (ElemTy->isVectorTy())
ElemTy = ElemTy->getScalarType();
if (ElemTy->isIntegerTy())
if (ClampIntrinsic == Intrinsic::dx_sclamp)
return Intrinsic::smax;
assert(ElemTy->isFloatingPointTy());
assert(ClampIntrinsic == Intrinsic::dx_nclamp);
return Intrinsic::maxnum;
}

static Intrinsic::ID getMinForClamp(Type *ElemTy,
Intrinsic::ID ClampIntrinsic) {
static Intrinsic::ID getMinForClamp(Intrinsic::ID ClampIntrinsic) {
if (ClampIntrinsic == Intrinsic::dx_uclamp)
return Intrinsic::umin;
assert(ClampIntrinsic == Intrinsic::dx_clamp);
if (ElemTy->isVectorTy())
ElemTy = ElemTy->getScalarType();
if (ElemTy->isIntegerTy())
if (ClampIntrinsic == Intrinsic::dx_sclamp)
return Intrinsic::smin;
assert(ElemTy->isFloatingPointTy());
assert(ClampIntrinsic == Intrinsic::dx_nclamp);
return Intrinsic::minnum;
}

Expand All @@ -485,9 +478,9 @@ static Value *expandClampIntrinsic(CallInst *Orig,
Value *Max = Orig->getOperand(2);
Type *Ty = X->getType();
IRBuilder<> Builder(Orig);
auto *MaxCall = Builder.CreateIntrinsic(
Ty, getMaxForClamp(Ty, ClampIntrinsic), {X, Min}, nullptr, "dx.max");
return Builder.CreateIntrinsic(Ty, getMinForClamp(Ty, ClampIntrinsic),
auto *MaxCall = Builder.CreateIntrinsic(Ty, getMaxForClamp(ClampIntrinsic),
{X, Min}, nullptr, "dx.max");
return Builder.CreateIntrinsic(Ty, getMinForClamp(ClampIntrinsic),
{MaxCall, Max}, nullptr, "dx.min");
}

Expand Down Expand Up @@ -555,7 +548,8 @@ static bool expandIntrinsic(Function &F, CallInst *Orig) {
Result = expandCrossIntrinsic(Orig);
break;
case Intrinsic::dx_uclamp:
case Intrinsic::dx_clamp:
case Intrinsic::dx_sclamp:
case Intrinsic::dx_nclamp:
Result = expandClampIntrinsic(Orig, IntrinsicId);
break;
case Intrinsic::dx_degrees:
Expand Down
Loading
Loading