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[LLVM][TableGen] Use const record pointers in TableGen/Common files (#…
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…109467)

Use const record pointers in TableGen/Common files.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
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jurahul authored Sep 23, 2024
1 parent 706e710 commit 3138eb5
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Showing 12 changed files with 227 additions and 232 deletions.
158 changes: 73 additions & 85 deletions llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp

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84 changes: 43 additions & 41 deletions llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
Original file line number Diff line number Diff line change
Expand Up @@ -582,13 +582,13 @@ class TreePredicateFn {
/// If non-null, indicates that this predicate is a predefined memory VT
/// predicate for a load/store and returns the ValueType record for the memory
/// VT.
Record *getMemoryVT() const;
const Record *getMemoryVT() const;
/// If non-null, indicates that this predicate is a predefined memory VT
/// predicate (checking only the scalar type) for load/store and returns the
/// ValueType record for the memory VT.
Record *getScalarMemoryVT() const;
const Record *getScalarMemoryVT() const;

ListInit *getAddressSpaces() const;
const ListInit *getAddressSpaces() const;
int64_t getMinAlignment() const;

// If true, indicates that GlobalISel-based C++ code was supplied.
Expand Down Expand Up @@ -634,7 +634,7 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
/// OperatorOrVal - The Record for the operator if this is an interior node
/// (not a leaf) or the init value (e.g. the "GPRC" record, or "7") for a
/// leaf.
PointerUnion<const Record *, Init *> OperatorOrVal;
PointerUnion<const Record *, const Init *> OperatorOrVal;

/// Name - The name given to this node with the :$foo notation.
///
Expand All @@ -648,7 +648,7 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {

/// TransformFn - The transformation function to execute on this node before
/// it can be substituted into the resulting instruction on a pattern match.
Record *TransformFn;
const Record *TransformFn;

std::vector<TreePatternNodePtr> Children;

Expand All @@ -664,7 +664,7 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
ResultPerm.resize(NumResults);
std::iota(ResultPerm.begin(), ResultPerm.end(), 0);
}
TreePatternNode(Init *val, unsigned NumResults) // leaf ctor
TreePatternNode(const Init *val, unsigned NumResults) // leaf ctor
: OperatorOrVal(val), TransformFn(nullptr) {
Types.resize(NumResults);
ResultPerm.resize(NumResults);
Expand All @@ -685,7 +685,7 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
NamesAsPredicateArg.push_back(N);
}

bool isLeaf() const { return isa<Init *>(OperatorOrVal); }
bool isLeaf() const { return isa<const Init *>(OperatorOrVal); }

// Type accessors.
unsigned getNumTypes() const { return Types.size(); }
Expand Down Expand Up @@ -713,9 +713,9 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
unsigned getResultIndex(unsigned ResNo) const { return ResultPerm[ResNo]; }
void setResultIndex(unsigned ResNo, unsigned RI) { ResultPerm[ResNo] = RI; }

Init *getLeafValue() const {
const Init *getLeafValue() const {
assert(isLeaf());
return cast<Init *>(OperatorOrVal);
return cast<const Init *>(OperatorOrVal);
}
const Record *getOperator() const {
assert(!isLeaf());
Expand Down Expand Up @@ -766,8 +766,8 @@ class TreePatternNode : public RefCountedBase<TreePatternNode> {
addPredicateCall(TreePredicateCall(Fn, Scope));
}

Record *getTransformFn() const { return TransformFn; }
void setTransformFn(Record *Fn) { TransformFn = Fn; }
const Record *getTransformFn() const { return TransformFn; }
void setTransformFn(const Record *Fn) { TransformFn = Fn; }

/// getIntrinsicInfo - If this node corresponds to an intrinsic, return the
/// CodeGenIntrinsic information for it, otherwise return a null pointer.
Expand Down Expand Up @@ -901,14 +901,14 @@ class TreePattern {
/// ComplexPattern. This records the ComplexPattern instance and the operand
/// number for each operand encountered in a ComplexPattern to aid in that
/// check.
StringMap<std::pair<Record *, unsigned>> ComplexPatternOperands;
StringMap<std::pair<const Record *, unsigned>> ComplexPatternOperands;

TypeInfer Infer;

public:
/// TreePattern constructor - Parse the specified DagInits into the
/// current record.
TreePattern(const Record *TheRec, ListInit *RawPat, bool isInput,
TreePattern(const Record *TheRec, const ListInit *RawPat, bool isInput,
CodeGenDAGPatterns &ise);
TreePattern(const Record *TheRec, DagInit *Pat, bool isInput,
CodeGenDAGPatterns &ise);
Expand Down Expand Up @@ -1013,24 +1013,24 @@ struct DAGDefaultOperand {
class DAGInstruction {
std::vector<const Record *> Results;
std::vector<const Record *> Operands;
std::vector<Record *> ImpResults;
std::vector<const Record *> ImpResults;
TreePatternNodePtr SrcPattern;
TreePatternNodePtr ResultPattern;

public:
DAGInstruction(std::vector<const Record *> &&results,
std::vector<const Record *> &&operands,
std::vector<Record *> &&impresults,
TreePatternNodePtr srcpattern = nullptr,
TreePatternNodePtr resultpattern = nullptr)
: Results(std::move(results)), Operands(std::move(operands)),
ImpResults(std::move(impresults)), SrcPattern(srcpattern),
ResultPattern(resultpattern) {}
DAGInstruction(std::vector<const Record *> &&Results,
std::vector<const Record *> &&Operands,
std::vector<const Record *> &&ImpResults,
TreePatternNodePtr SrcPattern = nullptr,
TreePatternNodePtr ResultPattern = nullptr)
: Results(std::move(Results)), Operands(std::move(Operands)),
ImpResults(std::move(ImpResults)), SrcPattern(SrcPattern),
ResultPattern(ResultPattern) {}

unsigned getNumResults() const { return Results.size(); }
unsigned getNumOperands() const { return Operands.size(); }
unsigned getNumImpResults() const { return ImpResults.size(); }
const std::vector<Record *> &getImpResults() const { return ImpResults; }
ArrayRef<const Record *> getImpResults() const { return ImpResults; }

const Record *getResult(unsigned RN) const {
assert(RN < Results.size());
Expand All @@ -1042,7 +1042,7 @@ class DAGInstruction {
return Operands[ON];
}

Record *getImpResult(unsigned RN) const {
const Record *getImpResult(unsigned RN) const {
assert(RN < ImpResults.size());
return ImpResults[RN];
}
Expand All @@ -1058,7 +1058,7 @@ class PatternToMatch {
ListInit *Predicates; // Top level predicate conditions to match.
TreePatternNodePtr SrcPattern; // Source pattern to match.
TreePatternNodePtr DstPattern; // Resulting pattern.
std::vector<Record *> Dstregs; // Physical register defs being matched.
std::vector<const Record *> Dstregs; // Physical register defs being matched.
std::string HwModeFeatures;
int AddedComplexity; // Add to matching pattern complexity.
bool GISelShouldIgnore; // Should GlobalISel ignore importing this pattern.
Expand All @@ -1067,27 +1067,27 @@ class PatternToMatch {
public:
PatternToMatch(const Record *srcrecord, ListInit *preds,
TreePatternNodePtr src, TreePatternNodePtr dst,
std::vector<Record *> dstregs, int complexity, unsigned uid,
ArrayRef<const Record *> dstregs, int complexity, unsigned uid,
bool ignore, const Twine &hwmodefeatures = "")
: SrcRecord(srcrecord), Predicates(preds), SrcPattern(src),
DstPattern(dst), Dstregs(std::move(dstregs)),
HwModeFeatures(hwmodefeatures.str()), AddedComplexity(complexity),
GISelShouldIgnore(ignore), ID(uid) {}
DstPattern(dst), Dstregs(dstregs), HwModeFeatures(hwmodefeatures.str()),
AddedComplexity(complexity), GISelShouldIgnore(ignore), ID(uid) {}

const Record *getSrcRecord() const { return SrcRecord; }
ListInit *getPredicates() const { return Predicates; }
TreePatternNode &getSrcPattern() const { return *SrcPattern; }
TreePatternNodePtr getSrcPatternShared() const { return SrcPattern; }
TreePatternNode &getDstPattern() const { return *DstPattern; }
TreePatternNodePtr getDstPatternShared() const { return DstPattern; }
const std::vector<Record *> &getDstRegs() const { return Dstregs; }
ArrayRef<const Record *> getDstRegs() const { return Dstregs; }
StringRef getHwModeFeatures() const { return HwModeFeatures; }
int getAddedComplexity() const { return AddedComplexity; }
bool getGISelShouldIgnore() const { return GISelShouldIgnore; }
unsigned getID() const { return ID; }

std::string getPredicateCheck() const;
void getPredicateRecords(SmallVectorImpl<Record *> &PredicateRecs) const;
void
getPredicateRecords(SmallVectorImpl<const Record *> &PredicateRecs) const;

/// Compute the complexity metric for the input pattern. This roughly
/// corresponds to the number of nodes that are covered.
Expand All @@ -1113,8 +1113,8 @@ class CodeGenDAGPatterns {
std::map<const Record *, DAGInstruction, LessRecordByID> Instructions;

// Specific SDNode definitions:
Record *intrinsic_void_sdnode;
Record *intrinsic_w_chain_sdnode, *intrinsic_wo_chain_sdnode;
const Record *intrinsic_void_sdnode;
const Record *intrinsic_w_chain_sdnode, *intrinsic_wo_chain_sdnode;

/// PatternsToMatch - All of the things we are matching on the DAG. The first
/// value is the pattern to match, the second pattern is the result to
Expand All @@ -1136,7 +1136,7 @@ class CodeGenDAGPatterns {
const CodeGenTarget &getTargetInfo() const { return Target; }
const TypeSetByHwMode &getLegalTypes() const { return LegalVTS; }

Record *getSDNodeNamed(StringRef Name) const;
const Record *getSDNodeNamed(StringRef Name) const;

const SDNodeInfo &getSDNodeInfo(const Record *R) const {
auto F = SDNodes.find(R);
Expand Down Expand Up @@ -1170,7 +1170,7 @@ class CodeGenDAGPatterns {
llvm_unreachable("Bad intrinsic ID!");
}

unsigned getIntrinsicID(Record *R) const {
unsigned getIntrinsicID(const Record *R) const {
for (unsigned i = 0, e = Intrinsics.size(); i != e; ++i)
if (Intrinsics[i].TheDef == R)
return i;
Expand Down Expand Up @@ -1209,7 +1209,7 @@ class CodeGenDAGPatterns {

/// Parse the Pattern for an instruction, and insert the result in DAGInsts.
typedef std::map<const Record *, DAGInstruction, LessRecordByID> DAGInstMap;
void parseInstructionPattern(CodeGenInstruction &CGI, ListInit *Pattern,
void parseInstructionPattern(CodeGenInstruction &CGI, const ListInit *Pattern,
DAGInstMap &DAGInsts);

const DAGInstruction &getInstruction(const Record *R) const {
Expand All @@ -1218,11 +1218,13 @@ class CodeGenDAGPatterns {
return F->second;
}

Record *get_intrinsic_void_sdnode() const { return intrinsic_void_sdnode; }
Record *get_intrinsic_w_chain_sdnode() const {
const Record *get_intrinsic_void_sdnode() const {
return intrinsic_void_sdnode;
}
const Record *get_intrinsic_w_chain_sdnode() const {
return intrinsic_w_chain_sdnode;
}
Record *get_intrinsic_wo_chain_sdnode() const {
const Record *get_intrinsic_wo_chain_sdnode() const {
return intrinsic_wo_chain_sdnode;
}

Expand All @@ -1248,15 +1250,15 @@ class CodeGenDAGPatterns {

void ParseOnePattern(const Record *TheDef, TreePattern &Pattern,
TreePattern &Result,
const std::vector<Record *> &InstImpResults,
ArrayRef<const Record *> InstImpResults,
bool ShouldIgnore = false);
void AddPatternToMatch(TreePattern *Pattern, PatternToMatch &&PTM);
void FindPatternInputsAndOutputs(
TreePattern &I, TreePatternNodePtr Pat,
std::map<std::string, TreePatternNodePtr> &InstInputs,
MapVector<std::string, TreePatternNodePtr,
std::map<std::string, unsigned>> &InstResults,
std::vector<Record *> &InstImpResults);
std::vector<const Record *> &InstImpResults);
unsigned getNewUID();
};

Expand Down
10 changes: 5 additions & 5 deletions llvm/utils/TableGen/Common/CodeGenHwModes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -39,8 +39,8 @@ LLVM_DUMP_METHOD
void HwMode::dump() const { dbgs() << Name << ": " << Features << '\n'; }

HwModeSelect::HwModeSelect(const Record *R, CodeGenHwModes &CGH) {
std::vector<Record *> Modes = R->getValueAsListOfDefs("Modes");
std::vector<Record *> Objects = R->getValueAsListOfDefs("Objects");
std::vector<const Record *> Modes = R->getValueAsListOfConstDefs("Modes");
std::vector<const Record *> Objects = R->getValueAsListOfConstDefs("Objects");
if (Modes.size() != Objects.size()) {
PrintError(
R->getLoc(),
Expand All @@ -49,9 +49,9 @@ HwModeSelect::HwModeSelect(const Record *R, CodeGenHwModes &CGH) {
"have the same size");
report_fatal_error("error in target description.");
}
for (unsigned i = 0, e = Modes.size(); i != e; ++i) {
unsigned ModeId = CGH.getHwModeId(Modes[i]);
Items.push_back(std::pair(ModeId, Objects[i]));
for (auto [Mode, Object] : zip_equal(Modes, Objects)) {
unsigned ModeId = CGH.getHwModeId(Mode);
Items.push_back(std::pair(ModeId, Object));
}
}

Expand Down
33 changes: 16 additions & 17 deletions llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,9 @@ bool CodeGenInstAlias::tryAliasOpMatch(const DagInit *Result,
ArrayRef<SMLoc> Loc,
const CodeGenTarget &T,
ResultOperand &ResOp) {
Init *Arg = Result->getArg(AliasOpNo);
DefInit *ADI = dyn_cast<DefInit>(Arg);
Record *ResultRecord = ADI ? ADI->getDef() : nullptr;
const Init *Arg = Result->getArg(AliasOpNo);
const DefInit *ADI = dyn_cast<DefInit>(Arg);
const Record *ResultRecord = ADI ? ADI->getDef() : nullptr;

if (ADI && ADI->getDef() == InstOpRec) {
// If the operand is a record, it must have a name, and the record type
Expand Down Expand Up @@ -102,12 +102,12 @@ bool CodeGenInstAlias::tryAliasOpMatch(const DagInit *Result,
// throw TGError(Loc, "reg0 used for result that is not an "
// "OptionalDefOperand!");

ResOp = ResultOperand(static_cast<Record *>(nullptr));
ResOp = ResultOperand(nullptr);
return true;
}

// Literal integers.
if (IntInit *II = dyn_cast<IntInit>(Arg)) {
if (const IntInit *II = dyn_cast<IntInit>(Arg)) {
if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
return false;
// Integer arguments can't have names.
Expand All @@ -119,17 +119,16 @@ bool CodeGenInstAlias::tryAliasOpMatch(const DagInit *Result,
}

// Bits<n> (also used for 0bxx literals)
if (BitsInit *BI = dyn_cast<BitsInit>(Arg)) {
if (const BitsInit *BI = dyn_cast<BitsInit>(Arg)) {
if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
return false;
if (!BI->isComplete())
return false;
// Convert the bits init to an integer and use that for the result.
IntInit *II = dyn_cast_or_null<IntInit>(
BI->convertInitializerTo(IntRecTy::get(BI->getRecordKeeper())));
if (!II)
std::optional<int64_t> Value = BI->convertInitializerToInt();
if (!Value)
return false;
ResOp = ResultOperand(II->getValue());
ResOp = ResultOperand(*Value);
return true;
}

Expand Down Expand Up @@ -182,15 +181,15 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)

// NameClass - If argument names are repeated, we need to verify they have
// the same class.
StringMap<Record *> NameClass;
StringMap<const Record *> NameClass;
for (unsigned i = 0, e = Result->getNumArgs(); i != e; ++i) {
DefInit *ADI = dyn_cast<DefInit>(Result->getArg(i));
const DefInit *ADI = dyn_cast<DefInit>(Result->getArg(i));
if (!ADI || !Result->getArgName(i))
continue;
// Verify we don't have something like: (someinst GR16:$foo, GR32:$foo)
// $foo can exist multiple times in the result list, but it must have the
// same type.
Record *&Entry = NameClass[Result->getArgNameStr(i)];
const Record *&Entry = NameClass[Result->getArgNameStr(i)];
if (Entry && Entry != ADI->getDef())
PrintFatalError(R->getLoc(), "result value $" + Result->getArgNameStr(i) +
" is both " + Entry->getName() +
Expand Down Expand Up @@ -235,9 +234,9 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)

// Otherwise, we need to match each of the suboperands individually.
} else {
DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
const DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) {
Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
const Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();

// Take care to instantiate each of the suboperands with the correct
// nomenclature: $foo.bar
Expand All @@ -255,11 +254,11 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
// If the argument did not match the instruction operand, and the operand
// is composed of multiple suboperands, try matching the suboperands.
if (NumSubOps > 1) {
DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
const DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) {
if (AliasOpNo >= Result->getNumArgs())
PrintFatalError(R->getLoc(), "not enough arguments for instruction!");
Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
const Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false, R->getLoc(), T,
ResOp)) {
ResultOperands.push_back(ResOp);
Expand Down
2 changes: 1 addition & 1 deletion llvm/utils/TableGen/Common/CodeGenInstAlias.h
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ class CodeGenInstAlias {
ResultOperand(std::string N, const Record *R)
: Name(std::move(N)), R(R), Kind(K_Record) {}
ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {}
ResultOperand(Record *R) : R(R), Kind(K_Reg) {}
ResultOperand(const Record *R) : R(R), Kind(K_Reg) {}

bool isRecord() const { return Kind == K_Record; }
bool isImm() const { return Kind == K_Imm; }
Expand Down
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