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Fix SSE Instructions for XED v2022.04.17 (#597)
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* added logging

* add logging

* add op corresponding to read

* same fix for movhps

* add fillers to MOVLPD

* add filler to MOVLPS

* add filler to CVTSD2SS

* filler for CVTSS2SD

* remove logging

* bump cxx-common

* drop llvm-12 support

* drop in other runs

* add dummy read to MOVHLPS

* change ISEL to match size from xed update

* fix MOVLHPS

* fix VMOVDDUP_XMMdq_XMMdq size
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2over12 authored Jun 4, 2022
1 parent 85d287c commit 9b05e6f
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Showing 5 changed files with 20 additions and 18 deletions.
6 changes: 3 additions & 3 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ jobs:
matrix:
image:
- { name: 'ubuntu', tag: '20.04' }
llvm: ['12', '13']
llvm: ['13']

runs-on: ubuntu-20.04
container:
Expand Down Expand Up @@ -94,7 +94,7 @@ jobs:
fail-fast: false
matrix:
os: ['macos-11']
llvm: ['12', '13']
llvm: ['13']

runs-on: ${{ matrix.os }}

Expand Down Expand Up @@ -215,7 +215,7 @@ jobs:
runs-on: ubuntu-latest
strategy:
matrix:
llvm: ["12", "13"]
llvm: ["13"]
ubuntu: ["20.04"]
steps:
- uses: actions/checkout@v2
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4 changes: 2 additions & 2 deletions lib/Arch/X86/Semantics/CONVERT.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -307,7 +307,7 @@ IF_AVX(IF_64BIT(
namespace {

template <typename S1>
DEF_SEM(CVTSD2SS, V128W dst, S1 src) {
DEF_SEM(CVTSD2SS, V128W dst, V128 _nop_read, S1 src) {
FWriteV32(dst, FInsertV32(FReadV32(dst), 0,
Float32(FExtractV64(FReadV64(src), 0))));
return memory;
Expand Down Expand Up @@ -349,7 +349,7 @@ DEF_SEM(CVTSI2SD, V128W dst, V128 src1, S2 src2) {
}

template <typename S2>
DEF_SEM(CVTSS2SD, VV128W dst_src1, S2 src2) {
DEF_SEM(CVTSS2SD, VV128W dst_src1, V128 _nop_read, S2 src2) {
auto src1_vec = FReadV64(dst_src1);
auto src2_vec = FReadV32(src2);
auto conv_val = Float64(FExtractV32(src2_vec, 0));
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24 changes: 13 additions & 11 deletions lib/Arch/X86/Semantics/DATAXFER.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -84,16 +84,16 @@ DEF_SEM(MOVDQx, D dst, S src) {
return memory;
}

template <typename D, typename S>
DEF_SEM(MOVLPS, D dst, S src) {
template <typename D, typename S, typename... Fs>
DEF_SEM(MOVLPS, D dst, Fs... _nop_fillers, S src) {
auto src_vec = FReadV32(src);
auto low1 = FExtractV32(src_vec, 0);
auto low2 = FExtractV32(src_vec, 1);
FWriteV32(dst, FInsertV32(FInsertV32(FReadV32(dst), 0, low1), 1, low2));
return memory;
}

DEF_SEM(MOVLHPS, V128W dst, V128 src) {
DEF_SEM(MOVLHPS, V128W dst, V128 _noop_read, V128 src) {
auto res = FReadV32(dst);
auto src1 = FReadV32(src);
res = FInsertV32(res, 2, FExtractV32(src1, 0));
Expand All @@ -102,7 +102,7 @@ DEF_SEM(MOVLHPS, V128W dst, V128 src) {
return memory;
}

DEF_SEM(MOVHLPS, V128W dst, V128 src) {
DEF_SEM(MOVHLPS, V128W dst, V128 _nop_read, V128 src) {
auto res = FReadV32(dst);
auto src1 = FReadV32(src);
res = FInsertV32(res, 0, FExtractV32(src1, 2));
Expand All @@ -111,8 +111,8 @@ DEF_SEM(MOVHLPS, V128W dst, V128 src) {
return memory;
}

template <typename D, typename S>
DEF_SEM(MOVLPD, D dst, S src) {
template <typename D, typename S, typename... Fs>
DEF_SEM(MOVLPD, D dst, Fs... fargs, S src) {
FWriteV64(dst, FInsertV64(FReadV64(dst), 0, FExtractV64(FReadV64(src), 0)));
return memory;
}
Expand Down Expand Up @@ -466,8 +466,8 @@ DEF_ISEL(VMOVDQA_MEMqq_YMMqq) = MOVDQx<MV256W, VV256>;
DEF_ISEL(VMOVDQA_YMMqq_YMMqq_7F) = MOVDQx<VV256W, VV256>;
#endif // HAS_FEATURE_AVX

DEF_ISEL(MOVLPS_MEMq_XMMps) = MOVLPS<MV64W, V128>;
DEF_ISEL(MOVLPS_XMMq_MEMq) = MOVLPS<V128W, MV64>;
DEF_ISEL(MOVLPS_MEMq_XMMq) = MOVLPS<MV64W, V128>;
DEF_ISEL(MOVLPS_XMMq_MEMq) = MOVLPS<V128W, MV64, V128>;
IF_AVX(DEF_ISEL(VMOVLPS_MEMq_XMMq) = MOVLPS<MV64W, VV128>;)
IF_AVX(DEF_ISEL(VMOVLPS_XMMdq_XMMdq_MEMq) = VMOVLPS;)

Expand All @@ -487,7 +487,7 @@ IF_AVX(DEF_ISEL(VMOVLHPS_XMMdq_XMMdq_XMMdq) = VMOVLHPS;)
# endif // HAS_FEATURE_AVX512
#endif // HAS_FEATURE_AVX

DEF_ISEL(MOVLPD_XMMsd_MEMq) = MOVLPD<V128W, MV64>;
DEF_ISEL(MOVLPD_XMMsd_MEMq) = MOVLPD<V128W, MV64, V128>;
DEF_ISEL(MOVLPD_MEMq_XMMsd) = MOVLPD<MV64W, V128>;
IF_AVX(DEF_ISEL(VMOVLPD_MEMq_XMMq) = MOVLPD<MV64W, VV128>;)
IF_AVX(DEF_ISEL(VMOVLPD_XMMdq_XMMdq_MEMq) = VMOVLPD;)
Expand Down Expand Up @@ -585,7 +585,8 @@ DEF_ISEL(MOVNTSS_MEMd_XMMd) = MOVSS_MEM<MV32W, V128>;

namespace {

DEF_SEM(MOVHPD, V128W dst, MV64 src) {
// NOTE(Ian): Latest xed adds a read operand referring to the read of lower bits.
DEF_SEM(MOVHPD, V128W dst, V128 _nop_read, MV64 src) {
FWriteV64(dst, FInsertV64(FReadV64(dst), 1, FExtractV64(FReadV64(src), 0)));
return memory;
}
Expand Down Expand Up @@ -616,7 +617,8 @@ IF_AVX(DEF_ISEL(VMOVHPD_MEMq_XMMdq) = MOVHPD_STORE;)

namespace {

DEF_SEM(MOVHPS, V128W dst, MV64 src) {
// NOTE(Ian): Xed adds a read op for the bits read but not written to.
DEF_SEM(MOVHPS, V128W dst, V128 _nop_read, MV64 src) {
auto dst_vec = FReadV32(dst);
auto src_vec = FReadV32(src);
auto low_entry = FExtractV32(src_vec, 0);
Expand Down
2 changes: 1 addition & 1 deletion lib/Arch/X86/Semantics/SSE.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1616,7 +1616,7 @@ DEF_SEM(MOVDDUP, D dst, S1 src) {
DEF_ISEL(MOVDDUP_XMMdq_MEMq) = MOVDDUP<V128W, MV64>;
DEF_ISEL(MOVDDUP_XMMdq_XMMq) = MOVDDUP<V128W, V128>;
IF_AVX(DEF_ISEL(VMOVDDUP_XMMdq_MEMq) = MOVDDUP<VV128W, MV64>;)
IF_AVX(DEF_ISEL(VMOVDDUP_XMMdq_XMMdq) = MOVDDUP<VV128W, V128>;)
IF_AVX(DEF_ISEL(VMOVDDUP_XMMdq_XMMq) = MOVDDUP<VV128W, V128>;)
/*
2320 VMOVDDUP VMOVDDUP_YMMqq_MEMqq DATAXFER AVX AVX ATTRIBUTES:
2321 VMOVDDUP VMOVDDUP_YMMqq_YMMqq DATAXFER AVX AVX ATTRIBUTES:
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2 changes: 1 addition & 1 deletion scripts/build.sh
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ LLVM_VERSION=llvm-13
OS_VERSION=
ARCH_VERSION=
BUILD_FLAGS=
CXX_COMMON_VERSION="v0.1.8"
CXX_COMMON_VERSION="v0.2.7"

# There are pre-build versions of various libraries for specific
# Ubuntu releases.
Expand Down

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