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Add prebuild library #119
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Add prebuild library #119
Commits on Mar 5, 2019
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freedreno: a2xx: add use_hw_binning function
Fixes: cb2322c Signed-off-by: Jonathan Marek <[email protected]> (cherry picked from commit 8eca6df)
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freedreno: a2xx: fix fast clear for some gmem configurations
In freedreno_gmem.c, gmem_align of 0x8000 is used. Alignment used here should be the same. Fixes: 912a9c8 Signed-off-by: Jonathan Marek <[email protected]> (cherry picked from commit 4f23767)
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freedreno: a2xx: fix mipmapping for NPOT textures
Fixes: 3a273a4 Signed-off-by: Jonathan Marek <[email protected]> (cherry picked from commit 6c0fefb)
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freedreno: use renderonly path for buffers allocated with modifiers
Now that freedreno has create_with_modifiers(), this "hack" is needed to make some cases work. Copied from vc4. Fixes: 41ddf1d Signed-off-by: Jonathan Marek <[email protected]> (cherry picked from commit e3591b0)
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intel/compiler: use correct swizzle for replacement
The optimization in 4cd1a0b introduced a replacement of : cmp(8).z.f0.0 vgrf11.y:D, vgrf10.xxxx:D, vgrf2.xyyy:D ... cmp(8).nz.f0.0 null.x:D, vgrf11.yyyy:D, 0D By : cmp(8).z.f0.0 vgrf15.x:D, vgrf10.xxxx:D, vgrf2.yyyy:D ... mov(8) vgrf11.y:D, vgrf15.yyyy:D The first cmp instruction is storing in x while the second mov is sourcing from y. We need to take into account where the replacement on the scan_inst destination is going to store thing so that the replacement mov can source things from the correct location. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 4cd1a0b ("i965/vec4: Propagate conditional modifiers from more compares to other compares") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109759 Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 6e18414)
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i965: Fix allow_higher_compat_version workaround limited by OpenGL 3.0
Added check for higher compat profile being allowed before assigning certain extensions. Fixes: 272fe94 (mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile) Signed-off-by: Danylo Piliaiev <[email protected]> Signed-off-by: Yevhenii Kolesnikov <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107052 (cherry picked from commit 07f4b4e)
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glsl: fix shader cache for packed param list
Some types of params such as some builtins are always padded. We need to keep track of this so we can restore the list correctly. Here we also remove a couple of cache entries that are not actually required as they get rebuilt by the _mesa_add_parameter() calls. This patch fixes a bunch of arb_texture_multisample and arb_sample_shading piglit tests for the radeonsi NIR backend. Fixes: edded12 ("mesa: rework ParameterList to allow packing") Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 7536af6)
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glx: fix shared memory leak in X11
call XShmDetach to allow X server to free shared memory Fixes: bcd80be "drisw/glx: use XShm if possible" Signed-off-by: Ray Zhang <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit b344e32)
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glsl: TCS outputs can not be transform feedback candidates on GLES
Avoids regression on: KHR-GLES*.core.tessellation_shader.single.xfb_captures_data_from_correct_stage that is uncovered by the following patch. "glsl: fix recording of variables for XFB in TCS shaders" v2: Rebased over glsl: fix recording of variables for XFB in TCS shaders v3: Move this patch before "glsl: fix recording of variables for XFB in TCS shaders" to avoid temporal regressions. (Illia Mirkin) Cc: 19.0 <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit bf1f494)
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glsl: fix recording of variables for XFB in TCS shaders
This is purely for conformance, since it's not actually possible to do XFB on TCS output varyings. However we do have to make sure we record the names correctly, and this removes an extra level of array-ness from the names in question. Fixes KHR-GL45.tessellation_shader.single.xfb_captures_data_from_correct_stage v2: Add comment to the new program_resource_visitor::process function. (Ilia Mirkin) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108457 Signed-off-by: Ilia Mirkin <[email protected]> Cc: 19.0 <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 4eec3a2)
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android: anv: fix generated files depedencies (v2)
Fix anv_extrypoints.{c,h} and anv_extensions.{c,h} missing dependencies Rename the variable labels according to targets and python scripts Align the building rules as per Automake for simplification Fixes building errors during rebuils due to missing dependencies (v2) Fixed a missing $(VULKAN_API_XML) reference Fixes: 9a508b7 ("android: anv/extensions: fix generated sources build") Fixes: dd088d4 ("anv/extensions: Generate a header file with extension tables") Signed-off-by: Mauro Rossi <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Cc: "19.0" <[email protected]> (cherry picked from commit 14e7e26)
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android: anv: fix libexpat shared dependency
Fixes undefined reference building errors for XML_* functions Signed-off-by: Mauro Rossi <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: "19.0" <[email protected]> (cherry picked from commit ec0f465)
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st/nine: Ignore window size if error
Check GetWindowInfo and ignore the computed sizes if there is an error. Fixes a regression caused by earlier commit when using old wine gallium nine patches. Should also address a crash at window destruction. Related issues: iXit/Mesa-3D#331 iXit/Mesa-3D#332 Cc: [email protected] Fixes: 2318ca6 ("st/nine: Handle window resize when a presentation buffer is used") Signed-off-by: Axel Davy <[email protected]> (cherry picked from commit 86666f0)
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st/nine: Ignore multisample quality level if no ms
Apparently instead of returning error when passing a quality level different than 0 for D3DMULTISAMPLE_NONE, we should pass. Fixes: iXit/Mesa-3D#340 Cc: [email protected] Signed-off-by: Axel Davy <[email protected]> (cherry picked from commit 1d363d4)
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anv: Count surfaces for non-YCbCr images in GetDescriptorSetLayoutSup…
…port We were accidentally not counting those surfaces Fixes: ddc4069 "anv: Implement VK_KHR_maintenance3" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 5049fbd)
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spirv: OpImageQueryLod requires a sampler
No idea how this fell through the cracks besides the fact that the sampler bound at 0 almost always works and the CTS isn't amazing. In any case, this appears to have been broken for almost forever. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected] (cherry picked from commit ca295dd)
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intel,nir: Lower TXD with min_lod when the sampler index is not < 16
When we have a larger sampler index, we get into the "high sampler" scenario and need an instruction header. Even in SIMD8, this pushes the instruction over the sampler message size maximum of 11 registers. Instead, we have to lower TXD to TXL. Fixes: cb98e07 "intel/fs: Support min_lod parameters on texture..." Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 5c96120)
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anv: retain the is_array state in create_plane_tex_instr_implicit
This does not seem to fix anything ATM but is the right thing todo. Signed-off-by: Tapani Pälli <[email protected]> Fixes: f3e91e7 ("anv: add nir lowering pass for ycbcr textures") Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 33bf3d5)
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This function was never used, and isn't properly guarded by HAVE_LIBDRM, breaking the build on systems that don't have libdrm. Let's just remove it. Fixes: 7552fcb "egl: add base EGL_EXT_device_base implementation" Reported-by: Timo Aaltonen <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Emil Velikov <[email protected]> (cherry picked from commit bcc4bfc)
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radv: properly align the fence and EOP bug VA on GFX9
If alignement is 0, offets returned by radv_cmd_buffer_upload_alloc() are always 0. These two virtual addresses were pointing at the same location. Cc: 18.3 19.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit c2a1486)
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Commits on Mar 6, 2019
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Commits on Mar 7, 2019
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spirv: Pull offset/stride from the pointer for OpArrayLength
We can't pull it from the variable type because it might be an array of blocks and not just the one block. While we're here, throw in some error checking. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected] (cherry picked from commit f1dbc7e)
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intel/fs: nir_op_extract_i8 extracts a byte, not a word
Fixes: 6ac2d16 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 4aaf139)
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intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer
In the old code, we would generate the exact same instruction for extract_u8(some_u64, 0) and extract_u8(some_u64, 1). The mask-a-word trick only works for even numbered bytes. This fixes the (new) piglit test tests/spec/arb_gpu_shader_int64/execution/fs-ushr-and-mask.shader_test. v2: Use a SHR instead of an AND. This saves an instruction compared to using two moves. Suggested by Jason. Fixes: 6ac2d16 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 55e6454)
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Commits on Mar 8, 2019
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This variable is now unused, so let's remove it. Fixes: db77573 (virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BIT) Reviewed-by: Gurchetan Singh <[email protected]> (cherry picked from commit 44620d4)
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Commits on Mar 12, 2019
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anv: Refactor descriptor pushing a bit
Pull the common code out of the two entrypoints into the helper which fetches the push descriptor set for us. Now that it does more than just get a thing, call it anv_cmd_buffer_push_descriptor_set. Cc: "19.0" <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
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anv: Take references to push descriptor set layouts
Technically, descriptor set layouts aren't required to survive past the function they're passed into so we need to reference them. Cc: "19.0" <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
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svga: remove SVGA_RELOC_READ flag in SVGA3D_BindGBSurface()
This fixes a rendering issue where UBO updates aren't always picked up by drawing calls. This issue effected the Webots robotics simulator. VMware bug 2175527. Testing Done: Webots replay, piglit, misc Linux games Reviewed-by: Thomas Hellstrom <[email protected]> (cherry picked from commit d4381cf)
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st/dri: Set the PIPE_BIND_SHARED flag on create_image_with_modifiers.
With createImage(), the caller was expected to set a SHARED flag if they needed the ability to get a GEM handle. DRI3, wayland, and gbm all set it, EGL_MESA_drm_image passes it through, and surfaceless doesn't need it because there's no way to request a handle. With the new createImageWithModifiers() DRI method to replace it, the expectation is that you'll always be able to share the buffer, so the flag is unnecessary in its arguments. However, we do need to tell gallium about this expectation. Without this, kmscube's modifiers path using gbm_bo_create_with_modifiers(&modifier, 1) instead of gbm_bo_create(SCANOUT | SHARED) will call the driver's resource_create() function wtih PIPE_BIND_SHARED unset, so the driver (particularly renderonly drivers) may allocate in such a way that it can't return an answer from gbm_bo_get_handle(). I used to have a hack in v3d using count==1 && modifier==LINEAR to indicate that you wanted SHARED anyway, but that was dropped recently. Fixes: 59527a3 ("v3d: Restructure RO allocations using resource_from_handle.") Reviewed-by: Kristian H. Kristensen <[email protected]> (cherry picked from commit fafead7)
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anv: release memory allocated by glsl types during spirv_to_nir
Fixes leaks for each glsl_type generated: ==32470== 384 bytes in 3 blocks are possibly lost in loss record 18 of 18 ==32470== at 0x483880B: malloc (vg_replace_malloc.c:309) ==32470== by 0x4C43F4A: ralloc_size (ralloc.c:119) ==32470== by 0x4C44014: rzalloc_size (ralloc.c:151) ==32470== by 0x4C44258: rzalloc_array_size (ralloc.c:215) ==32470== by 0x4D38957: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:114) ==32470== by 0x4D3BEED: glsl_type::get_struct_instance(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:1146) ==32470== by 0x4D42ECC: glsl_struct_type (nir_types.cpp:501) ==32470== by 0x4CDB5A1: vtn_handle_type (spirv_to_nir.c:1269) ==32470== by 0x4CE53DD: vtn_handle_variable_or_type_instruction (spirv_to_nir.c:4018) ==32470== by 0x4CD8CFF: vtn_foreach_instruction (spirv_to_nir.c:365) ==32470== by 0x4CE5E6B: spirv_to_nir (spirv_to_nir.c:4490) ==32470== by 0x497AF10: anv_shader_compile_to_nir (anv_pipeline.c:173) v2: move release call to vkDestroyInstance Signed-off-by: Tapani Pälli <[email protected]> Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 47fc359)
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radv: fix pointSizeRange limits
The values should match the ones that are emitted. This fixes new CTS dEQP-VK.rasterization.primitive_size.points.*. Fixes: f4e499e ("radv: add initial non-conformant radv vulkan driver") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 6403171)
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anv: revert "anv: release memory allocated by glsl types during spirv…
…_to_nir" This reverts commit 47fc359. Reason is that patch did not take in to account situation where we might have both OpenGL and Vulkan using glsl_types at the same time. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit bef3543)
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scons: Compatibility with Scons development version string
This ensures Mesa3D build doesn't fail in this case as encountered when bisecting Scons source code while regression testing https://bugs.freedesktop.org/show_bug.cgi?id=109443 and when testing 3.0.5.a.2 Technical details: Scons version string has consistently been in this format: MajorVersion.MinorVersion.Patch[.alpha/beta.yyyymmdd] so these formulas should strip alpha/beta flags and return Scons version: - as string - `'.'.join(SCons.__version__.split('.')[:3])` - as tuple of integers - `tuple(map(int, SCons.__version__.split('.')[:3]))` - v2: Fixed Scons version retrieval formulas as string and tuple of integers. - v3: Fixed Scons version string format description. Cc: "19.0" <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> (cherry picked from commit 7f89fd1)
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nir: Add a pass for lowering IO back to vector when possible
This pass tries to turn scalar and array-of-scalar IO variables into vector IO variables whenever possible. Reviewed-by: Connor Abbott <[email protected]> Cc: "19.0" <[email protected]> (cherry picked from commit 5ef2b8f)
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The IO scalarization pass that we run to help with linking end up turning some shader I/O such as that for tessellation and geometry shaders into many scalar URB operations rather than one vector one. To alleviate this, we now vectorize the I/O once again. This fixes a 10% performance regression in the GfxBench tessellation test that was caused by scalarizing. Shader-db results on Kaby Lake: total instructions in shared programs: 15224023 -> 15220871 (-0.02%) instructions in affected programs: 342009 -> 338857 (-0.92%) helped: 1236 HURT: 443 total spills in shared programs: 23471 -> 23465 (-0.03%) spills in affected programs: 6 -> 0 helped: 1 HURT: 0 total fills in shared programs: 31770 -> 31766 (-0.01%) fills in affected programs: 4 -> 0 helped: 1 HURT: 0 Cycles was just a lot of churn do to moves being different places. Most of the pure churn in instructions was +/- one or two instructions in fragment shaders. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107510 Fixes: 4434591 "intel/nir: Call nir_lower_io_to_scalar_early" Fixes: 8d82224 "intel/nir: Enable nir_opt_find_array_copies" Reviewed-by: Connor Abbott <[email protected]> (cherry picked from commit 6d5d89d)
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anv: destroy descriptor sets when pool gets destroyed
Patch maintains a list of sets in the pool and destroys possible remaining sets when pool is destroyed. As stated in Vulkan spec: "When a pool is destroyed, all descriptor sets allocated from the pool are implicitly freed and become invalid." This fixes memory leaks spotted with valgrind: ==19622== 96 bytes in 1 blocks are definitely lost in loss record 2 of 3 ==19622== at 0x483880B: malloc (vg_replace_malloc.c:309) ==19622== by 0x495B67E: default_alloc_func (anv_device.c:547) ==19622== by 0x4955E05: vk_alloc (vk_alloc.h:36) ==19622== by 0x4956A8F: anv_multialloc_alloc (anv_private.h:538) ==19622== by 0x4956A8F: anv_CreateDescriptorSetLayout (anv_descriptor_set.c:217) Fixes: 14f6275 ("anv/descriptor_set: add reference counting for descriptor set layouts") Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 105002b) Conflicts resolved by Dylan and Jason
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anv: destroy descriptor sets when pool gets reset
As stated in Vulkan spec: "Resetting a descriptor pool recycles all of the resources from all of the descriptor sets allocated from the descriptor pool back to the descriptor pool, and the descriptor sets are implicitly freed." This fixes dEQP-VK.api.descriptor_pool.* Fixes: 14f6275 "anv/descriptor_set: add reference counting for..." Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Clayton Craft <[email protected]> (cherry picked from commit 775aabd)
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anv: Fix destroying descriptor sets when pool gets reset
pool->next and pool->free_list were reset before their usage in anv_descriptor_pool_free_set Fixes: 775aabd "anv: destroy descriptor sets when pool gets reset" Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 9c80be9)
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Commits on Mar 13, 2019
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radv: set the maximum number of IBs per submit to 192
This fixes random SteamVR corruption, see ValveSoftware/SteamVR-for-Linux#181 Fixes: 4d30f2c ("radv/winsys: remove the max IBs per submit limit for the fallback path") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit ae77f12)
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v3d: Fix leak of the renderonly struct on screen destruction.
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intel/fs: Fix opt_peephole_csel to not throw away saturates.
We were not copying the saturate bit from the original instruction to the new replacement instruction. This caused major misrendering in DiRT Rally on iris, where comparisons leading to discards failed due to the missing saturate, causing lots of extra garbage pixels to be drawn in text rendering, trees, and so on. This did not show up on i965 because st/nir performs a more aggressive version of nir_opt_peephole_select, yielding more b32csel operations. Fixes: 52c7df1 i965/fs: Merge CMP and SEL into CSEL on Gen8+ Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 3570d15)
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glsl/lower_vector_derefs: Don't use a temporary for TCS outputs
Tessellation control shader outputs act as if they have memory backing them and you can have multiple writes to different components of the same vector in-flight at the same time. When this happens, the load vec store pattern that gets used by ir_triop_vector_insert doesn't yield the correct results. Instead, just emit a sequence of conditional assignments. Reviewed-by: Ian Romanick <[email protected]> Cc: [email protected] (cherry picked from commit bd17bdc)
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glsl/list: Add a list variant of insert_after
Reviewed-by: Ian Romanick <[email protected]> Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 20c4578)
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egl/dri: Avoid out of bounds array access
indexConfigAttrib iterates over every index in the dri driver, possibly exceeding __DRI_ATTRIB_MAX. In other words, if the dri driver has newer attributes libEGL will end up reading from uninitialized memory through dri2_to_egl_attribute_map[]. Signed-off-by: Kevin Strasser <[email protected]> Cc: [email protected] Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 70b36c0)
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Commits on Mar 14, 2019
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anv/pass: Flag the need for a RT flush for resolve attachments
Reviewed-by: Nanley Chery <[email protected]> Cc: [email protected] (cherry picked from commit 489bf2d)
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i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9
ARB_fragment_shader_interlock depends on memory fences to ensure fragment ordering and this ordering guarantee is only supported from GEN9 onwards. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109980 Fixes: 9393127 "i965: Add ARB_fragment_shader_interlock support." Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 19ab082)
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radv: always initialize HTILE when the src layout is UNDEFINED
HTILE should always be initialized when transitioning from VK_IMAGE_LAYOUT_UNDEFINED to other image layouts. Otherwise, if an app does a transition from UNDEFINED to GENERAL, the driver doesn't initialize HTILE and it tries to decompress the depth surface. For some reasons, this results in VM faults. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107563 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 3a2e931)
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d3d: meson: do not prefix user provided d3d-drivers-path
The user can select the location where there d3d drivers are installed by the d3d-drivers-path meson option. By default path will be $prefix/$libdir/d3d. Currently we add $prefix to the user provided path. Resulting in an incorrect or even missing path. Based on logic of Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109698 CC: Kenneth Graunke <[email protected]> CC: Emil Velikov <[email protected]> Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit dcc4866)
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Commits on Mar 15, 2019
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mesa: properly report the length of truncated log messages
_mesa_log_msg must provide the length of the string passed into the KHR_debug api. When the string formatted by _mesa_gl_vdebugf exceeds MAX_DEBUG_MESSAGE_LENGTH, the length is incorrectly set to the number of characters that would have been written if enough space had been available. Fixes: 3025680 ("mesa: Add support for GL_ARB_debug_output with dynamic ID allocation.") Reviewed-by: Erik Faye-Lund <[email protected]> (cherry picked from commit eb1a869)
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Commits on Mar 18, 2019
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isl: fix automake build when sse41 is not supported
Fixes: 864cc41 "intel/isl: move tiled_memcpy static libs from i965 to isl" Cc: [email protected] Reported-by: Milav Soni <[email protected]> Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit a1cd004)
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anv: Treat zero size XFB buffer as disabled
Vulkan spec doesn't explicitly forbid zero size transform feedback buffers. Having zero size xfb caused SurfaceSize overflow and triggered assert in debug build. The only way to have zero size SO_BUFFER is to disable SO_BUFFER as stated in hardware spec. From SKL PRM, Vol 2a, "3DSTATE_SO_BUFFER": "If set, stream output to SO Buffer is enabled, if 3DSTATE_STREAMOUT::SO Function ENABLE is also enabled. If clear, the SO Buffer is considered "not bound" and effectively treated as a zero- length buffer for the purposes of SO output and overflow detection. If an enabled stream's Stream to Buffer Selects includes this buffer it is by definition an overflow condition. That stream will cause no writes to occur, and only SO_PRIM_STORAGE_NEEDED[<stream>] will increment." Fixes: 36ee2fd "anv: Implement the basic form of VK_EXT_transform_feedback" Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit ecb98c6)
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nir/builder: Add a vector extract helper
This one's a tiny bit better than what we had in spirv_to_nir because it emits a binary tree rather than a linear walk. It also doesn't leave around unneeded bcsel instructions for a constant index and returns an undef for constant OOB access. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit fe9a6c0)
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nir: Add a new pass to lower array dereferences on vectors
This pass was originally written for lowering TCS output reads and writes but it is also applicable just about anything including UBOs, SSBOs, and shared variables. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 35b8f6f)
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Commits on Mar 19, 2019
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radv: Use correct image view comparison for fast clears.
The if is actually returning true on success, enabling fast clears, so we need to have the test succeed when the iview dimensions are right. Fixes: d5400a5 "radv: provide a helper for comparing an image extents." Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit a777c3d)
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glsl: correctly validate component layout qualifier for dvec{3,4}
From page 62 (page 68 of the PDF) of the GLSL 4.50 v.7 spec: " A dvec3 or dvec4 can only be declared without specifying a component." Therefore, using the "component" qualifier with a dvec3 or dvec4 should result in a compiling error. v2: enhance the error message (Timothy). Fixes: 9443857 ("glsl: validate and store component layout qualifier in GLSL IR") Cc: Timothy Arceri <[email protected]> Cc: Kenneth Graunke <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit a960931)
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glsl/linker: don't fail non static used inputs without matching outputs
If there is no Static Use of an input variable, the linker shouldn't fail whenever there is no defined matching output variable in the previous stage. From page 47 (page 51 of the PDF) of the GLSL 4.60 v.5 spec: " Only the input variables that are statically read need to be written by the previous stage; it is allowed to have superfluous declarations of input variables." Now, we complete this exception whenever the input variable has an explicit location. Previously, 18004c3 ("glsl: fail when a shader's input var has not an equivalent out var in previous") took care of the cases in which the input variable didn't have an explicit location. v2: do the location based interface matching check regardless on whether it is a separable program or not (Ilia). Fixes: 1aa5738 ("glsl: relax input->output validation for SSO programs") Cc: Timothy Arceri <[email protected]> Cc: Iago Toral Quiroga <[email protected]> Cc: Samuel Iglesias Gonsálvez <[email protected]> Cc: Tapani Pälli <[email protected]> Cc: Ian Romanick <[email protected]> Cc: Ilia Mirkin <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 3be05dd)
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glsl/linker: simplify xfb_offset vs xfb_stride overflow check
Current implementation uses a complicated calculation which relies in an implicit conversion to check the integral part of 2 division results. However, the calculation actually checks that the xfb_offset is smaller or a multiplier of the xfb_stride. For example, while this is expected to fail, it actually succeeds: " ... layout(xfb_buffer = 2, xfb_stride = 12) out block3 { layout(xfb_offset = 0) vec3 c; layout(xfb_offset = 12) vec3 d; // ERROR, requires stride of 24 }; ... " Fixes: 2fab85a ("glsl: add xfb_stride link time validation") Cc: Timothy Arceri <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 422882e)
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Revert "glsl: relax input->output validation for SSO programs"
This reverts commit 1aa5738. This patch incorrectly asumed that for SSOs no inner interface matching check was needed. From the ARB_separate_shader_objects spec v.25: " With separable program objects, interfaces between shader stages may involve the outputs from one program object and the inputs from a second program object. For such interfaces, it is not possible to detect mismatches at link time, because the programs are linked separately. When each such program is linked, all inputs or outputs interfacing with another program stage are treated as active. The linker will generate an executable that assumes the presence of a compatible program on the other side of the interface. If a mismatch between programs occurs, no GL error will be generated, but some or all of the inputs on the interface will be undefined." This completes the fix from commit: 3be05dd ("glsl/linker: don't fail non static used inputs without matching outputs") Fixes: 1aa5738 ("glsl: relax input->output validation for SSO programs") Cc: Tapani Pälli <[email protected]> Cc: Timothy Arceri <[email protected]> Cc: Ilia Mirkin <[email protected]> Cc: Samuel Iglesias Gonsálvez <[email protected]> Cc: Ian Romanick <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit ab28dca)
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Commits on Mar 20, 2019
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radv: fix binding transform feedback buffers
The mask should be accumulated if two calls are used for binding two buffers at different indexes. Otherwise, the driver only accounts for the last one. Noticed while glancing at this code. Cc: 18.3 19.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 4fa6127)
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intel/nir: Lower array-deref-of-vector UBO and SSBO loads
This fixes a serious performance issue with DXVK: doitsujin/dxvk#937 This was caused by a recent change that to improve performance on RADV which back-fired on ANV and killed performance for some apps: doitsujin/dxvk@e5a06d3 Throwing in this bit of lowering lets us come along and CSE those UBO loads (or copy-prop for SSBO load) and get one load where we previously would have gotten several. VkPipeline-db results on Kaby Lake: total instructions in shared programs: 5115361 -> 5073185 (-0.82%) instructions in affected programs: 1754333 -> 1712157 (-2.40%) helped: 5331 HURT: 63 total cycles in shared programs: 2544501169 -> 2481144545 (-2.49%) cycles in affected programs: 2531058653 -> 2467702029 (-2.50%) helped: 9202 HURT: 4323 total loops in shared programs: 3340 -> 3331 (-0.27%) loops in affected programs: 9 -> 0 helped: 9 HURT: 0 total spills in shared programs: 3246 -> 3053 (-5.95%) spills in affected programs: 384 -> 191 (-50.26%) helped: 10 HURT: 5 total fills in shared programs: 4626 -> 4452 (-3.76%) fills in affected programs: 439 -> 265 (-39.64%) helped: 10 HURT: 5 All of the shaders with hurt spilling were in Rise of the Tomb Raider which also had shaders solidly helped in the spilling department. Not shown in those results (because I've not had success dumping the shaders) is Witcher 3 where this reduces spilling and improves over-all perf by around 20-25%. There were no shader-db changes. Apparently, this just isn't a pattern that happens in OpenGL. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Cc: "19.0" [email protected] (cherry picked from commit d3386e7) Conflicts resolved by Dylan
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Commits on Mar 22, 2019
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softpipe: fix texture view crashes
I noticed we crashed piglit arb_texture_view-rendering-formats when run on softpipe. This fixes the clear tiles to use the surface format not the underlying storage format. This fixes a bunch of srgb piglits as well. Fixes: 396ac41 (softpipe: add integer support) Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> (cherry picked from commit 0418956)
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glsl: Cross validate variable's invariance by explicit invariance only
'invariant' qualifier is propagated on variables which are used to calculate other invariant variables, however when we are matching variable's declarations we should take into account only explicitly declared invariance because invariance propagation is an implementation specific detail. Thus new flag is added to ir_variable_data which indicates 'invariant' qualifier being explicitly set in the shader. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100316 Fixes: 89b6049 ('glsl: Add a pass to propagate the "invariant" and "precise" qualifiers') Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Jordan Justen <[email protected]> (cherry picked from commit ea9bde1)
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Fixes: 14cad87 ("radv: generate the same driver UUID as radeonsi") Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit c077d5d)
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anv/radv: release memory allocated by glsl types during spirv_to_nir
Fixes leaks for each glsl_type generated: ==32470== 384 bytes in 3 blocks are possibly lost in loss record 18 of 18 ==32470== at 0x483880B: malloc (vg_replace_malloc.c:309) ==32470== by 0x4C43F4A: ralloc_size (ralloc.c:119) ==32470== by 0x4C44014: rzalloc_size (ralloc.c:151) ==32470== by 0x4C44258: rzalloc_array_size (ralloc.c:215) ==32470== by 0x4D38957: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:114) ==32470== by 0x4D3BEED: glsl_type::get_struct_instance(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:1146) ==32470== by 0x4D42ECC: glsl_struct_type (nir_types.cpp:501) ==32470== by 0x4CDB5A1: vtn_handle_type (spirv_to_nir.c:1269) ==32470== by 0x4CE53DD: vtn_handle_variable_or_type_instruction (spirv_to_nir.c:4018) ==32470== by 0x4CD8CFF: vtn_foreach_instruction (spirv_to_nir.c:365) ==32470== by 0x4CE5E6B: spirv_to_nir (spirv_to_nir.c:4490) ==32470== by 0x497AF10: anv_shader_compile_to_nir (anv_pipeline.c:173) v2: move release call to vkDestroyInstance v3: apply fix also to radv driver Signed-off-by: Tapani Pälli <[email protected]> Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 4e1bbb0)
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mesa: Fix GL_NUM_DEVICE_UUIDS_EXT
Cc: [email protected] Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 1d996ef)
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Commits on Mar 25, 2019
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bin/install_megadrivers.py: Correctly handle DESTDIR=''
Currently if destdir is set to '' then the resulting libdir will have it's first character replaced by / instead of / being prepended to the string. This was the result of ensuring that that DESTDIR wouldn't be ignored if libdir was absolute, since the only cases that meson allows the libdir to be absolute is if the prefix is /, this won't be a problem. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110211 Fixes: ae3f45c ("bin/install_megadrivers: fix DESTDIR and -D*-path") Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 4188dd7)
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bin/install_megadrivers.py: Fix regression for set DESTDIR
The previous patch tried to address a bug when DESTDIR is '', however, it introduces a bug when DESTDIR is not '', and fakeroot is used. This patch does fix that, and has been tested with the arch pkg-build to ensure it isn't regressed. Fixes: 093a1ade4e24b7dd701a093d30a71efd669fe9c8 ("bin/install_megadrivers.py: Correctly handle DESTDIR=''") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110221 Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit ed96038)
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Commits on Mar 26, 2019
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ac/nir: Return frag_coord as integer.
To preserve the invariant that nir ssa defs are integers or pointers in LLVM. CC: <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 82075e3)
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Commits on Mar 27, 2019
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Revert "anv/radv: release memory allocated by glsl types during spirv…
…_to_nir" This reverts commit 4e1bbb0. It turns out that some DXVK apps due to some implementation detail of DXVK or other create and destroy instances in an interleaved way. Freeing the glsl_type memory without being a bit more careful causes use-after-free issues. Looks like we need to try again. (cherry picked from commit ce47999)
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Commits on Mar 28, 2019
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radeon/vcn: add H.264 constrained baseline support
VCN supports this profile as well as UVD, so add it Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> CC: <[email protected]> (cherry picked from commit f8ef8b5)
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radv: skip updating depth/color metadata for conditional rendering
I don't think we should update metadata when conditional rendering is enabled. For some reasons, some CTS breaks only on SI. This fixes the following CTS on SI: dEQP-VK.conditional_rendering.draw_clear.clear.depth.* Cc: 19.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 6596eb2)
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Commits on Mar 29, 2019
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radv: do not always initialize HTILE in compressed state
Especially when performing a transtion from UNDEFINED->GENERAL, the driver shouldn't initialize HTILE metadata in compressed state because it doesn't decompress when the src layout is GENERAL. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110259 Fixes: 3a2e931 ("radv: always initialize HTILE when the src layout is UNDEFINED") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 62a9d75)
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nir/print: fix printing the image_array intrinsic index
Fixes: 0de003b ("nir: Add handle/index-based image intrinsics") Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 6ffc724)
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Commits on Apr 1, 2019
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meson: strip rpath from megadrivers
More specifically, use the library file that has been post-processed by Meson when creating the hardlinks. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=108766 Fixes: 3218056 "meson: Build i965 and dri stack" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit aa7afe3)
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radeon/vcn/vp9: search the render target from the whole list
The number of render targets could be more than max of references, so we search the full list of the render pictures for the current render target index https://bugs.freedesktop.org/show_bug.cgi?id=109648 Signed-off-by: Leo Liu <[email protected]> Tested-by: James Zhu <[email protected]> Acked-by: James Zhu<[email protected]> Cc: <[email protected]> (cherry picked from commit d4e0fbc)
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radeonsi: fix assertion failure by using the correct type
src/gallium/drivers/radeonsi/si_state_viewport.c:196: si_emit_guardband: Assertion `vp_as_scissor.maxx <= max_viewport_size[vp_as_scissor.quant_mode] && vp_as_scissor.maxy <= max_viewport_size[vp_as_scissor.quant_mode]' failed. The comparison was unsigned, so negative maxx or maxy would fail. Fixes: 3c540e0 "radeonsi: Fix guardband computation for large render targets" (cherry picked from commit 3ad2a9b)
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Commits on Apr 2, 2019
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dri3: Return the current swap interval from glXGetSwapIntervalMESA().
We were caching only the value set with glXSwapIntervalSGI(), missing out on the default setting of the swap interval by the loader. This fixes glxgears's warning about being vblank synchronized by default. Fixes: 9777c42 ("loader: drop the [gs]et_swap_interval callbacks") Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit edc7dee)
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Commits on Apr 5, 2019
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v3d: Bump the maximum texture size to 4k for V3D 4.x.
4.1 and 4.2 both have the same 16k limit, but it I'm seeing GPU hangs in the CTS at 8k and 16k. 4k at least lets us get one 4k display working. Cc: [email protected] (cherry picked from commit 62360e9)
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v3d: Don't try to use the TFU blit path if a scissor is enabled.
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Commits on Apr 8, 2019
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nir: Take if_uses into account when repairing SSA
If a def is used as an condition before its definition, we should also consider this a case to repair. When repairing, make sure we rewrite any if conditions too. Found in while inspecting a SPIR-V conversion from a 'continue block' that contains a conditional branch. We pull the continue block up to the beggining of the loop, and the condition in the branch ends up defined afterwards. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Fixes: 364212f "nir: Add a pass to repair SSA form" (cherry picked from commit c037dbb)
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Commits on Apr 9, 2019
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intel: add dependency on genxml generated files
Drivers using genxml will start compilation before generated files are created, so add a dependency to it. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Cc: [email protected] (cherry picked from commit 48e48b8) Conflicts resolved by Dylan Conflicts: src/gallium/drivers/iris/meson.build
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st/va: reverse qt matrix back to its original order
The quantiser matrix that VAAPI provides has been applied with inverse z-scan. However, what we expect in MPEG2 picture description is the original order. Therefore, we need to reverse it back to its original order. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110257 Cc: [email protected] Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> (cherry picked from commit d507bcd)
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Commits on Apr 11, 2019
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Commits on Apr 12, 2019
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meson: remove meson-created megadrivers symlinks
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110356 Fixes: aa7afe3 "meson: strip rpath from megadrivers" Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Mike Lothian <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit c77acc3)
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anv/pipeline: Fix MEDIA_VFE_STATE::PerThreadScratchSpace on gen7
We were always programming it with the Broadwell convention which is too large by a factor of two on Haswell and just plain wrong on IVB and BYT. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected] (cherry picked from commit 7eaaff1)
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glsl: Set location on structure-split sampler uniform variables
gl_nir_lower_samplers_as_deref splits structure uniform variables, creating new variables for individual fields. As part of that, it calculates a new location. It then never set this on the new variables. Thanks to Michael Fiano for finding this bug. Fixes crashes on i965 with Piglit's new tests/spec/glsl-1.10/execution/samplers/uniform-struct test, which was reduced from the failing case in Michael's app. Fixes: f003859 nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 9e0c744)
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Commits on Apr 13, 2019
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glsl/linker: location aliasing requires types to have the same width
From the OpenGL 4.60.5 spec, section 4.4.1 Input Layout Qualifiers, Page 67, (Location aliasing): " Further, when location aliasing, the aliases sharing the location must have the same underlying numerical type and bit width (floating-point or integer, 32-bit versus 64-bit, etc.) and the same auxiliary storage and interpolation qualification." Additionally, we have improved the linker error descriptions. Specifically, when taking structs into account we were producing a linker error because we assumed that all components in each location were used and that would cause component aliasing. This is not accurate of the actual problem. Now, the failure specifies that the underlying numerical type incompatibility is the cause for the failure. Fixes the following piglit test: tests/spec/arb_enhanced_layouts/linker/component-layout/vs-to-fs-width-mismatch-double-float.shader_test v2: - Do not assert if we see invalid numerical types. These come straight from shader code, so we should produce linker errors if shaders attempt to do location aliasing on variables that are not numerical such as records. - While we are at it, improve error reporting for the case of numerical type mismatch to include the shader stage. v3: - Allow location aliasing of images and samplers. If we get these it means bindless support is active and they should be handled as 64-bit integers (Ilia) - Make sure we produce link errors for any non-numerical type for which we attempt location aliasing, not just structs. v4: - Rebased with minor fixes (Andres). - Added fixing tag to the commit log (Andres). v5: - Remove the helper function and check individually for the underlying numerical type and bit width (Timothy). - Implicitly, assume that any non-treated type which is checked for its underlying numerical type is either integer or float and has a defined bit width (Timothy). - Implicitly, assume that structs are the only non-treated non-numerical type (Timothy). - Improve the linker error descriptions and commit log (Andres). Fixes: 13652e7 ("glsl/linker: Fix type checks for location aliasing") Cc: Ilia Mirkin <[email protected]> Cc: Timothy Arceri <[email protected]> Cc: Iago Toral Quiroga <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 75a3dd9) [Andres Gomez: is_record() instead of is_struct() and brought glsl_base_type_get_bit_size] Signed-off-by: Andres Gomez <[email protected]>
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Commits on Apr 16, 2019
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nir,ac/nir: fix cube_face_coord
Seems it was missing the "/ ma + 0.5" and the order was swapped. Fixes: a1a2a8d ('nir: add AMD_gcn_shader extended instructions') Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 8671cfe)
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ac: Move has_local_buffers disable to radeonsi.
In radv we had a separate flag to actually use it + an env option to experimentally use it. The common code setting has_local_buffers to false of course broke that experimental option. Also the "enable on APU" did not make sense for RADV as it is still disabled by default. Fixes: b21a4ef "radv/winsys: allow local BOs on APUs" Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit af9534b)
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gallivm: fix bogus assert in get_indirect_index
0 is a valid value as max index, and the code handles it fine. This isn't commonly seen, as it will only happen with array declarations of size 1. Fixes piglit tests/shaders/complex-loop-analysis-bug.shader_test Fixes: a3c898d "gallivm: fix improper clamping of vertex index when fetching gs inputs" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110441 Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 88e0bbf)
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virgl: fix fence fd version check
Fixes: d1a1c21 ("virgl: native fence fd support") Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit c45c889)
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intel/compiler: Do not reswizzle dst if instruction writes to flag re…
…gister If we write to the flag register changing the swizzle would change what channels are written to the flag register. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110201 Fixes: 4cd1a0b Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: <[email protected]> (cherry picked from commit 04508f5)
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Commits on Apr 17, 2019
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meson: Add dependency on genxml to anvil genfiles
This fixes a race condition where anv_gen_files are executed before genxml files, which causes a build failure v2: add dependency on idep_genxml (Lionel) Fixes: d199225 ("meson: Add build Intel "anv" vulkan driver") Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit b74e605)
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Commits on Apr 18, 2019
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anv: fix uninitialized pthread cond clock domain
Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 843775b ("anv: Rework fences") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit dfd7907)
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Commits on Apr 22, 2019
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ac/nir: only use the new raw/struct image atomic intrinsics with LLVM 9+
They are buggy with LLVM 8 because they weren't marked as source of divergence, see r358579. Fixes: dd0172e ("radv: Use structured intrinsics instead of indexing workaround for GFX9.")" Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit 31164cf)
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nir: Fix deref offset calculation for structs.
We were calcuating the offset for the field within the struct, and just dropping it on the floor. Fixes a regression in KHR-GLES3.shaders.struct.local.nested_struct_array_dynamic_index_fragment and a few of its friends since the scratch lowering commit. Fixes: e8e159e ("nir/deref: Add helpers for getting offsets") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 9ac5ec2)
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intel/devinfo: fix missing num_thread_per_eu on ICL
There was an assumption that num_thread_per_eu would be set in the Gen8 features. Since this is mostly the same of all gen8->11 (except GEN9_LP that overwrites it) let's just factor it out. Signed-off-by: Lionel Landwerlin <[email protected]> Cc: [email protected] Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Anuj Phogat [email protected] (cherry picked from commit 773e6aa)
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anv: Add a #define for the max binding table size
This also fixes a bug where we mis-calculate maximum binding table sizes and may return true in vkGetDescriptorSetLayoutSupport even for sets too large to fit in a binding table. Fixes: ddc4069 "anv: Implement VK_KHR_maintenance3" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit a5a0dc0)
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Commits on Apr 23, 2019
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gallivm: guess CPU features also on ARM
getHostCPUFeatures() is also available on ARM, for even longer time than for x86. Use it -- it potentially enables instructions that may speed things up. Signed-off-by: Lubomir Rintel <[email protected]> Cc: <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/518 Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit bc6bfc8)
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gallivm: disable NEON instructions if they are not supported
The LLVM project made some questionable decisions about defaults for armv7 (e.g. they enable NEON that is not there on NVIDIA and Marvell platforms). On top of that, getHostCPUFeatures() doesn't disable missing machine attributes. Finally, -neon alone is not sufficient to disable emmision of NEON instructions. Signed-off-by: Lubomir Rintel <[email protected]> Cc: <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit e983a97)
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Revert "glsl: Set location on structure-split sampler uniform variables"
This reverts commit 9e0c744, which regressed dEQP-GLES2.functional.uniform_api.random.3. It turns out that the newly produced location is meaningless and impossible to consume by drivers that want to look at gl_uniform_storage, so it's probably better to leave it unset (0) than a number that looks usable. Leave a tombstone^Wcomment to discourage the next person from making the obvious looking fix. See the next commit for a longer description of the problem. This breaks tests/spec/glsl-1.10/execution/samplers/uniform-struct on i965, which was originally fixed by the revert. The next commit will fix it again. Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 47303b4)
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Commits on Apr 24, 2019
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radv: do not load vertex attributes that are not provided by the pipe…
…line Per the Vulkan spec this is definitely invalid but X4 Foundations does that and it ends up by hanging the GPU. Found while enabling validation layers with the game. The issue will be reported to the developers. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 381e38aaaa47c5aa38bc4f504b325fb68b7caea8)
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radeonsi: use CP DMA for the null const buffer clear on CIK
This is a workaround for a thread deadlock that I have no idea why it occurs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108879 Fixes: 9b331e4 Acked-by: Samuel Pitoiset <[email protected]> (cherry picked from commit b58e5fb)
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anv: store heap address bounds when initializing physical device
We can then reuse those bounds to initialize the VMA heaps at logical device creation. This fixes an issue on EHL which has only 36bits of VMA. We were incorrectly using the fixed 48bits upper bound to initialize the logical device heap, resulting in addresses beyong the device's limits. v2: Don't confuse heap size (limited by system memory) and VMA size (limited by number of addressing bits the platform has) v3: Fix low heap vma_size :( (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: James Xiong <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (v1) Reviewed-by: Jason Ekstrand <[email protected]> (v2) (cherry picked from commit 628c9ca)
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anv: leave the top 4Gb of the high heap VMA unused
In 628c9ca I forgot to apply the same -4Gb of the high address of the high heap VMA. This was previously computed in the HIGH_HEAP_MAX_ADDRESS. Many thanks to James for pointing this out. Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: Xiong, James <[email protected]> Fixes: 628c9ca ("anv: store heap address bounds when initializing physical device") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 9e7b098)
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anv: fix argument name for vkCmdEndQuery
Doesn't fix anything but it's not the right function prototype. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 673f33c ("anv: Implement CmdBegin/EndQueryIndexed") Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> (cherry picked from commit 0fb0058)
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This operation decorate with an Id instead of a Literal or String. It is used by HlslCounterBufferGOOGLE (provided by SPV_GOOGLE_hlsl_functionality1). Even if we don't do anything with that decoration, we must be able to parse SPIR-V that uses it. Fixes: 891886d "spirv: Add no-op support for VK_GOOGLE_hlsl_functionality1" Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 7e2684c)
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glsl: Silence may unused parameter warnings in glsl/ir.h
Every file that included glsl/ir.h had a warning like: src/compiler/glsl/ir.h: In member function ‘virtual bool ir_rvalue::is_lvalue(const _mesa_glsl_parse_state*) const’: src/compiler/glsl/ir.h:236:64: warning: unused parameter ‘state’ [-Wunused-parameter] virtual bool is_lvalue(const struct _mesa_glsl_parse_state *state = NULL) const ^ Cc: Samuel Pitoiset <[email protected]> Fixes: fa4ebf6 ("glsl: add _mesa_glsl_parse_state object to is_lvalue()") Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 3b087f6)
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Commits on Apr 25, 2019
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meson: Force '.so' extension for DRI drivers
DRI driver loadable modules are always installed with install_megadriver.py with names ending with '.so', irrespective of platform. Force the name the loadable module is built with to match, so install_megadriver.py doesn't spin trying to remove non-existent symlinks. Fixes: c77acc3 "meson: remove meson-created megadrivers symlinks" (cherry picked from commit 5d31001)
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nir: fix nir_remove_unused_varyings()
We were only setting the used mask for the first component of a varying. Since the linking opts split vectors into scalars this has mostly worked ok. However this causes an issue where for example if we split a struct on one side of the interface but not the other, then we can possibly end up removing the first components on the side that was split and then incorrectly remove the whole struct on the other side of the varying. With this change we simply mark all 4 components for each slot used by a struct. We could possibly make this more fine gained but that would require a more complex change. This fixes a bug in Strange Brigade on RADV when tessellation is enabled, all credit goes to Samuel Pitoiset for tracking down the cause of the bug. Fixes: f1eb5e6 ("nir: add component level support to remove_unused_io_vars()") Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit b155f74) Conflicts resolved by Dylan
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radeonsi/gfx9: set that window_rectangles always roll the context
Cc: 19.0 <[email protected]> (cherry picked from commit bc0d924)
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Commits on May 8, 2019
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radeonsi: add si_debug_options for convenient adding/removing of options
Move the definition of radeonsi_clear_db_cache_before_clear there, as well as radeonsi_enable_nir. This removes the AMD_DEBUG=nir option. We currently still have two places for options: the driconf machinery and AMD_DEBUG/R600_DEBUG. If we are to have a single place for options, then the driconf machinery should be preferred since it's more flexible. The only downside of the driconf machinery was that adding new options was quite inconvenient. With this change, a simple boolean option can be added with a single line of code, same as for AMD_DEBUG. One technical limitation of this particular implementation is that while almost all driconf features are available, the translation machinery doesn't pick up the description strings for options added in si_debvug_options. In practice, translations haven't been provided anyway, and this is intended for developer options, so I'm not too worried. It could always be added later if anybody really cares. v2: - use bool instead of uint8_t for options - si_debug_options.inc -> si_debug_options.h Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 8bef4df) autotools dist fixed by Dylan (not needed in master)
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radeonsi/gfx9: rework the gfx9 scissor bug workaround (v2)
Needed to track context rolls caused by streamout and ACQUIRE_MEM. ACQUIRE_MEM can occur outside of draw calls. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110355 v2: squashed patches and done more rework Cc: 19.0 <[email protected]> (cherry picked from commit 440135e) Conflicts resolved by Dylan
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glsl: Allow gl_nir_lower_samplers*() without a gl_shader_program
I would like to be able to run gl_nir_lower_samplers() to turn texture and sampler variable dereferences into indexes and offsets, even for ARB programs, and built-in shaders. This would make sampler handling more consistent across the various types of shaders. For GLSL programs, the gl_nir_lower_samplers_as_deref() pass looks up the variable bindings in the shader program's uniform storage. But ARB programs and built-in shaders don't have a gl_shader_program, and uniform storage doesn't exist. In this case, we simply skip that lookup, and trust var->data.binding to be set correctly by whoever created the shader. Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit d34e434)
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glsl: Don't look at sampler uniform storage for internal vars
Passes like nir_lower_drawpixels add additional sampler variables, and set an explicit binding which never changes. These extra samplers don't have proper uniform storage associated with them, and there is no way to update bindings via the API. So, for any 'hidden' variables, just trust that there's an explicit binding set. Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 529a071)
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i965: Ignore uniform storage for samplers or images, use binding info
gl_nir_lower_samplers_as_deref creates new top level sampler and image uniforms which have been split from structure uniforms. i965 assumed that it could walk through gl_uniform_storage slots by starting at var->data.location and walking forward based on a simple slot count. This assumed that structure types were walked in a particular order. With samplers and images split out of structures, it becomes impossible to assign meaningful locations. Consider: struct S { sampler2D a; sampler2D b; } s[2]; The gl_uniform_storage locations for these follow this map: 0 => a[0], 1 => b[0], 2 => a[0], 3 => b[0]. But the new split variables look like: sampler2D lowered_a[2]; sampler2D lowered_b[2]; and there is no way to know that there's effectively a stride to get to the location for successive elements of a[] or b[]. So, working with location becomes effectively impossible. Ultimately, the point of looking at uniform storage was to pull out the bindings from the opaque index fields. gl_nir_lower_samplers_as_derefs can obtain this information while doing the splitting, however, and sets up var->data.binding to have the desired values. We move gl_nir_lower_samplers before brw_nir_lower_image_load_store so gl_nir_lower_samplers_as_derefs has the opportunity to set proper image bindings. Then, we make the uniform handling code skip sampler(-array) variables, and handle image param setup based on var->data.binding. Fixes Piglit tests/spec/glsl-1.10/execution/samplers/uniform-struct, this time without regressing dEQP-GLES2.functional.uniform_api.random.3. Fixes: f003859 nir: Make gl_nir_lower_samplers use gl_nir_lower_samplers_as_deref Reviewed-by: Jason Ekstrand <[email protected]> (backported from commit 6981069, without prog_to_nir using derefs or texture bitfield gathering)
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vulkan/wsi: check if the display_fd given is master
As effectively required by the extension, we need to ensure we're master Currently drivers employ vendor specific solutions, which check if the device behind the fd is capable*, yet none of them do the master check. *In the radv case, if acceleration is available. Instead of duplicating the check in each driver, keep it where it's needed and used. Note this copies libdrm's drmIsMaster() to avoid depending on bleeding edge version of the library. v2: set the fd to -1 if not master (Bas) Fixes: da997eb ("vulkan: Add KHR_display extension using DRM [v10]") Cc: Andres Rodriguez <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: Keith Packard <[email protected]> Reported-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit c962a78)
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vulkan/wsi: don't use DUMB_CLOSE for normal GEM handles
Currently we get normal GEM handles from PrimeFDToHandle, yet we close then with DUMB_CLOSE. Use GEM_CLOSE instead. Fixes: da997eb ("vulkan: Add KHR_display extension using DRM [v10]") Cc: Jason Ekstrand <[email protected]> Cc: Keith Packard <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit bd0c4e3)
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radv: add missing VEGA20 chip in radv_get_device_name()
Otherwise it returns "AMD RADV unknown". Cc: 19.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 07745f9)
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anv: expose VK_EXT_queue_family_foreign on Android
VK_ANDROID_external_memory_android_hardware_buffer requires this extension. It is safe to enable it since currently aux usage is disabled for ahw buffers. Fixes following dEQP extension dependency test on Android: dEQP-VK.api.info.device#extensions Cc: <[email protected]> Signed-off-by: Tapani Pälli <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 376c3e8)
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anv/descriptor_set: Destroy sets before pool finalization
Fixes: 105002b "anv: destroy descriptor sets when pool gets..." Reviewed-by: Lionel Landwerlin <[email protected]>
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glx: Fix synthetic error generation in __glXSendError
To quote Uli Schlachter, who understands this stuff more than I do: > The function __glXSendError() in mesa's src/glx/glx_error.c invents an X11 > protocol error out of thin air. For the sequence number it uses dpy->request. > This is the sequence number of the last request that was sent. _XError() will > then update dpy->last_request_read based on the sequence number of the error > that just "came in". > > If now another something comes in with a sequence number less than > dpy->last_request_read, since sequence numbers are monotonically increasing, > widen() will incorrectly add 1<<32 to the sequence number and things might go > downhill afterwards. `__glXSendErrorForXcb` was also patched, as that's the function that `glXCreateContextAttribsARB` actually uses. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99781 Cc: [email protected] Fixes: ad503c4 'apple: Initial import of libGL for OSX from AppleSGLX svn repository' Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Hal Gentz <[email protected]> (cherry picked from commit e91ee76)
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spirv: add missing SPV_EXT_descriptor_indexing capabilities
Add ShaderNonUniformEXT, UniformBufferArrayNonUniformIndexingEXT, SampledImageArrayNonUniformIndexingEXT, StorageBufferArrayNonUniformIndexingEXT, StorageImageArrayNonUniformIndexingEXT, InputAttachmentArrayNonUniformIndexingEXT, UniformTexelBufferArrayNonUniformIndexingEXT and StorageTexelBufferArrayNonUniformIndexingEXT capabilities. Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit bbbe00a)
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radv: enable descriptor indexing capabilities
This enables the remaining capabilities in SPV_EXT_descriptor_indexing. Fixes: 0e10790 "radv: Enable VK_EXT_descriptor_indexing." Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 06c9d7f)
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Revert "meson: drop GLESv1 .so version back to 1.0.0"
This patch claimed that the autotools build generates libGLESv1_CM.so.1.0.0, but it doesn't: es1api_libGLESv1_CM_la_LDFLAGS = \ -no-undefined \ -version-number 1:1 \ $(GC_SECTIONS) \ $(LD_NO_UNDEFINED) Revert commit cc15460 to ensure that the autotools and meson builds produce the same libraries. Fixes: cc15460 "meson: drop GLESv1 .so version back to 1.0.0" Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 1c1efa4)
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docs: document MESA_GLSL=errors keyword
Added with commit 0161691, still checked on shaderapi.c _mesa_get_shader_flag method. Fixes: 0161691 "mesa: add GLSL_REPORT_ERRORS debug flag" Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 9b6a00e)
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mesa: Add missing display list support for GL_FOG_COORDINATE_SOURCE
Fixes: fe5d67d ("Implement EXT_fog_coord and EXT_secondary_color.") Reviewed-by: Mathias Fröhlich <[email protected]> Cc: Brian Paul <[email protected]> (cherry picked from commit bfc6486)
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st/nine: Fix D3DWindowBuffer_release for old wine nine support
No-one reported bugs for that, but is seems c442dd7 and previous commits used APIs not defined until nine minor version 3. This patch should prevent crash in this case. Also turn off the resize feature in this case, as we won't prevent a buffer leak anymore. Cc: "19.0" [email protected] Signed-off-by: Axel Davy <[email protected]> (cherry picked from commit 64a45ba)
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egl: return correct error code for a case req ver < 3 with forward-co…
…mpatible The EGL_KHR_create_context spec says: "If an OpenGL context is requested and the values for attributes EGL_CONTEXT_MAJOR_VERSION_KHR and EGL_CONTEXT_MINOR_VERSION_KHR, when considered together with the value for attribute EGL_CONTEXT_OPENGL_FORWARD_COMPATIBLE_BIT_KHR, specify an OpenGL version and feature set that are not defined, than an EGL_BAD_MATCH error is generated." This case is already correctly handled a bit below in the same source file. The correct handling was added by commit: 63beb3d Reported-by: Ian Romanick <[email protected]> Here: https://bugzilla.freedesktop.org/show_bug.cgi?id=92552#c9 Fixes: 11cabc4 "egl: rework handling EGL_CONTEXT_FLAGS" Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Andrii Simiklit <[email protected]> (cherry picked from commit 5c581b3)
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softpipe: setup pixel_offset for all primitive types
If we don't update this for all primitive-types, we end up rendering slightly offset points and lines up until the point where the first triangle gets drawn. This is obviously not correct, and violates OpenGL's repeatability rule. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: ca9c413 ("softpipe: Respect gl_rasterization_rules in primitive setup.") Reviewed-By: Gert Wollny <[email protected]> (cherry picked from commit f753ac3)
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radv: do not need to force emit the TCS regs on Vega20
This chip doesn't need the fixup. This fixes a bunch of dEQP-VK.tessellation tests and avoid random GPU hangs. Cc: "19.0" "19.1" <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 6162543)
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radv: fix color conversions for normalized uint/sint formats
The hardware actually rounds before conversion. This now matches what values are used when performing fast clears vs slow clears. This fixes a rendering issue with Far Cry 3&4. This also fixes a bunch of CTS tests that use a 8-bit UNORM format (only when the 512*512 image size hint is manually disabled). Cc: "19.0" "19.1" <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit e03e7c5)
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radv: implement a workaround for VK_EXT_conditional_rendering
Per the Vulkan spec 1.1.107, the predicate is a 32-bit value. Though the AMD hardware treats it as a 64-bit value which means it might fail to discard. I don't know why this extension has been drafted like that but this definitely not fit with AMD. The hardware doesn't seem to support a 32-bit value for the predicate, so we need to implement a workaround. This fixes an issue when DXVK enables conditional rendering with RADV, this also fixes the Sasha conditionalrender demo. Fixes: e45ba51 ("radv: add support for VK_EXT_conditional_rendering") Reported-by: Philip Rebohle <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 6ac10e0)
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radv: fix set_output_usage_mask() with composite and 64-bit types
It previously used var->type instead of deref_instr->type and didn't handle 64-bit outputs. This fixes lots of transform feedback CTS tests involving transform feedback and geometry shaders (mostly dEQP-VK.transform_feedback.fuzz.random_geometry.*) v2: fix writemask widening when comp != 0 v3: fix 64-bit variables when comp != 0, again Signed-off-by: Rhys Perry <[email protected]> Cc: 19.0 19.1 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 13c4236)
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vulkan/wsi/wayland: Respect non-blocking AcquireNextImage
If the client has requested that AcquireNextImage not block at all, with a timeout of 0, then don't make any non-blocking calls. This will still potentially block infinitely given a non-infinte timeout, but the fix for that is much more involved. Signed-off-by: Daniel Stone <[email protected]> Cc: [email protected] Cc: Chad Versace <[email protected]> Cc: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108540 Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 9826e04)
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svga: move host logging to winsys
This patch adds a host_log interface to svga_winsys and moves the host logging code to the winsys layer. Cc: [email protected] Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Neha Bhende <[email protected]> (cherry picked from commit 9c5f407)
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svga: add SVGA_NO_LOGGING env var (v2)
valgrind crashes when we try to initialize host logging. This env var can be used to disable logging. v2: rebase onto "svga: move host logging to winsys". Cc: [email protected] Reviewed-by: Neha Bhende <[email protected]> (cherry picked from commit f0f7c3b)
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radv: set WD_SWITCH_ON_EOP=1 when drawing primitives from a stream ou…
…tput buffer According to RadeonSI, this seems to be required by the hardware to avoid GPU hangs. I think I just forgot to set that bit when I implemented VK_EXT_transform_feedback. This fixes a GPU hang with Space Engineers and DXVK. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110291 Fixes: b4eb029 ("radv: implement VK_EXT_transform_feedback") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 08be23b)
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radv: Disable VK_EXT_descriptor_indexing.
We did not implement the required non-uniform indexing features. This patch is to disable the extension on 19.0. For 19.1 the necessary functionality has been implemented. Fixes: 0e10790 "radv: Enable VK_EXT_descriptor_indexing." Reviewed-by: Samuel Pitoiset <[email protected]>
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intel/fs: Lower integer multiply correctly when destination stride eq…
…uals 4. Because the "low" temporary needs to be accessed with word type and twice the original stride, attempting to preserve the alignment of the original destination can potentially lead to instructions with illegal destination stride greater than four. Because the CHV/BXT alignment restrictions are now being enforced by the regioning lowering pass run after lower_integer_multiplication(), there is no real need to preserve the original strides anymore. Note that this bug can be reproduced on stable branches, but back-porting would be non-trivial, because the fix relies on the regioning lowering pass recently introduced. Tested-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit e2f475d)
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intel/fs: Cap dst-aligned region stride to maximum representable hstr…
…ide value. This is required in combination with the following commit, because otherwise if a source region with an extended 8+ stride is present in the instruction (which we're about to declare legal) we'll end up emitting code that attempts to write to such a region, even though strides greater than four are still illegal for the destination. Tested-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 7f9f626)
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radv: only need to force emit the TCS regs on Vega10 and Raven1
Other GFX9 chips aren't affected. Cc: "19.0" "19.1" <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 62001f3)
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util/bitset: fix bitset range mask calculations.
The MASK macro is used in the RANGE macro, and it should return the pre-bitset word mask for the (b) value. i.e. BITSET_MASK(0) should be undefined since it's meaningless. BITSET_MASK(31) should give 0x7fffffff BITSET_MASK(32) should give 0xffffffff BITSET_MASK(33) should give 0x00000001 BITSET_MASK(64) should give 0xffffffff However then BITSET_RANGE ends up broken for cases where it's (b) value is the 0,32,64 value as in that case the lower mask would be 0 not 0xffffffff. This fixes the unit tests that I've added, and my code that uses bitsets. Reviewed-by: Jason Ekstrand <[email protected]> Fixes: bb38cad "More GLSL code" Reviewed-by: Kristian H. Kristensen <[email protected]> (cherry picked from commit 512a31a)
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meson: Fix missing glproto dependency for gallium-glx
Signed-off-by: Chuck Atkins <[email protected]> Cc: mesa-stable <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit a381dbf)
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util/drirc: add workarounds for bugs in Doom 3: BFG
This makes the game playable on radeonsi. Cc: "19.0" "19.1" <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110143 (cherry picked from commit 1af72fa)
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draw: flush when setting stream-out targets
We need to re-prepare the middle-end state to pick up changes to this state to react correctly to pausing/resuming stream-out. So let's add a flush here. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: ec8cbd7 "draw/softpipe: EXT_transform_feedback support (v2)" Reviewed-by: Roland Scheidegger <[email protected]> (cherry picked from commit d84b85b)
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radeonsi: add config entry for Counter-Strike Global Offensive
This fixes rendering issues with gun scopes which is rather important. Cc: "19.0" "19.1" <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100239 (cherry picked from commit 4902529)
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configure.ac: check for libdrm when using VL with X11
The X11 specific code uses libdrm, yet we are missing the dependency. This has gone unnoticed since all drivers which use VL already mandate the library. Note: this is applicable only for the stable branches. Cc: <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Tested-by: Alyssa Ross <[email protected]>
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radv: apply the indexing workaround for atomic buffer operations on GFX9
Because the new raw/struct intrinsics are buggy with LLVM 8 (they weren't marked as source of divergence), we fallback to the old instrinsics for atomic buffer operations only. This means we need to apply the indexing workaround for GFX9. The load/store operations still use the new LLVM 8 intrinsics. The fact that we need another workaround is painful but we should be able to clean up that a bit once LLVM 7 support will be dropped. This fixes a GPU hang with AC Odyssey and some rendering problems with Nioh. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110573 Fixes: 31164cf ("ac/nir: only use the new raw/struct image atomic intrinsics with LLVM 9+") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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cherry-ignore: Add more patches
The radv patch was manually backported by Samuel (thanks!), and the two android build system patches were de-nominated by their submitter, as they would require many additional patches to be pulled in
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i965: Fix BRW_MEMZONE_LOW_4G heap size.
The STATE_BASE_ADDRESS "Size" fields can only hold 0xfffff in pages, and 0xfffff * 4096 = 4294963200, which is 1 page shy of 4GB. So we can't use the top page. Fixes: 01058a5 i965: Add virtual memory allocator infrastructure to brw_bufmgr. Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 15f134c)
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i965: Force VMA alignment to be a multiple of the page size.
This should happen regardless, but let's be paranoid. Fixes: 01058a5 i965: Add virtual memory allocator infrastructure to brw_bufmgr. Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 17210c6)
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i965: leave the top 4Gb of the high heap VMA unused
This ports commit 9e7b098 from anv to i965. Thanks to Lionel for noticing that it was missing! Fixes: 01058a5 i965: Add virtual memory allocator infrastructure to brw_bufmgr. Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit d568fcd)
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Revert "glx: Fix synthetic error generation in __glXSendError"
This reverts commit e91ee76. This seems to have broken a number of wine games. Lets revert everything for now and try again later. Acked-by: Adam Jackson <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110632 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110590 (cherry picked from commit a01b393)
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anv: rework queries writes to ensure ordering memory writes
We use a mix of MI & PIPE_CONTROL commands to write our queries' data (results & availability). Those commands' memory write order is not guaranteed with regard to their order in the command stream, unless CS stalls are inserted between them. This is problematic for 2 reasons : 1. We copy results from the device using MI commands even though the values are generated from PIPE_CONTROL, meaning we could copy unlanded values into the results and then copy the availability that is inconsistent with the values. 2. We allow the user to poll on the availability values of the query pool from the CPU. If the availability lands in memory before the values then we could return invalid values. This change does 2 things to address this problem : - We use either PIPE_CONTROL or MI commands to write both queries values and availability, so that the ordering of the memory writes guarantees that if availability is visible, results are also visible. - For the occlusion & timestamp queries we apply a CS stall before copying the results on the device, to ensure copying with MI commands see the correct values of previous PIPE_CONTROL writes of availability (required by the Vulkan spec). Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: Iago Toral Quiroga <[email protected]> Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit a07d06f)
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Commits on May 9, 2019
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meson: Force the use of config-tool for llvm
meson git now has a cmake find method for llvm, but it lacks a couple of features that we use from the config tool version. Until that reaches parity we need to use the config-tool version. CC: 19.0 19.1 <<[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 0d59459)
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radv: fix setting the number of rectangles when it's dyanmic
We need to know the number of rectangles. This fixes new CTS dEQP-VK.draw.discard_rectangles.dynamic_*. Fixes: 5db0bf9 ("radv: Implement VK_EXT_discard_rectangles.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 53dfff1)
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Commits on May 10, 2019
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anv: Use corresponding type from the vector allocation
We didn't notice this issue much because the 2 struct share a similar layout, expect for the additional fields... We run into that issue in Anv : ==15236== Invalid write of size 8 ==15236== at 0x8CF3939C: anv_state_table_expand_range (anv_allocator.c:211) ==15236== by 0x8CF394D5: anv_state_table_grow (anv_allocator.c:264) ==15236== by 0x8CF3967E: anv_state_table_add (anv_allocator.c:312) ==15236== by 0x8CF3B13C: anv_state_pool_alloc_no_vg (anv_allocator.c:1167) ==15236== by 0x8CF3B2B0: anv_state_pool_alloc (anv_allocator.c:1190) ==15236== by 0x8CF60871: alloc_surface_state (anv_image.c:1122) ==15236== by 0x8CF61FF9: anv_CreateImageView (anv_image.c:1519) ==15236== by 0x8BCBD2ED: vkCreateImageView (trampoline.c:1358) ==15236== Address 0x8994ef10 is 0 bytes after a block of size 128 alloc'd ==15236== at 0x4C2FB0F: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==15236== by 0x8D2578E6: u_vector_init (u_vector.c:47) ==15236== by 0x8CF3929A: anv_state_table_init (anv_allocator.c:168) ==15236== by 0x8CF3A99A: anv_state_pool_init (anv_allocator.c:921) ==15236== by 0x8CF56517: anv_CreateDevice (anv_device.c:1909) ==15236== by 0x8BCB4FBA: terminator_CreateDevice (loader.c:6073) ==15236== by 0x8DD2CB3D: ??? (in /home/djdeath/.steam/ubuntu12_64/libVkLayer_steam_fossilize.so) ==15236== by 0x8DF4D241: vkCreateDevice (in /home/djdeath/.steam/ubuntu12_64/steamoverlayvulkanlayer.so) ==15236== by 0x8BCB35C6: loader_create_device_chain (loader.c:5449) ==15236== by 0x8BCBC230: vkCreateDevice (trampoline.c:838) v2: Rename mmap_cleanups to avoid confusion (Caio) v3: s/fail_mmap_cleanups/fail_cleanups/ (Caio) Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110648 Cc: <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit f2f6ac1)
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winsys/amdgpu: add VCN JPEG to no user fence group
There is no user fence for JPEG, the bug triggering kernel WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT) Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: [email protected] (cherry picked from commit ceba9ff)
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Commits on May 13, 2019
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i965: Fix memory leaks in brw_upload_cs_work_groups_surface().
This was taking a reference to the 64kB upload buffer and never returning it, leaking a reference each time this atom triggered. This leaked lots of 64kB upload BOs, eventually running us out of of VMA space. This would usually happen when using mpv to watch a movie, after 20-40 minutes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110134 Fixes: 63d7b33 i965/cs: Setup surface binding for gl_NumWorkGroups Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> (cherry picked from commit 3f60810)
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st/mesa: fix 2 crashes in st_tgsi_lower_yuv
src/mesa/state_tracker/st_tgsi_lower_yuv.c:68: void reg_dst(struct tgsi_full_dst_register *, const struct tgsi_full_dst_register *, unsigned int): assertion "dst->Register.WriteMask" failed The second crash was due to insufficient allocated size for TGSI instructions. Cc: 19.0 19.1 <[email protected]> Reviewed-by: Rob Clark <[email protected]> (cherry picked from commit 83435e7)
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radv: clear vertex bindings while resetting command buffer
Only vertex inputs accessed by vertex shader must have valid buffers bound. Signed-off-by: Józef Kucia <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: 5010436 "radv: bail out when binding the same vertex buffers" (cherry picked from commit 24af0f1)
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Commits on May 17, 2019
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softpipe/buffer: load only as many components as the the buffer resou…
…rce type provides Otherwise we risk to read past the end of the buffer. In addition, change the loop counters to unsigned to be consistent with the types. Fixes: afa8707 softpipe: add SSBO/shader atomics support. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 865b9dd)
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intel/fs/ra: Only add dest interference to sources that exist
Fixes: 83dedb6 "i965: Add src/dst interference for certain" Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 88cac12)
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intel/fs/ra: Stop adding RA interference to too many SENDS nodes
We only have one node per VGRF so this was adding way too much interference. No idea how we didn't catch this before. Shader-db results on Kaby Lake: total instructions in shared programs: 15311100 -> 15311100 (0.00%) instructions in affected programs: 0 -> 0 helped: 0 HURT: 0 total cycles in shared programs: 355468050 -> 355543197 (0.02%) cycles in affected programs: 2472492 -> 2547639 (3.04%) helped: 17 HURT: 20 Fixes: 014edff "intel/fs: Add interference between SENDS sources" Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 096ad8a)
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nir: Fix nir_opt_idiv_const when negatives are involved
First, allow the case for negative powers of two. Then ensure that we use the absolute value of the non-constant value to calculate the quotient -- this was hinted in the code by the name 'uq'. This fixes an issue when 'd' is positive and 'n' is negative. The ishr will propagate the negative sign and we'll use nir_ineg() again, incorrectly. v2: First version used only ishr, but that isn't sufficient, since it never can produce a zero as a result. (Jason) Allow negative powers of two. (Caio) Fixes: 74492eb "nir: Add a pass for lowering integer division by constants" Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 8a995f2)
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anv: Fix some depth buffer sampling cases on ICL+
Don't attempt sampling with HiZ if the sampler lacks support for it. On ICL, the HW docs state that sampling with HiZ is not supported and that instances of AUX_HIZ in the RENDER_SURFACE_STATE object will be interpreted as AUX_NONE. Cc: <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> (cherry picked from commit 629806b)
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radv: add a workaround for Monster Hunter World and LLVM 7&8
The load/store optimizer pass doesn't handle WaW hazards correctly and this is the root cause of the reflection issue with Monster Hunter World. AFAIK, it's the only game that are affected by this issue. This is fixed with LLVM r361008, but we need a workaround for older LLVM versions unfortunately. Cc: "19.0" "19.1" <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit d750183)
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anv: Only consider minSampleShading when sampleShadingEnable is set
From the Vulkan 1.1.107 spec: Sample shading is enabled for a graphics pipeline: - If the interface of the fragment shader entry point of the graphics pipeline includes an input variable decorated with SampleId or SamplePosition. In this case minSampleShadingFactor takes the value 1.0. - Else if the sampleShadingEnable member of the VkPipelineMultisampleStateCreateInfo structure specified when creating the graphics pipeline is set to VK_TRUE. In this case minSampleShadingFactor takes the value of VkPipelineMultisampleStateCreateInfo::minSampleShading. Otherwise, sample shading is considered disabled. In other words, if sampleShadingEnable is set to VK_FALSE, we should ignore minSampleShading. Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 1c92358)
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Revert "softpipe/buffer: load only as many components as the the buff…
…er resource type provides" This reverts commit 865b9dd. The buffer always reports format PIPE_FORMAT_R8_UNORM so with this patch only one component would be supported. The original issue is still relevant, but the fix should be different. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 0f598ed)
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Revert "nir: add late opt to turn inot/b2f combos back to bcsel"
This reverts commit 7acc865. With these optimizations in place, the extra constant folding added in the next commit extends some live ranges of 0.0 and ±1.0 constants, and that causes several hundred shaders to have more spills and fills. I believe this optimization we made basically irrelevant by 7725d60 "intel/fs: Emit better code for b2f(inot(a)) and b2i(inot(a))". All Gen7.5+ platforms had similar results. (Ice Lake shown) total instructions in shared programs: 17225303 -> 17224634 (<.01%) instructions in affected programs: 879402 -> 878733 (-0.08%) helped: 679 HURT: 1 helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 helped stats (rel) min: 0.03% max: 0.93% x̄: 0.24% x̃: 0.05% HURT stats (abs) min: 10 max: 10 x̄: 10.00 x̃: 10 HURT stats (rel) min: 0.45% max: 0.45% x̄: 0.45% x̃: 0.45% 95% mean confidence interval for instructions value: -1.02 -0.95 95% mean confidence interval for instructions %-change: -0.26% -0.22% Instructions are helped. total cycles in shared programs: 360842595 -> 360828542 (<.01%) cycles in affected programs: 110443594 -> 110429541 (-0.01%) helped: 389 HURT: 265 helped stats (abs) min: 1 max: 7525 x̄: 162.81 x̃: 28 helped stats (rel) min: <.01% max: 18.66% x̄: 1.11% x̃: 0.11% HURT stats (abs) min: 1 max: 7614 x̄: 185.96 x̃: 48 HURT stats (rel) min: <.01% max: 25.08% x̄: 0.95% x̃: 0.10% 95% mean confidence interval for cycles value: -75.65 32.67 95% mean confidence interval for cycles %-change: -0.49% -0.06% Inconclusive result (value mean confidence interval includes 0). total spills in shared programs: 12159 -> 12161 (0.02%) spills in affected programs: 13 -> 15 (15.38%) helped: 0 HURT: 1 total fills in shared programs: 25207 -> 25208 (<.01%) fills in affected programs: 25 -> 26 (4.00%) helped: 0 HURT: 1 Ivy Bridge total instructions in shared programs: 12082019 -> 12082013 (<.01%) instructions in affected programs: 1033 -> 1027 (-0.58%) helped: 6 HURT: 0 helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 helped stats (rel) min: 0.41% max: 0.83% x̄: 0.61% x̃: 0.59% 95% mean confidence interval for instructions value: -1.00 -1.00 95% mean confidence interval for instructions %-change: -0.78% -0.45% Instructions are helped. total cycles in shared programs: 179849270 -> 179849157 (<.01%) cycles in affected programs: 4735 -> 4622 (-2.39%) helped: 4 HURT: 0 helped stats (abs) min: 2 max: 74 x̄: 28.25 x̃: 18 helped stats (rel) min: 0.13% max: 6.53% x̄: 2.85% x̃: 2.36% 95% mean confidence interval for cycles value: -82.73 26.23 95% mean confidence interval for cycles %-change: -7.98% 2.28% Inconclusive result (value mean confidence interval includes 0). Sandy Bridge total instructions in shared programs: 10882750 -> 10882748 (<.01%) instructions in affected programs: 266 -> 264 (-0.75%) helped: 2 HURT: 0 Iron Lake total cycles in shared programs: 188609440 -> 188609448 (<.01%) cycles in affected programs: 4320 -> 4328 (0.19%) helped: 0 HURT: 2 GM45 total cycles in shared programs: 129016868 -> 129016872 (<.01%) cycles in affected programs: 2302 -> 2306 (0.17%) helped: 0 HURT: 1 Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit d2a9ba0) Conflicts resolved by Dylan Conflicts: src/compiler/nir/nir_opt_algebraic.py
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Commits on May 20, 2019
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meson: expose glapi through osmesa
Suggested-by: Pierre Guillou <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109659 Fixes: f121a66 "meson: build gallium based osmesa" Fixes: cbbd5bb "meson: build classic osmesa" Cc: Brian Paul <[email protected]> Cc: Dylan Baker <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Chuck Atkins <[email protected]> (cherry picked from commit ccb8ea7)
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Commits on May 21, 2019
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st/mesa: purge framebuffers with current context after unbinding wins…
…ys buffers With commit c89e847, framebuffers are purged after unbinding context, but this change also introduces a heap corruption when running Rhino application on VMware svga device. Instead of purging the framebuffers after the context is unbound, this patch first ubinds the winsys buffers, then purges the framebuffers with the current context, and then finally unbinds the context. This fixes heap corruption. Cc: [email protected] Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit b480adf)
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mesa: unreference current winsys buffers when unbinding winsys buffers
This fixes surface leak when no winsys buffers are bound. Cc: [email protected] Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 12bf7cf)
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nir: Fix clone of nir_variable state slots
When num_state_slots is 0, don't create the array. This was triggering the following assert when running vkcube with NIR_TEST_CLONE=1 vkcube: ../src/compiler/nir/nir_split_per_member_structs.c:66: split_variable: Assertion `var->state_slots == NULL' failed. Fixes: 9fbd390 "nir: Add support for cloning shaders" Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 005cc9a)
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Commits on May 28, 2019
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etnaviv: fill missing offset in etna_resource_get_handle
Without this gbm_bo_get_offset() can return 0 where it shouldn't. Reviewed-by: Lucas Stach <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Cc: <[email protected]> (cherry picked from commit 1ccb8a0)
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vulkan: fix build dependency issue with generated files
On machines with many cores, you can run into that issue : ../mesa-9999/src/vulkan/overlay-layer/overlay.cpp:42:10: fatal error: vk_enum_to_str.h: No such file or directory v2: Move declare_dependency around (Eric) Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: Jan Ziak Cc: <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Rebased by Dylan Conflicts: src/amd/vulkan/meson.build src/freedreno/vulkan/meson.build src/intel/vulkan/meson.build src/vulkan/overlay-layer/meson.build src/vulkan/wsi/meson.build
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etnaviv: use the correct uniform dirty bits
Found during code inspection. Cc: [email protected] Signed-off-by: Christian Gmeiner <[email protected]> (cherry picked from commit 78fb559)
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Revert "mesa: unreference current winsys buffers when unbinding winsy…
…s buffers" This reverts commit 12bf7cf. This commits caused lots of problems: https://bugs.freedesktop.org/show_bug.cgi?id=110721 https://bugs.freedesktop.org/show_bug.cgi?id=110761 Fixes: 12bf7cf ("mesa: unreference current winsys buffers when unbinding winsys buffers") Pushing without review as we need to get it into next stable. (cherry picked from commit 7fe5a8e)
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anv/android: fix missing dependencies issue during parallel build
The libmesa_anv_gen* modules require anv_extensions.h, patch makes sure it gets generated as a dependency before building them. Signed-off-by: Chenglei Ren <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: <[email protected]> (cherry picked from commit 13b38ca)
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Revert "st/mesa: expose 0 shader binary formats for compat profiles f…
…or Qt" This reverts commit 55376cb. It's been over a year and both QT 5.9.5 and 5.11.0 contained a fix for the original issue. It seems i965 only ever applied this workaround to the 18.0 branch. Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 11e16ca)
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radv: allocate more space in the CS when emitting events
If the driver waits for CP DMA to be idle and emit an EOP event we need more space. This fixes a crash with Quake Champions. Cc: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 47a10ed)
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Commits on May 30, 2019
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Commits on May 31, 2019
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swr/rast: fix 32-bit compilation on Linux
Removing unused but problematic code from simdlib header to fix compilation problem on 32-bit Linux. Reviewed-by: Alok Hota <[email protected]> (cherry picked from commit cf67374)
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nir: Actually propagate progress in nir_opt_move_load_ubo.
Found with Jasons new metadata rework (https://gitlab.freedesktop.org/mesa/mesa/merge_requests/950). Fixes: af355aa "nir: add nir_opt_move_load_ubo() optimization pass" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit e24a784)
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Commits on Jun 4, 2019
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freedreno/ir3: dynamic UBO indexing vs 64b pointers
Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.ubo.uniform_fragment and similar things with multiple UBOs Signed-off-by: Rob Clark <[email protected]> (cherry picked from commit 6e781a0)
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freedreno/ir3: set more barrier bits
Blob is also setting the .l bit, and it seems to solve some intermittent failures with a couple of deqp's: dEQP-GLES31.functional.image_load_store.2d.qualifiers.coherent_r32i dEQP-GLES31.functional.image_load_store.2d.qualifiers.volatile_r32f Signed-off-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]> (cherry picked from commit f9fa456)
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freedreno/a6xx: fix GPU crash on small render targets
Fixes dEQP-GLES2.functional.multisampled_render_to_texture.readpixels Signed-off-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]> (cherry picked from commit 8eaa2d5)
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u_blitter: don't fail mipmap generation for depth formats containing …
…stencil Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=109754 Cc: 19.0 19.1 <[email protected]> Tested-by: Pierre-Eric Pelloux-Prayer <[email protected]> (cherry picked from commit 4b11ed4)
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st/glsl: make sure to propagate initialisers to driver storage
This essentially reverts 20234cf. Fixes piglit test: tests/spec/arb_get_program_binary/execution/uniform-after-restore.shader_test Fixes: 20234cf "st/mesa: don't propagate uniforms when restoring from cache" Reviewed-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110784 (cherry picked from commit fea36a8)
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intel/compiler: Fix assertions in brw_alu3
v2: Fix assertion for src1 (Ian Romanick) Fixes: 3b967e1 (intel/compiler: Avoid false positive assertions) Signed-off-by: Sagar Ghuge <[email protected]> Suggested-by: Matt Turner <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 3016756)
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radv: do not use gfx fast depth clears for layered depth/stencil images
The driver should only fast depth clears with the graphics path when the view covers all image layers, otherwise this might corrupt layers when HTILE is enabled. Cc: 19.0 19.1 [email protected] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 8a35eb0)
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gallium/swr: Param defaults for unhandled PIPE_CAPs
Without using this function, we fail the -Wswitch flag when compiling the default debugoptimized mode in Meson Reviewed-by: Bruce Cherniak <[email protected]>
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gallium/aux: add PIPE_CAP_MAX_VARYINGS to u_screen
Allows drivers using `u_pipe_screen_get_param_defaults` to use a fallback value for the new pipe cap. Default value of 8 based on GL 2.1 MAX_VARYING_FLOATS Reviewed-by: Eric Anholt <[email protected]>
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gallium: wrap u_screen in extern "C" for c++
Some drivers (notabily SWR) are written in C++, and as such they need access to C headers with extern "C". So lets add that.
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Commits on Jun 5, 2019
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ac: fix a typo in ac_build_wg_scan_bottom
Cc: 19.1 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit c9b64b5)
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egl/dri: flesh out and use dri2_create_drawable()
Wrap the loader->createNewDrawable() dance into a helper and use it throughout the codebase. This addresses a cases like surfaceless (SL) on swrast (SL on kms_swrast is fine) where we'd attempt using the wrong driver and crash out. v2: fixup quirky GBM (Mathias) v3: fixup GBM for real (Marek) Cc: [email protected] Cc: Mathias Fröhlich <[email protected]> Reviewed-by: Mathias Fröhlich <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]> (v1) Signed-off-by: Emil Velikov <[email protected]> (v2) Signed-off-by: Marek Olšák <[email protected]> (v2) Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 2282ec0)
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winsys/drm: Fix out of scope variable usage
In this particular instance, struct member were used outside of the block where it was defined. Fix this by moving the definition outside of block. Signed-off-by: Deepak Rawat <[email protected]> Fixes: 569f838 ("winsys/svga: Add support for new surface ioctl, multisample pattern") Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 828e1b0)
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Commits on Jun 6, 2019
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UPSTREAM: android: add liblog to libmesa_intel_common build
Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Jordan Justen <[email protected]> (cherry picked from commit a3c366c)
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UPSTREAM: android: make libbacktrace optional on USE_LIBBACKTRACE
Otherwise with VNDK enabled we fail linking: src/gallium/targets/dri/Android.mk: error: gallium_dri (native:vendor) should not link to libbacktrace.vendor (native:vndk_private) Option makes it possible to use libbacktrace only when VNDK is not enabled. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Jordan Justen <[email protected]> (cherry picked from commit 5e52184)
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UPSTREAM: android: Build fixes for OMR1
Some of the header file locations are changed between Android versions (when VNDK is used), patch makes sure we get all the required headers. v2: cleanups, put SDK version checks in all places (Tapani) Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Chen Lin Z <[email protected]> Tested-by: Clayton Craft <[email protected]> Acked-by: Eric Engestrom <[email protected]> (cherry picked from commit 791198a)
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UPSTREAM: android: static link with libexpat with Android O+
In Android O, MESA needs to statically link libexpat so that it's in same VNDK namespace. v2: apply change also to anv driver (Tapani) v3: use += in anv change (Eric Engestrom) Change-Id: I82b0be5c817c21e734dfdf5bfb6a9aa1d414ab33 Signed-off-by: Kishore Kadiyala <[email protected]> Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit e1d8057)
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INTERNAL: ignore some compile warning on android.
Signed-off-by: Qiming Shi <[email protected]> Signed-off-by: Mingwei Wang <[email protected]> Signed-off-by: jenny.q.cao <[email protected]> Signed-off-by: Kishore Kadiyala <[email protected]> Signed-off-by: Chen Lin Z <[email protected]>
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INTERNAL: enable O3 for Mesa compilation.
Improves performance of graphics tests significantly. Signed-off-by: Yogesh Marathe <[email protected]> Acked-by: Tapani Pälli <[email protected]>
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INTERNAL: Enable sampling for imported dma_buf images
The HWC Vulkan backend needs to be able to sample from source images, so for now enable that for all users of vkCreateDmaBufImageINTEL. We can revert this patch once we land support for VK_MESAX_external_image_dma_buf, which allows the application to fill the 'usage' field. Jira: IAHWC-40 Test: Enable Vulkan backend of IA-Hardware-Composer and try kmscube. The cube should be visible and animated, but at this time there is severe flickering. Signed-off-by: Kevin Strasser <[email protected]> Acked-by: Tapani Pälli <[email protected]>
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UPSTREAM: SQUASH: Add P0x formats
UPSTREAM: nir: add option to use scaling factor when sampling planes YUV lowering Patch adds nir_lower_tex_options as parameter to sample_plane so that we don't need to extend nir_tex_instr for this. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 19a85a7) UPSTREAM: dri: add P010, P012, P016 for 10bit/12bit/16bit YUV420 formats Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Lin Johnson <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 722f96b) UPSTREAM: intel/compiler: add scale_factors to sampler_prog_key_data Patch propagates given scale_factors to lowering options. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 3da858a) UPSTREAM: i965: add P0x formats and propagate required scaling factors Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Lin Johnson <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 2a2e69f) UPSTREAM: i965: remove scaling factors from P010, P012 Patch removes scaling factors introduced in 2a2e69f but leaves option to use scaling in place as it could be useful with other upcoming YUV formats. We did this scaling because ffmpeg was shifting channel bits down, however it seems this is not the right place as compositor wants to flip same buffers directly to display as well and therefore bitshifting needs to be done by the client when receiving frame from ffmpeg. Now P0x formats are treated the same, e.g. P010 is same as P016 but with lower 6 bits set to zeros. Fixes: 2a2e69f "i965: add P0x formats and propagate required scaling factors" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 3b41175)
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INTERNAL: Add format P010 etc for 10bit/12bit/16bit YUV420 formats
Add those definition in dri2_interface.h and in intel_screen.c This will make P010 formats be sampleable in OpenGL Signed-off-by: Lin Johnson <[email protected]> [strassek: Paired down as much of the patch has gone upstream] Signed-off-by: Kevin Strasser <[email protected]>
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INTERNAL: Relax permissions when we export prime handle for GEM.
This is needed in case we want to use mmap with dma-buf and write into the buffer in CPU side. This is useful when layers are rendered using software and we will either need to scan or texture from these layers. Check: https://patchwork.freedesktop.org/patch/56380/ Signed-off-by: Kalyan Kondapally <[email protected]>
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INTERNAL: CHROMIUM: egl: automatically call eglReleaseThread on threa…
…d termination EGL thread cleanup conformance tests could run out of memory as the contexts were not freed even though the application requested to have them deleted. This was caused by the fact that the contexts were still current on their threads when delete was called and (in order not to block any potential pending renders) they were just marked for delete. Fix this by calling eglReleaseThread on thread termination. This is safe to do even if this was already called by the application since, according to the EGL 1.5 spec, eglReleaseThread can be called multiple times without error. Fixes: dEQP-EGL.functional.thread_cleanup.multi_context_* dEQP-EGL.functional.robustness.create_context.query_robust_access
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INTERNAL: prevent deadlock in droid_query_buffer_age
To avoid blocking other EGL calls, release the display mutex before calling update_buffers(), which will call droid_window_dequeue_buffer(). This patch fixes some failure cases in android graphics cts test. Signed-off-by: Min He <[email protected]> Signed-off-by: Chenglei Ren <[email protected]>
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FROMLIST: Check if the window is non-NULL before setting swap interval.
This fixes crash due to NULL window when swap interval is set for pbuffer surface. Jira: 61995 Test: CtsDisplayTestCases pass Signed-off-by: samiuddi <[email protected]> (am from https://patchwork.freedesktop.org/patch/235697/)
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Signed-off-by: Kalyan Kondapally <[email protected]>
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INTERNAL: glcpp: Hack to handle expressions in #line directives.
GLSL ES 320 technically allows #line to have arbitrary expression trees rather than integer literal constants, unlike the C and C++ preprocessor. This is likely a completely unused feature that does not make sense. However, Android irritatingly mandates this useless behavior, so this patch implements a hack to try and support it. We handle a single expression: #line <line number expression> but we avoid handling the double expression: #line <line number expression> <source string expression> because this is an ambiguous grammar. Instead, we handle the case that wraps both in parenthesis, which is actually well defined: #line (<line number expression>) (<source string expression>) With this change following tests pass: dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_vertex dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_fragment dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_vertex dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_fragment Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> BUG=b:33352633 BUG=b:33247335 TEST=affected tests passing on CTS 7.1_r1 sentry Change-Id: I7afbbb386bd4a582e3f241014a83eaccad1d50d9 Reviewed-on: https://chromium-review.googlesource.com/427305 Tested-by: Haixia Shi <[email protected]> Reviewed-by: Ilja H. Friedel <[email protected]> Commit-Queue: Haixia Shi <[email protected]> Trybot-Ready: Haixia Shi <[email protected]>
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REVERTME: i965: perf: implement GPA's null renderer
GPA requires a null renderer query which disables all rendering. This feels fairly at odds with the spirit of the INTEL_performance_query extension. Note: Considering the INTEL_blackhole_render implementation(https://www. khronos.org/registry/OpenGL/extensions/INTEL/INTEL_blackhole_render .txt, https://patchwork.freedesktop.org/series/40035/)need test case changes, and also need time to review in upstream, we keep this patch firstly for urgent project milestone. Test: Pass mdapi test_GfxDrv_DriverAcceptance test case GfxDrv_DriverAcceptanceQuery.GL_NULL_HARDWARE and has no reg issue Signed-off-by: Landwerlin, Lionel <[email protected]>
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INTERNAL: anv: disable extensions for Android CTS
This change makes following test pass: dEQP-VK.api.info.device.extensions Originally-from: Tapani Pälli <[email protected]> Test: [CTS 9.0_r8] dEQP-VK.api.info.device.extensions Signed-off-by: Kevin Strasser <[email protected]>
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FROMLIST: SQUASH: i965: SIMD32 selection heuristics
(cover letter https://patchwork.freedesktop.org/series/51006/) FROMLIST: i965: SIMD32 heuristics debug flag Added a new DEBUG_HEUR32 flag to INTEL_DEBUG flags for enabling SIMD32 selection heuristics. (am from https://patchwork.freedesktop.org/patch/256764/) FROMLIST: i965: SIMD32 heuristics control data Added a new structure for holding SIMD32 heuristics control data. The control data itself will be fetched from drirc. (am from https://patchwork.freedesktop.org/patch/256806/) FROMLIST: i965: SIMD32 heuristics control data from drirc To be able to test the heuristics with different parameters, they can be controlled via environment variables through drirc. (am from https://patchwork.freedesktop.org/patch/256788/) FROMLIST: mesa: Helper functions for counting set bits in a mask (am from https://patchwork.freedesktop.org/patch/256765/) FROMLIST: i965/fs: Save the instruction count of each dispatch width The SIMD32 selection heuristics will use this information for deciding whether SIMD32 shaders should be used. (am from https://patchwork.freedesktop.org/patch/256793/) FROMLIST: i965/fs: SIMD32 selection heuristic based on grouped texture fetches The function goes through the compiled shader and checks how many grouped texture fetches there are. This is a simple heuristic which gets rid of most of the regressions when enabling SIMD32 shaders but still retains some of the benefits. (am from https://patchwork.freedesktop.org/patch/256798/) FROMLIST: i965/fs: Enable all SIMD32 heuristics There are three simple heuristics for SIMD32 shader enabling: - How many MRTs does the shader write into? - How many grouped texture fetches does the shader have? - How many instructions does the SIMD32 shader have compared to the SIMD16 shader? For testing purposes, the heuristics can be controlled via these environment variables: simd32_heuristic_mrt_check - Enables MRT write check - Default: true simd32_heuristic_max_mrts - How many MRT writes the heuristic allows - Default: 1 simd32_heuristic_grouped_check - Enables grouped texture fetch check - Default: true simd32_heuristic_grouped_sends - How many grouped texture fetches the heuristic allows - Default: 6 simd32_heuristic_inst_check - Enables SIMD32 vs. SIMD16 instruction count check - Default: true simd32_heuristic_inst_ratio - SIMD32 vs. SIMD16 instruction count ratio the heuristic allows - Default: 2.3 SIMD32 shaders will not be compiled also when SIMD16 compilation fails or spills. (am from https://patchwork.freedesktop.org/patch/256766/)
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FROMLIST: glsl: fix a binding points assignment for ssbo/ubo arrays
This is needed to be in agreement with spec requirements: KhronosGroup/OpenGL-API#46 Piers Daniell: "We discussed this in the OpenGL/ES working group meeting and agreed that eliminating unused elements from the interface block array is not desirable. There is no statement in the spec that this takes place and it would be highly implementation dependent if it happens. If the application has an "interface" in the shader they need to match up with the API it would be quite confusing to have the binding point get compacted. So the answer is no, the binding points aren't affected by unused elements in the interface block array." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109532 Reported-By: Ilia Mirkin <[email protected]> Signed-off-by: Andrii Simiklit <[email protected]> TEST=[CTS 9.0r6} dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers#18 (am from https://gitlab.freedesktop.org/mesa/mesa/merge_requests/332) Signed-off-by: Kevin Strasser <[email protected]>
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FROMLIST: glsl: fix an incorrect max_array_access after optimization …
…of ssbo/ubo This is needed to fix these tests: piglit.spec.arb_shader_storage_buffer_object.compiler.unused-array-element_frag piglit.spec.arb_shader_storage_buffer_object.compiler.unused-array-element_comp Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109532 Reported-By: Ilia Mirkin <[email protected]> Signed-off-by: Andrii Simiklit <[email protected]> TEST=[CTS 9.0r6} dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers#18 (am from https://gitlab.freedesktop.org/mesa/mesa/merge_requests/332) Signed-off-by: Kevin Strasser <[email protected]>
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Commits on Jun 28, 2019
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INTERNAL: Add support for pre-build flag
When we enable pre-build flag, we would like to copy pre-built library to Android instead of source code building. Tracked-On: OAM-81096 Signed-off-by: Chenglei Ren [email protected]
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