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Simd32 integration #104
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Simd32 integration #104
Commits on Sep 7, 2018
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docs: add sha256 checksums for 18.2.0
Signed-off-by: Andres Gomez <[email protected]>
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winsys/virgl: correct resource and handle allocation (v2)
Fixes crash with piglit/bin/map_buffer_range-invalidate CopyBufferSubData \ increment-offset -auto -fbo * Resize the resource storage already when the count is equal to the allocated size, fixes: Invalid write of size 8 at 0xB72E4CF: virgl_drm_add_res (virgl_drm_winsys.c:629) by 0xB72E4CF: virgl_drm_emit_res (virgl_drm_winsys.c:663) by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776) by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585) by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940) by 0x109A1E: upload (invalidate.c:169) by 0x109C2F: piglit_display (invalidate.c:215) by 0x4F80FBE: run_test (piglit_fbo_framework.c:52) by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229) by 0x10949D: main (invalidate.c:47) Address 0xbe07d30 is 0 bytes after a block of size 4,096 alloc'd at 0x4C31B25: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) by 0xB72DAAF: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:567) * Also resize the space allocated for the handles, fixes: Invalid write of size 4 at 0xB72E4F0: virgl_drm_add_res (virgl_drm_winsys.c:631) by 0xB72E4F0: virgl_drm_emit_res (virgl_drm_winsys.c:663) by 0xB72A44A: virgl_encode_resource_copy_region (virgl_encode.c:776) by 0xB40CD12: st_copy_buffer_subdata (st_cb_bufferobjects.c:585) by 0xB244A3B: _mesa_CopyBufferSubData (bufferobj.c:2940) by 0x109A1E: upload (invalidate.c:169) by 0x109C2F: piglit_display (invalidate.c:215) by 0x4F80FBE: run_test (piglit_fbo_framework.c:52) by 0x4F66E5F: piglit_gl_test_run (piglit-framework-gl.c:229) by 0x10949D: main (invalidate.c:47) Address 0xbe08570 is 0 bytes after a block of size 2,048 alloc'd at 0x4C2FB0F: malloc ( in /usr/lib/valgrind/vgpreload_memcheck-amd64- linux.so) by 0xB72DAC8: virgl_drm_cmd_buf_create (virgl_drm_winsys.c:572) Fixes: 4b15b5e ("virgl: resize resource bo allocation if we need to.") v2: - Use REALLOC macro and avoid memory leak when re-allocation fails - add Fixes tag (both Emil Velikov) - reorder commit message Signed-off-by: Gert Wollny <[email protected]> (cherry picked from commit 9b0e8d8)
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meson: Print a message about why a libdrm version was selected
We require a single version of libdrm for all of our libdrm dependencies (core and driver), but the way this is structured can make the error message less than helpful, as one driver might be the one setting the libdrm requirement, while another might be the one that generates the version failure. This adds a simple message to the output announcing which libdrm module set the version, which might be more helpful. v2: - Use message suggested by Eric Engstrom Fixes: c445b1d ("meson: Use the same version for all libdrm checks") Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit d25a27e)
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anv/pipeline: Only consider double elements which actually exist
The brw_vs_prog_data::double_inputs_read field comes directly from shader_info::double_inputs which may contain inputs which are not actually read. Instead of using it directly, AND it with inputs_read which is only things which are read. Otherwise, we may end up subtracting too many elements when computing elem_count. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241 Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 7b26741)
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tnl: Fix green gun regression in xonotic.
Fix an other regression of mesa: Make gl_vertex_array contain pointers to first order VAO members. The regression showed up with drivers using the tnl module and was reproducible using xonotic-glx -benchmark demos/the-big-keybench.dem. Fixes: 64d2a20 mesa: Make gl_vertex_array contain pointers to first order VAO members. Tested-by: Ville Syrjälä <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]> (cherry picked from commit a6232b6)
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apple/glx/log: added missing va_end() after va_copy()
Each invocation of va_copy() must be matched by a corresponding invocation of va_end() Reviewed-by: Eric Engestrom <[email protected]> Fixes: 51691f0 "darwin: Use ASL for logging" Signed-off-by: Andrii Simiklit <[email protected]> (cherry picked from commit 267ed29)
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mesa/util: don't use the same 'va_list' instance twice
The first usage of the 'va_list' instance could change it. Reviewed-by: Eric Engestrom <[email protected]> Fixes: 864148d "util: add util_vasprintf() for Windows (v2)" Signed-off-by: Andrii Simiklit <[email protected]> (cherry picked from commit 570cacb)
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mesa/util: don't ignore NULL returned from 'malloc'
We should exit from the function 'util_vasprintf' with error code -1 for case where 'malloc' returns NULL Reviewed-by: Eric Engestrom <[email protected]> Fixes: 864148d "util: add util_vasprintf() for Windows (v2)" Signed-off-by: Andrii Simiklit <[email protected]> (cherry picked from commit 65cfe69)
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mesa/util: add missing va_end() after va_copy()
MSDN: "va_end must be called on each argument list that's initialized with va_start or va_copy before the function returns." Reviewed-by: Eric Engestrom <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107810 Fixes: c6267eb "gallium/util: Stop bundling our snprintf implementation." Signed-off-by: Andrii Simiklit <[email protected]> (cherry picked from commit 2930b76)
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glsl: fixer lexer for unreachable defines
If we have something like: #ifdef NOT_DEFINED #define A_MACRO(x) \ if (x) #endif The # on the #define is not skipped but the define itself is so this then gets recognised as #if. Until 28a3731 this didn't happen because we ended up in <HASH>{NONSPACE} where BEGIN INITIAL was called stopping the problem from happening. This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for if/else/endif when processing a define. Cc: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772 Tested-By: Eero Tamminen <[email protected]> Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit b9fe8ff)
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Revert "Revert "glsl: skip stringification in preprocessor if in unre…
…achable branch"" This reverts commit 2fd6f06. Take back 28a3731 ("glsl: skip stringification in preprocessor if in unreachable branch") after b9fe8ff ("glsl: fixer lexer for unreachable defines") has made it to the branch. Signed-off-by: Andres Gomez <[email protected]>
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cherry-ignore: i965/tools: 32bit compilation with meson
fixes: This commit was immediately reverted by commit 2dce117. Signed-off-by: Andres Gomez <[email protected]>
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intel: compiler option msse2 and mstackrealign
Seems in case of 32-bit library, usage of msse2 makes some stack corruption or incorrect instructions. Usage with mstackrealign fixes that case. v2: Fixed meson. v3: Definition of c_sse2_args moved on the top (L.Landwerlin). Added mstackrealign for Android's mks where msee4.1 is used. v4: Added for Vulkan also. v5: Commit message correction. CC: <[email protected]> Fixes: 6b05c08 (i965: Compile with -msse3) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779 Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit d709f12)
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v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.
Fixes dEQP-GLES3.functional.fragment_ops.blend.default_framebuffer.rgb_func_alpha_func.dst.src_alpha_saturate_src_alpha_saturate and friends with --deqp-egl-config-name=rgb565d0s0 Cc: "18.2" <[email protected]> (cherry picked from commit f73f748)
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i965: Workaround the gen9 hw astc5x5 sampler bug
gen9 hardware has a bug in the sampler cache that can cause GPU hangs whenever an texture with aux compression enabled is in the sampler cache together with an ASTC5x5 texture. Because we can't control what the client binds at any given time, we have two options: resolve the CCS or decompresss the ASTC. Doing a CCS or HiZ resolve is far less drastic and will likely have a smaller performance impact. Cc: [email protected] Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> (cherry picked from commit f9e630e)
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anv: Re-emit vertex buffers when the pipeline changes
Some of the bits of VERTEX_BUFFER_STATE such as access type, instance data step rate, and pitch come from the pipeline. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit c643c5e)
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anv: Disable the vertex cache when tessellating on SKL GT4
I have no idea if I'm correct about what's going wrong or if this is the correct fix. However, in my multiple weeks of banging my head on this hang, a VUE reference counting bug seems to match all the symptoms and it definitely fixes the hang. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280 Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit b08b4b2)
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i965/tools: 32bit compilation with meson
Building of 32bit mesa with meson causes issue: "implicit declaration of function ‘__builtin_ia32_clflush’". Fixed by adding msse2 compilation flag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843 Fixes: 314879f (i965: Fix asynchronous mappings on !LLC platforms.) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 97fcccb) [Andres Gomez: resolve trivial conflicts] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/intel/tools/meson.build
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v3d: Fix setup of the VCM cache size.
There were two bugs working together to make things mostly work: I wasn't dividing the VPM output size available by the size of a batch (vertex), but I also had the size of the VPM reduced by a factor of 8. Fixes dEQP-GLES3.functional.vertex_array_objects.all_attributes and it seems also my intermittent varying failures. Fixes: 1561e49 ("v3d: Emit the VCM_CACHE_SIZE packet.") (cherry picked from commit a91b158)
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anv: Clamp scissors to the framebuffer boundary
The Vulkan 1.1.81 spec says: "It is legal for offset.x + extent.width or offset.y + extent.height to exceed the dimensions of the framebuffer - the scissor test still applies as defined above. Rasterization does not produce fragments outside of the framebuffer, so such fragments never have the scissor test performed on them." Elsewhere, the Vulkan 1.1.81 spec says: "The application must ensure (using scissor if necessary) that all rendering is contained within the render area, otherwise the pixels outside of the render area become undefined and shader side effects may occur for fragments outside the render area. The render area must be contained within the framebuffer dimensions." Unfortunately, there's some room for interpretation here as to what the consequences are of having the render area set to exactly the framebuffer dimensions and having a scissor that is larger than the framebuffer. Given that GL and other APIs provide automatic clipping to the framebuffer, it makes sense that applications would assume that Vulkan does this as well. It costs us very little to play it safe and just clamp client-provided scissors to the framebuffer dimensions. Fortunately, the user is required to provide us with at least one scissor so we don't need to handle the case where they don't. Fixes: fb2a5ce "anv: Emit DRAWING_RECTANGLE once at driver..." Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 465e5a8)
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Commits on Sep 11, 2018
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radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI
VI uses addrlib so it's unaffected. Cc: 18.1 18.2 <[email protected]> Tested-by: Dieter Nützel <[email protected]> (cherry picked from commit a1b9a00)
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winsys/radeon: fix CMASK fast clear for NPOT textures with mipmapping…
… on SI/CI Cc: 18.2 <[email protected]> Tested-by: Dieter Nützel <[email protected]> (cherry picked from commit d4e5228)
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r600: fix HTILE for NPOT textures with mipmapping
Cc: 18.1 18.2 <[email protected]> Tested-by: Dieter Nützel <[email protected]> (cherry picked from commit da72b62)
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radeonsi: fix printing a BO list into ddebug reports
important for debugging Cc: 18.1 18.2 <[email protected]> Tested-by: Dieter Nützel <[email protected]> (cherry picked from commit 662db03)
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ac: revert new LLVM 7.0 behavior for fdiv
Cc: 18.2 <[email protected]> Tested-by: Dieter Nützel <[email protected]> (cherry picked from commit a5f35aa)
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vulkan: Update the XML and headers to 1.1.84
Acked-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 34a17a4)
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anv: Support v3 of VK_EXT_vertex_attribute_divisor
Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 6f00785)
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radv: Support v3 of VK_EXT_vertex_attribute_divisor.
Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> CC: 18.2 <[email protected]> (cherry picked from commit f6e09db)
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Since commit af3685d various OpenGL applications regressed on the classic mesa radeon driver. Signed-off-by: Christopher Egert <[email protected]> CC: 18.1 18.2 <[email protected]> Signed-off-by: Marek Olšák <[email protected]> (cherry picked from commit 51995f6)
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virgl: don't send a shader create with no data. (v2)
This fixes the situation where we'd send a shader with just the header and no data. piglit/glsl-max-varyings test was causing this to happen, and the renderer fix was breaking it. v2: drop fprintf Fixes: a8987b8 "virgl: add driver for virtio-gpu 3D (v2)" Reviewed-by: Erik Faye-Lund <[email protected]> (cherry picked from commit 240af61)
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mesa/meson: 32bit xmlconfig linkage
Building of 32bit mesa with meson causes linkage issue: "undefined reference to `util_get_process_name'" Fixed by adding link-with mesa_util for xmlconfig primary. v2: Removed '[]', commit message corrected. v3: Reverted changes in gbm and glx libraries. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843 Fixes: 2e1e651 "util: extract get_process_name from xmlconfig.c" Cc: Marek Olšák <[email protected]> Cc: Dylan Baker <[email protected]> Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit bbe551f)
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Commits on Sep 17, 2018
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loader/dri3: Only wait for back buffer fences in dri3_get_buffer
We don't need to wait before drawing to the fake front buffer, as front buffer rendering by definition is allowed to produce artifacts. Fixes hangs in some cases when re-using the fake front buffer, due to it still being busy (i.e. in use for presentation). Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/106404 Bugzilla: https://bugs.freedesktop.org/107757 Tested-by: Olivier Fourdan <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> (cherry picked from commit aefac10)
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radv: fix function names for VK_EXT_conditional_rendering
Otherwise they are not exported. CC: 18.2 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected] Signed-off-by: Samuel Pitoiset <[email protected]> (cherry picked from commit d4bf954)
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radv: fix VK_EXT_conditional_rendering visibility
It's actually just the opposite. This fixes the new Sascha conditionalrender demo. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit abdf396)
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radv: bump the maximum number of arguments to 64
Bumping to 64 should be safe enough. Fixes some crashes with new CTS: dEQP-VK.binding_model.descriptorset_random.* CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit b9f6521)
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radv: handle loc->indirect correctly for the first descriptor
This was wrong for descriptor #0 when all of them are indirect. This is because indirect_offset was 0 and we emitted a "normal" descriptor pointer for nothing. While we are at it remove radv_userdata_info::indirect_offset which is useless. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit aa30205)
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radv: fix GPU hangs with 32-bit indirect descriptors
LLVM 6 isn't affected. Fixes GPU hangs with new CTS: dEQP-VK.binding_model.descriptorset_random.* CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 063264d)
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radv: fix flushing indirect descriptors
Let say, we first bind a graphics pipeline that needs indirect descriptors sets. The userdata pointers will be emitted at draw time. Then if we bind a compute pipeline that doesn't need any indirect descriptors, the driver will re-emit them for all grpahics stages. To avoid this to happen, just check the bind point type. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 748f4cc)
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radv: fix setting global locations for indirect descriptors
Indirect descriptors only need one entry, we don't have to emit a location for every descriptors. Fixes GPU hangs with new CTS: dEQP-VK.binding_model.descriptorset_random.* CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 9de062e)
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st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)
When using Freecad, I was getting intermittent segfaults inside of mesa. I traced it down to this path in st_cb_drawpixels.c where the result of pipe_transfer_map wasn't being checked. In my case, it was returning NULL because nouveau_bo_new returned ENOENT. I'm by no means a mesa developer, but this patch solves the problem for me and seems reasonable enough. v2: Marek - also unmap the PBO and release the texture, and call the make_texture function sooner for less cleanup Cc: 18.1 18.2 <[email protected]> (cherry picked from commit 936e0dc)
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android: broadcom/genxml: fix collision with intel/genxml header-gen …
…macro Fixes the following building error, happening when building both intel and broadcom: Gen Header: libmesa_broadcom_genxml_32 <= v3d_packet_v21_pack.h FAILED: gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h /bin/bash -c "python external/mesa/src/broadcom/cle/gen_pack_header.py \ external/mesa/src/broadcom/cle/v3d_packet_v21.xml \ > gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h" Traceback (most recent call last): File "external/mesa/src/broadcom/cle/gen_pack_header.py", line 626, in <module> p = Parser(sys.argv[2]) IndexError: list index out of range header-gen macro is already defined by Intel genxml building rules and the existing header-gen does not have the $(PRIVATE_VER) argument, infact the bash command line logged in the building error is missing exactly $(PRIVATE_VER) argument Renaming the macro as pack-header-gen in src/broadcom/Android.genxml.mk solves the building error, another possible way is to keep the gen rules commands expanded and not use the macros. Fixes: 7f80a9f ("vc4: Introduce XML-based packet header generation like Intel's.") Cc: "18.2" <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]> (cherry picked from commit 3341429)
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android: broadcom/cle: add gallium include path
Fixes the following building error: In file included from external/mesa/src/broadcom/cle/v3d_decoder.c:38: In file included from external/mesa/src/broadcom/cle/v3d_packet_helpers.h:29: external/mesa/src/gallium/auxiliary/util/u_math.h:42:10: fatal error: 'pipe/p_compiler.h' file not found ^~~~~~~~~~~~~~~~~~~ 1 error generated. Fixes: 5b10216 ("broadcom/genxml: Introduce a V3D packet/struct decoder.") Cc: "18.2" <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]> (cherry picked from commit 9158e0b)
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android: broadcom/cle: export the broadcom top level path headers
Fixes the following building error in vc4 build: In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_render_cl.c:34: In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_drv.h:27: In file included from external/mesa/src/gallium/drivers/vc4/vc4_simulator_validate.h:34: In file included from external/mesa/src/gallium/drivers/vc4/vc4_context.h:39: In file included from external/mesa/src/gallium/drivers/vc4/vc4_cl.h:56: gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h:12:10: fatal error: 'cle/v3d_packet_helpers.h' file not found ^~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Fixes: 5b10216 ("broadcom/genxml: Introduce a V3D packet/struct decoder.") Cc: "18.2" <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]> (cherry picked from commit cc3b99b)
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radv: Set the user SGPR MSB for Vega.
Otherwise using 32 user SGPRs would be broken. CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit d97c892)
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radv: Only allow 16 user SGPRs for compute on GFX9+.
Apparently for compute there are only 16 instead of the 32 for the graphics path. Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.noiub.comp.0 CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 0dd8189)
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Commits on Sep 19, 2018
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winsys/virgl: avoid unintended behavior
If we end up never taking the loop that writes ret, we can end up with an uninitialized value, and if we're *really* unlucky, that value can be -1, causing us to go down an error-path instead of a success path. This was obviously not intended, so let's just initialize this to zero. Noticed by Valgrind: Conditional jump or move depends on uninitialised value(s) at 0xBA640A0: virgl_drm_winsys_resource_cache_create (virgl_drm_winsys.c:348) by 0xBA62FCF: virgl_buffer_create (virgl_buffer.c:170) by 0xBA605AC: virgl_resource_create (virgl_resource.c:60) by 0xBCF816F: bufferobj_data (st_cb_bufferobjects.c:344) by 0xBCF816F: st_bufferobj_data (st_cb_bufferobjects.c:390) by 0xBB7E836: vbo_use_buffer_objects (vbo_exec_api.c:1136) by 0xBCFCC6E: st_create_context_priv (st_context.c:414) by 0xBCFD3CD: st_create_context (st_context.c:590) by 0xBBB30CA: st_api_create_context (st_manager.c:896) by 0xB981E76: dri_create_context (dri_context.c:155) by 0xB97BDCE: driCreateContextAttribs (dri_util.c:473) by 0x5288331: dri3_create_context_attribs (dri3_glx.c:309) by 0x5264D64: glXCreateContextAttribsARB (create_context.c:78) Fixes: a8987b8 ("virgl: add driver for virtio-gpu 3D (v2)") Signed-off-by: Erik Faye-Lund <[email protected]> (cherry picked from commit eaa7185)
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nvir: Always split 64-bit IMAD/IMUL operations
Those operations do not map to actual hardware instructions, therefore those should always be lowered to 32-bit instructions. Fixes: 009c54a "nv50/ir: Split 64-bit integer MAD/MUL operations" Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Signed-off-by: Karol Herbst <[email protected]> (cherry picked from commit 21b92b3)
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virgl: adjust strides when mapping temp-resources
When we're mapping temp-resources, we clip the resource to the transfer-box, which means the stride might not be correct any more. So let's update the stride from the temp-resource, and recompute the layer-stride. This fixes crashes when running dEQP with --deqp-gl-config-name=rgba8888d24s8ms4 Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: a8987b8 "virgl: add driver for virtio-gpu 3D (v2)" Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit fa5e9f1)
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i965/fs: Don't propagate conditional modifiers from integer compares …
…to adds No shader-db changes on any Intel platform... which probably explains why no bugs have been bisected to this problem since it landed in Mesa 18.1. :( The commit mentioned below is in 18.2, so 18.1 would need a slightly different fix (due to code refactoring). Signed-off-by: Ian Romanick <[email protected]> Fixes: 77f269b "i965/fs: Refactor propagation of conditional modifiers from compares to adds" Reviewed-by: Alejandro Piñeiro <[email protected]> (reviewed the original patch) Cc: Matt Turner <[email protected]> (reviewed the original patch) (cherry picked from commit df9dbc0)
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anv/query: Write both dwords in emit_zero_queries
Each query slot is a uint64_t and we were only zeroing half of it. Fixes: 7ec6e4e "anv/query: implement multiview interactions" Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 07e214f)
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mesa/texture: Also check for LA texture when querying intensity compo…
…nent size Gallium may pick L16A16_FLOAT to represent GL_INTENSITY16F if no intensity format is provided by the driver. However, when calling glGetTexLevelParameteriv(..., GL_TEXTURE_INTENSITY_SIZE, ...) mesa will return a zero size because the actually used format has no intensity channel and as a fallback only the sizes of the red/green channels are checked. Also checking for LA sizes in the allocated texture resolves this problem. v2: Only check alpha channel size and return it (Marek) L and A size are always the same in this case. Fixes (on virgl): ext_framebuffer_multisample-fast-clear GL_ARB_texture_float * Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107832 Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 47e01e7)
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radv: Use build ID if available for cache UUID.
To get an useful UUID for systems that have a non-useful mtime for the binaries. I started using SHA1 to ensure we get reasonable mixing in the various possibilities and the various build id lengths. CC: <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit d17443a)
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mesa: Additional FlipY applications
Instances where direction was determined based on winsys or user fbo and should be determined based on FlipY. Key STATE_FB_WPOS_Y_TRANSFORM for of FlipY instead of _mesa_is_user_fbo. This corrects gl_FragCoord usage when applying GL_MESA_framebuffer_flip_y. Fixes: ab05dd1 ("i965: implement GL_MESA_framebuffer_flip_y [v3]") Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit ba6cc32)
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mesa: FramebufferParameteri parameter checking
Missing break; causes parameter checking to never pass GL_FRAMEBUFFER_FLIP_Y_MESA parameters. Fixes: 318c265 ("mesa: GL_MESA_framebuffer_flip_y extension [v4]") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit 60d0c0d)
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Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"
This reverts commit bc65dca. This was manually reverted. Reverting stops the menu hanging in some id tech games such as RAGE and Wolfenstein The New Order. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891 (cherry picked from commit 7a992fc)
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No changes here compared to Raven. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Kenneth Feng <[email protected]> Signed-off-by: Huang Rui <[email protected]> Cc: 18.1 18.2 <[email protected]> (cherry picked from commit 4490fce)
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nir: Add a small pass to rematerialize derefs per-block
This pass re-materializes deref instructions on a per-block basis to ensure that every use of a deref occurs in the same block as the instruction which uses it. Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "18.2" <[email protected]> (cherry picked from commit 7d1d120) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/compiler/nir/nir_deref.c Squashed with: nir: add initializer data to fix MSVC compile error CC: Jason Ekstrand <[email protected]> Fixes: 82799a5d1b8 ("nir: Add a small pass to rematerialize derefs per-block") Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> (cherry picked from commit 0c82e36)
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nir/loop_unroll: Re-materialize derefs in use blocks before unrolling
When we're about to re-arrange a bunch of blocks, it's a good idea to make sure that we don't have deref uses crossing block boundaries. Otherwise we may end up with a deref going through a phi and that would be bad. Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "18.2" <[email protected]> (cherry picked from commit 0796c39)
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nir/opt_if: Re-materialize derefs in use blocks before peeling loops
Reviewed-by: Iago Toral Quiroga <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107879 Cc: "18.2" <[email protected]> (cherry picked from commit 864c780)
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cherry-ignore: radv: fix descriptor pool allocation size
fixes: this commit was reverted by commit 95bb7d8. Signed-off-by: Juan A. Suarez Romero <[email protected]>
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Commits on Sep 21, 2018
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radv: Fix driver UUID SHA1 init.
Was missing the init, found by Emil. Fixes: d17443a "radv: Use build ID if available for cache UUID." CC: <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 0a77e70)
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Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add release notes for 18.2.1
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add sha256 checksums for 18.2.1
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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Commits on Sep 24, 2018
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anv,radv: Implement vkAcquireNextImage2
This was added as part of 1.1 but it's very hard to track exactly what extension added it. In any case, we should implement it. Cc: [email protected] Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit ab80889)
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anv: Add support for protected memory properties on anv_GetPhysicalDe…
…viceProperties2() VkPhysicalDeviceProtectedMemoryProperties structure is new on Vulkan 1.1. Fixes Vulkan CTS CL#2849. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 59a8e0d)
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radv: use the resolve compute path if dest uses multiple layers
The hardware path doesn't support resolving layers, for both source and destination images. This fixes a reflection issue when MSAA is enabled which affects GTA V and probably DIRT3. CC: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107786 Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Gregor Münch <gr.muench_at_gmail.com> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit fe3f13c)
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glsl_to_tgsi: invert gl_SamplePosition.y for the default framebuffer
Fixes dEQP-GLES31.functional.shaders.sample_variables.sample_pos.correctness.default_framebuffer with --deqp-gl-config-name=rgba8888d24s8ms4 Cc: 18.1 18.2 <[email protected]> (cherry picked from commit f0cd7db)
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pci_ids: add new polaris pci id
Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] (cherry picked from commit afb7c6b)
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vc4: Fix sin(0.0) and cos(0.0) accuracy to fix SDL rendering rotation.
SDL has some shaders that compute sin(angle) and cos(angle) for a rotation matrix in the VS, and angle is usually 0.0. Our previous implementation had quite a bit of error around 0.0, causing single-pixel rotations at typical window sizes. SDL2 has changed as of August 28th (commit 12156:e5a666405750) to not need sin/cos in the VS, but we should still fix this for existing implementations or similar patterns that other programs may have. glsl-cos goes from 32 instructions to 36, but 9 uniforms to 7. glsl-sin goes from 32 instructions to 34, but 8 uniforms to 7. This seems like a fine impact to have for the bugfix. Cc: 18.1 18.2 <[email protected]> Fixes: anholt/mesa#110 (cherry picked from commit 10d5d2d)
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st/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driv…
…er does not implement it This is equivalent to commit a65db0a, but for dri_kms_init_screen. Without this gbm_dri_is_format_supported always returns false. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104926 Fixes: e14fe41 ("st/dri: implement createImageFromRenderbuffer(2)") Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Tested-by: Adam Williamson <[email protected]> (cherry picked from commit 194bf0a)
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meson: Don't compile pipe loader with dri support when not using dri
Corrects building glx as gallium-xlib without any dri targets. v2: - fix ugly formatting Fixes: 66c94b9 ("meson: build gallium winsys for dri, null, and wrapper") Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 5dcb77e)
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nvc0: Update counter reading shaders to new NVC0_CB_AUX_MP_INFO
Fixes: 66ca7e4 ('nvc0: add support for programmable sample locations') Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> (cherry picked from commit 01fa76b)
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docs: Update FAQ with respect to s3tc support
It's just over 10 months since 17.3.0 was released with s3tc support enabled. Probably a good idea to update the FAQ page. v2: Incorporate feedback from Adam Jackson <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Fixes: 04396a1 ("mesa: Import libtxc_dxtn sources") Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit c95dd96)
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nvc0: fix bindless multisampled images on Maxwell+
NVC0_CB_AUX_BINDLESS_INFO isn't written to on Maxwell+ and it's too small anyway. With these changes, TXQ is used to determine the number of samples and the coordinate adjustment information looked up in a small array in the driver constant buffer. v2: rework to use TXQ and a small array instead of a larger array with an entry for each texture v3: get rid of the small array and calculate the adjustments in the shader Signed-off-by: Rhys Perry <[email protected]> Fixes: c2ae9b4 ('nvc0: implement multisampled images on Maxwell+') Reviewed-by: Ilia Mirkin <[email protected]> (cherry picked from commit b473fcc) Squashed with: nv50/ir: fix link-time build failure Seems this fixes linking problems that occur in some situations. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> (cherry picked from commit 6ca1402)
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Commits on Sep 25, 2018
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radeon/uvd: use bitstream coded number for symbols of Huffman tables
Signed-off-by: Leo Liu <[email protected]> Fixes: 130d1f4(radeon/uvd: reconstruct MJPEG bitstream) Cc: "18.2" <[email protected]> Reviewed-by: Boyuan Zhang <[email protected]> (cherry picked from commit 3e7b5e5)
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radv: only emit ZPASS_DONE for timestamp queries on gfx queues
A ZPASS_DONE packet doesn't make sense for the compute queue. It will result in a gpu hang. This change resolves a gpu hang for SteamVR+Vega. Cc: [email protected] Fixes: 1f616a8 "radv: emit a dummy ..." Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit ec1fcf9)
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vulkan/wsi/display: check if wsi_swapchain_init() succeeded
Fixes: da997eb "vulkan: Add KHR_display extension using DRM [v10]" Cc: Keith Packard <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit bde3102)
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radeonsi: add a workaround for bitfield_extract when count is 0
This ports the fix from 3d41757. Both LLVM 7 & 8 continue to have this problem. It fixes rendering issues in some menu and loading screens of Civ VI which can be seen in the trace from bug 104602. Note: This does not fix the black triangles on Vega for bug 104602. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104602 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107276
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Commits on Oct 1, 2018
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st/nine: Clamp RCP when 0*inf!=0
Tests done on several devices of all 3 vendors and of different generations showed that there are several ways of handling infs and NaN for d3d9. Tests showed Intel on windows does always clamp RCP, RSQ and LOG (thus preventing inf/nan generation), for all shader versions (some vendor behaviours vary with shader versions). Doing this in nine avoids 0*inf issues for drivers that can't generate 0*inf=0 (which is controled by TGSI's MUL_ZERO_WINS). For now clamp for all drivers. An ulterior optimization would be to avoid clamping for drivers with MUL_ZERO_WINS for the specific shader versions where NV or AMD don't clamp. LOG and RSQ being already clamped, this patch only clamps RCP. Fixes: iXit/Mesa-3D#316 Signed-off-by: Axel Davy <[email protected]> CC: <[email protected]> (cherry picked from commit 7ee5e5e)
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st/nine: Avoid redundant SetCursorPos calls
For some applications SetCursorPosition is called when a cursor event is received. Our SetCursorPosition was always calling wine SetCursorPos which would trigger a cursor event. The infinite loop is avoided by not calling SetCursorPos when the position hasn't changed. Found thanks to wine tests. Fixes irresponsive GUI for some applications. Fixes: iXit/Mesa-3D#173 Signed-off-by: Axel Davy <[email protected]> CC: <[email protected]> (cherry picked from commit dcfde02)
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st/nine: Increase maximum number of temp registers
With some test app I hit the limit. As we allocate on demand (up to the maximum), it is free to increase the limit. Signed-off-by: Axel Davy <[email protected]> CC: <[email protected]> (cherry picked from commit 7ae2509)
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vulkan: Disable randr lease for libxcb < 1.13
Since the Randr lease code was added, compiling against libxcb 1.12 no longer works. CC: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108024 Fixes: 7ab1fff Tested-By: Maxime <[email protected]> Fixes: 7ab1fff "vulkan: Add EXT_acquire_xlib_display [v5]" (cherry picked from commit dd333c6)
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Commits on Oct 2, 2018
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radeonsi: NaN should pass kill_if
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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Commits on Oct 5, 2018
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Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add release notes for 18.2.2
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add sha256 checksums for 18.2.2
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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AndroidIA: REVERTME: Enable sampling for imported dma_buf images
The HWC Vulkan backend needs to be able to sample from source images, so for now enable that for all users of vkCreateDmaBufImageINTEL. We can revert this patch once we land support for VK_MESAX_external_image_dma_buf, which allows the application to fill the 'usage' field. Jira: IAHWC-40 Test: Enable Vulkan backend of IA-Hardware-Composer and try kmscube. The cube should be visible and animated, but at this time there is severe flickering. Signed-off-by: Kevin Strasser <[email protected]> Acked-by: Tapani Pälli <[email protected]>
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AndroidIA: enable O3 for Mesa compilation.
Improves performance of graphics tests significantly. Signed-off-by: Yogesh Marathe <[email protected]> Acked-by: Tapani Pälli <[email protected]>
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Add format P010 etc for 10bit/12bit/16bit YUV420 formats
Add those definition in dri2_interface.h and in intel_screen.c This will make P010 formats be sampleable in OpenGL Signed-off-by: Lin Johnson <[email protected]>
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Mesa Static link with libexpat
In Android O, MESA needs to statically link libexpat so that it's in same namespace. Change-Id: I82b0be5c817c21e734dfdf5bfb6a9aa1d414ab33 Signed-off-by: Kishore Kadiyala <[email protected]>
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AndroidIA: Build fixes for OMR1.
Jira: None. Test: Build passes. Signed-off-by: Chen Lin Z <[email protected]>
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Internal: Relax permissions when we export prime handle for GEM.
This is needed in case we want to use mmap with dma-buf and write into the buffer in CPU side. This is useful when layers are rendered using software and we will either need to scan or texture from these layers. Check: https://patchwork.freedesktop.org/patch/56380/ Signed-off-by: Kalyan Kondapally <[email protected]>
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CHROMIUM: egl: automatically call eglReleaseThread on thread termination
EGL thread cleanup conformance tests could run out of memory as the contexts were not freed even though the application requested to have them deleted. This was caused by the fact that the contexts were still current on their threads when delete was called and (in order not to block any potential pending renders) they were just marked for delete. Fix this by calling eglReleaseThread on thread termination. This is safe to do even if this was already called by the application since, according to the EGL 1.5 spec, eglReleaseThread can be called multiple times without error. Fixes: dEQP-EGL.functional.thread_cleanup.multi_context_* dEQP-EGL.functional.robustness.create_context.query_robust_access
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FROMLIST: intel/genxml: Add register for object preemption.
Signed-off-by: Rafael Antognolli <[email protected]>
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anv/gen10: Enable object level preemption.
Set bit when initializing a device. Signed-off-by: Rafael Antognolli <[email protected]>
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FROMLIST: i965/gen10+: Enable object level preemption.
Set bit when initializing context. Signed-off-by: Rafael Antognolli <[email protected]>
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FROMLIST: i965/gen9: Add workarounds for object preemption.
Gen9 hardware requires some workarounds to disable preemption depending on the type of primitive being emitted. We implement this by adding a new atom that tracks BRW_NEW_PRIMITIVE. Whenever it happens, we check the current type of primitive and enable/disable object preemption. For now, we just ignore blorp. The only primitive it emits is 3DPRIM_RECTLIST, and since it's not listed in the workarounds, we can safely leave preemption enabled when it happens. Or it will be disabled by a previous 3DPRIMITIVE, which should be fine too. Signed-off-by: Rafael Antognolli <[email protected]> Cc: Kenneth Graunke <[email protected]>
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AndroidIA: prevent deadlock in droid_query_buffer_age
To avoid blocking other EGL calls, release the display mutex before calling update_buffers(), which will call droid_window_dequeue_buffer(). This patch fixes some failure cases in android graphics cts test. Signed-off-by: Min He <[email protected]> Signed-off-by: Chenglei Ren <[email protected]>
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From List: Check if the window is non-NULL before setting swap interval.
This fixes crash due to NULL window when swap interval is set for pbuffer surface. Jira: 61995 Test: CtsDisplayTestCases pass Signed-off-by: samiuddi <[email protected]>
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Signed-off-by: Kalyan Kondapally <[email protected]>
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The eglWaitSyncKHR should return immediately for better performance. While the intel_batchbuffer_flush in brw_fence_insert_locked may cause 2~4 ms delay, and impact the performance. It's apparent in Android, as the IAHwcomoser calls eglWaitSyncKHR in GL composition thread. The total 4~6ms delay for every composition may hurt the FPS target. Tracked-On: https://jira01.devtools.intel.com/browse/OAM-63673 Signed-off-by: Randy Xu <[email protected]>
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ignore some compile warning on android.
Signed-off-by: Qiming Shi <[email protected]> Signed-off-by: Mingwei Wang <[email protected]> Signed-off-by: jenny.q.cao <[email protected]>
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Disable EXT_pixel_format_float for Android CtsViewTestCases
Jira: None. Test: Android CTS should PASS for below android.view.cts.PixelCopyTest#testWideGamutWindowProducerCopyToRGBA16F Signed-off-by: Kevin Strasser <[email protected]> Signed-off-by: Kishore Kadiyala <[email protected]>
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Revert "Revert "mesa: add GL_HALF_FLOAT as supported type to readpixe…
…ls"" This reverts commit 6b21391. Andriod ask GL_HALF_FLOAT as supported type to readpixels. This patch help fix CTS test android.view.cts.PixelCopyTest. However, it may cause KHR-GLES3.packed_pixels.* regression on Linux. As CTS test is "Must Pass" on Android, let's keep this patch as specific fix for Android. Tracked-On: https://jira01.devtools.intel.com/browse/OAM-63305
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AndroidIA: glcpp: Hack to handle expressions in #line directives.
GLSL ES 320 technically allows #line to have arbitrary expression trees rather than integer literal constants, unlike the C and C++ preprocessor. This is likely a completely unused feature that does not make sense. However, Android irritatingly mandates this useless behavior, so this patch implements a hack to try and support it. We handle a single expression: #line <line number expression> but we avoid handling the double expression: #line <line number expression> <source string expression> because this is an ambiguous grammar. Instead, we handle the case that wraps both in parenthesis, which is actually well defined: #line (<line number expression>) (<source string expression>) With this change following tests pass: dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_vertex dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_fragment dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_vertex dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_fragment Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> BUG=b:33352633 BUG=b:33247335 TEST=affected tests passing on CTS 7.1_r1 sentry Change-Id: I7afbbb386bd4a582e3f241014a83eaccad1d50d9 Reviewed-on: https://chromium-review.googlesource.com/427305 Tested-by: Haixia Shi <[email protected]> Reviewed-by: Ilja H. Friedel <[email protected]> Commit-Queue: Haixia Shi <[email protected]> Trybot-Ready: Haixia Shi <[email protected]>
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Revert "Optimize the eglWaitSyncKHR"
This reverts commit 5f482bb. The KHR_wait_sync extension makes no concessions regarding the required behavior of the EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR condition, as defined by KHR_fence_sync. The spec still requires that all preceding commands have been fully realized before waiting on the sync object. If we include the resolve in the same batchbuffer flush as the fence, then we will actually just be blocking the resolve. So we do need to separate the resolve command flush from the fence wait flush. Signed-off-by: Kevin Strasser <[email protected]>
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REVERTME: i965: perf: implement GPA's null renderer
GPA requires a null renderer query which disables all rendering. This feels fairly at odds with the spirit of the INTEL_performance_query extension. Note: Considering the INTEL_blackhole_render implementation(https://www. khronos.org/registry/OpenGL/extensions/INTEL/INTEL_blackhole_render .txt, https://patchwork.freedesktop.org/series/40035/)need test case changes, and also need time to review in upstream, we keep this patch firstly for urgent project milestone. Test: Pass mdapi test_GfxDrv_DriverAcceptance test case GfxDrv_DriverAcceptanceQuery.GL_NULL_HARDWARE and has no reg issue Signed-off-by: Landwerlin, Lionel <[email protected]>
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REVERTME: anv/android: disable couple of KHR extensions for Android CTS
This change makes following test pass: dEQP-VK.api.info.device.extensions Test: dEQP-VK.api.info.device.extensions Signed-off-by: Tapani Pälli <[email protected]> [strassek: carry this patch until the extensions are whitelisted in CTS]
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FROMLIST: anv/android: handle storage images in vkGetSwapchainGralloc…
…UsageANDROID Android P and earlier expect that the surface supports storage images, and so many of the tests fail when the framework checks for that support. The framework also includes various image format and usage combinations that are invalid for the hardware. Drop the STORAGE restriction from the HAL and whitelist a pair of formats so that existing versions of Android can pass these tests. Fixes: dEQP-VK.wsi.android.* Signed-off-by: Kevin Strasser <[email protected]> (am from https://patchwork.freedesktop.org/patch/247681/)
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Commits on Oct 8, 2018
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nir/cf: Remove phi sources if needed in nir_handle_add_jump
If the block in which the jump is inserted is the predecessor of a phi then we need to remove phi sources otherwise the phi may end up with things improperly connected. This fixes the following CTS test when dEQP is run with SPIR-V optimization recipe 1: dEQP-VK.glsl.functions.control_flow.return_in_nested_loop_vertex Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> (cherry picked from commit bfc89c6)
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radeonsi: avoid sending GS_EMIT in shaders without outputs
Fixes GPU hangs. Cc: 18.1 18.2 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107857 Signed-off-by: Józef Kucia <[email protected]> Signed-off-by: Marek Olšák <[email protected]> (cherry picked from commit e24a4e0)
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st/nine: do not double-close the fd on teardown
As the newly introduced comment says: The pipe loader takes ownership of the fd Thus, there's no need to close it again. Cc: Patrick Rudolph <[email protected]> Cc: Axel Davy <[email protected]> Cc: [email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Axel Davy <[email protected]> (cherry picked from commit 7b8d1b3)
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egl: make eglSwapInterval a no-op for !window surfaces
As the spec says, the function is a no-op when the surface is not a window one. That spec implies that EGL_TRUE should be returned in that case, yet the ARM driver seems to return EGL_FALSE + EGL_BAD_SURFACE. The Nvidia driver returns EGL_TRUE. We follow that behaviour until a decision is made. https://gitlab.khronos.org/egl/API/merge_requests/17 Cc: samiuddi <[email protected]> Cc: Erik Faye-Lund <[email protected]> Cc: Tomasz Figa <[email protected]> Cc: <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 64b4ccd)
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egl: make eglSwapBuffers* a no-op for !window surfaces
Analogous to the previous commit - the spec says the function is a no-op when a pbuffer or pixmap surface is used. Cc: samiuddi <[email protected]> Cc: Erik Faye-Lund <[email protected]> Cc: Tomasz Figa <[email protected]> Cc: <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 8f66743)
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Commits on Oct 10, 2018
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anv: Use separate MOCS settings for external BOs
On Broadwell and above, we have to use different MOCS settings to allow the kernel to take over and disable caching when needed for external buffers. On Broadwell, this is especially important because the kernel can't disable eLLC so we have to do it in userspace. We very badly don't want to do that on everything so we need separate MOCS for external and internal BOs. In order to do this, we add an anv-specific BO flag for "external" and use that to distinguish between buffers which may be shared with other processes and/or display and those which are entirely internal. That, together with an anv_mocs_for_bo helper lets us choose the right MOCS settings for each BO use. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99507 Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 7a89a0d) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/intel/vulkan/anv_image.c src/intel/vulkan/genX_gpu_memcpy.c
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drirc: add a workaround for ARMA 3
Cc: 18.2 <[email protected]> (cherry picked from commit 8e0b4cb)
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glsl: do not attempt assignment if operand type not parsed correctly
v2: check types of both operands (Ian) Cc: [email protected] Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108012 (cherry picked from commit d1fa69e)
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glsl: fix array assignments of a swizzled vector
This happens in situations where we might do vec.wzyx[i] = ... The swizzle would get effectively ignored because of the interaction between how ir_assignment->set_lhs works and overwriting the write_mask. There are two cases, one where i is a constant, and another where i is variable. We have to be extra-careful in both cases. Fixes the following WebGL test: https://www.khronos.org/registry/webgl/sdk/tests/conformance2/glsl3/vector-dynamic-indexing-swizzled-lvalue.html And the new piglit tests: swizzled-writemask-indexing-nonconst.shader_test swizzled-writemask-indexing.shader_test Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Cc: [email protected] (cherry picked from commit 1bb1c03)
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nv50,nvc0: mark RGBX_UINT formats as renderable
This helps st/mesa avoid some (apparently) buggy fallbacks. Specifically the CopyTexSubImage fallback tries to read texture A as RGBA_FLOAT and write back that data into the target format, which fails for integer formats which have no appropriate logic to do the conversion. Since integer formats don't blend, there's no harm in the fact that the "A" component gets written anyways. Fixes, among others: https://www.khronos.org/registry/webgl/sdk/tests/conformance2/textures/canvas/tex-2d-rgb8ui-rgb_integer-unsigned_byte.html Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit 78d3640)
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nv50,nvc0: guard against zero-size blits
The current state tracker can generate these sometimes. Fixing this is more involved, and due to some integer math we can generate divisions-by-zero. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Cc: [email protected] (cherry picked from commit 9bf0614)
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nvc0: fix blitting red to srgb8_alpha
For some reason the 2d engine can't handle this. Red formats get special treatment there, so perhaps related. Fixes dEQP-GLES3 tests of the form: dEQP-GLES3.functional.fbo.blit.conversion.r{8,16f,32f}_to_srgb8_alpha8 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Cc: [email protected] (cherry picked from commit 92f56fb)
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intel/fs: Fix a typo in need_matching_subreg_offset
This fixes a bunch of Vulkan subgroup tests on little core platforms. Fixes: 4150920 "intel/fs: Add a helper for emitting scan operations" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Tested-by: Mark Janes <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 7e7959f)
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nir/from_ssa: Don't rewrite derefs destinations to registers
We already call nir_rematerialize_derefs_in_use_blocks_impl prior to calling nir_lower_ssa_defs_to_regs_block so the assertion that all deref uses in the block should hold. This fixes the following CTS test when SPIR-V optimization recipe 1: dEQP-VK.glsl.struct.local.loop_nested_struct_array_vertex Fixes: 606eb56 "intel/nir: Only lower load/store derefs" Reviewed-by: Iago Toral Quiroga <[email protected]> (cherry picked from commit 00f385e)
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i965: Replace checks for rb->Name with FlipY (v2)
In the GL_MESA_framebuffer_flip_y implementation _mesa_is_winsys_fbo checks were replaced with FlipY checks. rb->Name is also used to determine if a buffer is winsys. v2: Fixes annotation [for emil] Fixes: ab05dd1 ("i965: implement GL_MESA_framebuffer_flip_y [v3]") Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit 08f9740)
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vl/dri3: do full teardown on screen_destroy
Earlier commit added support for 'front_buffers', erroneously adding a return in vl_dri3_screen_destroy. Effectively leaking a lot of state. Fixes: 8d7ac0a ("vl/dri3: implement DRI3 BufferFromPixmap") Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Leo Liu <[email protected]> (cherry picked from commit d081ad2)
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Revert "mesa: remove unnecessary 'sort by year' for the GL extensions"
This reverts commit 3d81e11. As reported by Federico, some games require the 'sort by year' since they truncate the extensions which do not fit the fixed size string array. Seemingly I did not consider that, as the documentation (both Mesa and Nvidia) mentions about program crashes ... which are worked around by setting the env. variable. This commit reinstates the workaround and enhances the documentation. Cc: Marek Olšák <[email protected]> Cc: Ian Romanick <[email protected]> Reported-by: Federico Dossena <[email protected]> Fixes: 3d81e11 ("mesa: remove unnecessary 'sort by year' for the GL extensions") Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Tested-by: Federico Dossena <[email protected]> (cherry picked from commit fe8be81)
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anv/batch_chain: Don't start a new BO just for BATCH_BUFFER_START
Previously, we just went ahead and emitted MI_BATCH_BUFFER_START as normal. If we are near enough to the end, this can cause us to start a new BO just for the MI_BATCH_BUFFER_START which messes up chaining. We always reserve enough space at the end for an MI_BATCH_BUFFER_START so we can just increment cmd_buffer->batch.end prior to emitting the command. Fixes: a0b1332 "anv/batch_chain: Simplify secondary batch return..." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107926 Tested-by: Alex Smith <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit f5bab06)
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nir/alu_to_scalar: Use ssa_for_alu_src in hand-rolled expansions
The ssa_for_alu_src helper will correctly handle swizzles and other source modifiers for you. The expansions for unpack_half_2x16, pack_uvec2_to_uint, and pack_uvec4_to_uint were all broken with regards to swizzles. The brokenness of unpack_half_2x16 was causing rendering errors in Rise of the Tomb Raider on Intel ever since c11833a which added an extra copy propagation to the optimization pipeline and caused us to start seeing swizzles where we hadn't seen any before. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107926 Fixes: 9ce9010 "nir: Add lowering of nir_op_unpack_half_2x16." Fixes: 9b8786e "nir: Add lowering support for packing opcodes." Tested-by: Alex Smith <[email protected]> Tested-by: Józef Kucia <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit dd553bc)
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virgl, vtest: Correct the transfer size calculation
The transfer size used in virglrenderer refers to uint32_t, so one must add 3 and then divide by 4 instead of adding 3/4 which is a no-op with integers. Fixes: b3b82fe virgl/vtest: add vtest driver Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]> (cherry picked from commit 5d7858f)
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radv: add missing meson c++ visibility arguments
Fixes: 6f3aee4 "radv: using tls to store llvm related info and speed up compiles (v10)" Cc: Dave Airlie <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 9761887)
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Commits on Oct 11, 2018
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meson: Don't allow building EGL on Windows or MacOS
Currently mesa only supports EGL on Unix like systems, cygwin, and haiku. Meson should actually enforce this. This fixes the default build on MacOS. v2: - invert the condition, mark darwin and windows as not supported instead of trying to mark what is supported. v3: - add missing ) v3: - Update comment to reflect condition change in v2 CC: 18.2 <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit b852170)
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intel: Don't propagate conditional modifiers if a UD source is negated
This fixes a bug uncovered by my NIR integer division by constant optimization series. Fixes: 19f9cb7 "i965/fs: Add pass to propagate conditional..." Fixes: 627f94b "i965/vec4: adding vec4_cmod_propagation..." Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 4ba445e)
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anv: add missing unlock in error path.
Not going to matter, but be consistent. Found by coverity Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Fixes: caf41c7 (anv/allocator: Support softpin in the BO cache) (cherry picked from commit 29a7631)
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glsl: ignore trailing whitespace when define redefined
The Nvidia/AMD binary drivers allow this, as does GCC. This fixes shader compilation issues in the latest update of No Mans Sky. Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 0346ad3)
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util: disable cache if we have no build-id and timestamp is zero
Timestamp can be zero for example when Flatpak is used. In this case just disable the cache rather then segfaulting when incompatible cache items are loaded. V2: actually return false when mtime is 0. Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit ea66bfd)
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util: rename timestamp param in disk_cache_create()
Only some drivers use a timestamp here. Others use things such as build-id, or even a combination of build-ids from Mesa and LLVM. Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 6a88401)
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util: add disk_cache_get_function_identifier()
This can be used as a drop in replacement for disk_cache_get_function_timestamp(). Here we use build-id to generate a driver-id rather than build timestamp if available. This should resolve issues such as distros using reproducable builds and flatpak not having real build timestamps. Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 83ea8dd)
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radeonsi: use build-id when available for disk cache
Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 2169acb) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/gallium/drivers/radeonsi/si_pipe.c
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nouveau: use build-id when available for disk cache
Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 397f260)
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r600: use build-id when available for disk cache
Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 2b5f420)
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util: use force_compat_profile for Wolfenstein The Old Blood
This game is looking for some odd extension after creating a core context such as ARB_vertex_program and EXT_framebuffer_object. Rather then enabling these in core this forces the game to use compat. This allows the game to run and seems to work without issues. All other id tech games/engines use a compat profile. Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 024abd3)
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Commits on Oct 15, 2018
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radv: add a workaround for a VGT hang with prim restart and strips
Otherwise, Yakuza and The Evil Within hang the GPU with DXVK. This apparently only works on Polaris. Suggested by Marek. Cc: [email protected] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit d179312)
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st/va: use provided sizes and coords for vlVaGetImage
vlVaGetImage should respect the width, height, and coordinates x and y that passed in. Therefore, pipe_box should be created with the passed in values instead of surface width/height. v2: add input size check, return error when size out of bounds v3: fix the size check for vaimage v4: add size adjustment for x and y coordinates Signed-off-by: Boyuan Zhang <[email protected]> Cc: "18.2" <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Acked-by: Christian König <[email protected]> (cherry picked from commit d76c277)
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r600/sb: Fix constant-logical-operand warning.
sb/sb_bc_parser.cpp:620:27: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand] if (cf->bc.op_ptr->flags && FF_GDS) ^ ~~~~~~ sb/sb_bc_parser.cpp:620:27: note: use '&' for a bitwise operation if (cf->bc.op_ptr->flags && FF_GDS) ^~ & sb/sb_bc_parser.cpp:620:27: note: remove constant to silence this warning if (cf->bc.op_ptr->flags && FF_GDS) ~^~~~~~~~~ Fixes: da977ad ("r600/sb: start adding GDS support") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit cc33621)
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util: better handle program names from wine
For some reason wine will sometimes give us a windows style path for an application. For example when running the 64bit version of Rage wine gives a Unix style path, but when running the 32bit version is gives a windows style path. If we detect no '/' in the path at all it should be safe to assume we have a wine application and instead look for a '\'. Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 3f9d8e9)
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util: add drirc workarounds for RAGE
This allows the game to run on wine (tested on radeonsi where we have compat profile support). (cherry picked from commit 0da93de)
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Commits on Oct 17, 2018
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UPSTREAM: i965: fallback RGBX to RGBA in glEGLImageTargetRenderbuffer…
…StorageOES In the same fashion as is done for glEGLImageTextureTarget2D. v2: share the fallback which sets baseformat and internalformat correctly which makes both of the tests pass (Tapani) Fixes android.hardware.nativehardware.cts.AHardwareBufferNativeTests: #SingleLayer_ColorTest_GpuColorOutputCpuRead_R8G8B8X8_UNORM #SingleLayer_ColorTest_GpuColorOutputIsRenderable_R8G8B8X8_UNORM Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]> (cherry picked from commit 47e3338)
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Commits on Oct 19, 2018
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Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add release notes for 18.2.3
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add sha256 checksums for 18.2.3
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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Commits on Oct 22, 2018
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ac/nir: Use context-specific LLVM types
LLVMInt*Type() return types from the global context and therefore are not safe for use in other contexts. Use types from our own context instead. Fixes frequent crashes seen when doing multithreaded pipeline creation. Fixes: 4d0b02b "ac: add support for 16bit load_push_constant" Fixes: 7e7ee82 "ac: add support for 16bit buffer loads" Cc: "18.2" <[email protected]> Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit ca83d51)
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radv: fix check for perftest options size
It was using the debug options array size. CC: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit e71a877)
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radeonsi: Bump number of allowed global buffers to 32
Fixes assertion failure/crash when running luxmark/luxball on clover. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108272 CC: [email protected] Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 06bf567)
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radeonsi: fix a VGT hang with primitive restart on Polaris10 and later
Cc: 18.1 18.2 <[email protected]> Tested-by: Jakob Bornecrantz <[email protected]> (cherry picked from commit eae8f49)
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loader/dri3: Also wait for front buffer fence if we triggered it
In that case, we have to wait for the fence to synchronize with the corresponding drawing we triggered in the X server. Fixes incorrect display with the i965 driver and some applications, e.g. solvespace. Bugzilla: https://bugs.freedesktop.org/108097 Fixes: aefac10 "loader/dri3: Only wait for back buffer fences in dri3_get_buffer" Tested-by: Sergii Romantsov <[email protected]> (cherry picked from commit c20ba1b)
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ac: Introduce ac_build_expand()
And implement ac_bulid_expand_to_vec4() on top of it. Fixes: 7e7ee82 ("ac: add support for 16bit buffer loads") Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 59535b0)
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ac: Fix loading a dvec3 from an SSBO
The comment was wrong, since the loop above casts to a type with the correct bitsize already. Fixes: 7e7ee82 ("ac: add support for 16bit buffer loads") Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 27fe3f5)
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Commits on Oct 23, 2018
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meson: don't require libelf for r600 without LLVM
r600 doesn't have a hard requirement on LLVM, and therefore doesn't have a hard requirement on libelf. Currently the logic doesn't allow that however. Distro-bug: https://bugs.gentoo.org/669058 Fixes: 5060c51 ("meson: build r600 driver") Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 4e785fb)
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Fixes: a4c4efa "radv: Rework guard band calculation" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit 17b03b5)
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Commits on Oct 25, 2018
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scons: Put to rest zombie texture_float build option.
I found a remnant of texture_float build option that wasn't removed in commit 66673be This patch removes it. Cc: [email protected] Reviewed-by: Jose Fonseca <[email protected]> (cherry picked from commit d99fda1)
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gallium: Correctly handle no config context creation
This patch fixes the following Piglit test: spec@egl_mesa_configless_context@basic It also fixes few test in a virgl guest. v2: Evaluate the value of no_config (Ilia) Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Elie Tournier <[email protected]> Signed-off-by: Marek Olšák <[email protected]> (cherry picked from commit 9179c74)
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Commits on Oct 26, 2018
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swr/rast: ignore CreateElementUnorderedAtomicMemCpy
This function's API changed between LLVM 5 and 6. Compile errors occur when building with LLVM 6+ if LLVM 5 was used for a dist tarball CC: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107865 Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit edf3801)
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radv: Emit enqueued pipeline barriers on event write.
Since the CPU can read them we need to execute any GPU->CPU flushes before the event is written. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108524 Fixes: f4e499e "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit d41c3cc)
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util: Change remaining uint32 cache ids to sha1
After discussion with Timothy Arceri. disk_cache_get_function_identifier was using only the first byte of the sha1 build-id. Replace disk_cache_get_function_identifier with implementation from radv_get_build_id. Instead of writing a uint32_t it now writes to a mesa_sha1. All drivers using disk_cache_get_function_identifier are updated accordingly. Reviewed-by: Timothy Arceri <[email protected]> Fixes: 83ea8dd ("util: add disk_cache_get_function_identifier()") [Juan A. Suarez: resolve trivial conflicts] (cherry picked from commit 07a00a8) Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/gallium/drivers/radeonsi/si_pipe.c
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Commits on Oct 29, 2018
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spirv: Use the right bit-size for spec constant ops
Previously, we would always pull the bit size from the destination which is wrong for opcodes like nir_ilt where the sources are variable-sized but the destination is a fixed size. We were getting lucky before because nir_op_ilt returns a 32-bit value and basically everyone who uses spec constants uses 32-bit ones. Cc: [email protected] Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit 8fa70cf)
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blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP
Cc: [email protected] Suggested-by: Francisco Jerez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit b6b2b27) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/intel/blorp/blorp_genX_exec.h
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cherry-ignore: Revert "anv/skylake: disable ForceThreadDispatchEnable"
pick: This commit reverts 0fa9e6d which did not land in branch. Signed-off-by: Juan A. Suarez Romero <[email protected]>
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anv: Fix sanitization of stencil state when the depth test is disabled
When depth testing is disabled, we shouldn't pay attention to the specified depthCompareOp, and just treat it as always passing. Before, if the depth test is disabled, but depthCompareOp is VK_COMPARE_OP_NEVER (e.g. from the app having zero-initialized the structure), then sanitize_stencil_face() would have incorrectly changed passOp to VK_STENCIL_OP_KEEP. v2: Roll the depthTestEnable check into the ds_aspect check below since they now both do the same thing. Fixes: 028e113 "anv/pipeline: Be smarter about depth/stencil state" Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 3bd239f)
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intel/blorp: Define the clear value bounds for HiZ clears
Follow the restriction of making sure the clear value is between the min and max values defined in CC_VIEWPORT. Avoids a simulator warning for some piglit tests, one of them being: ./bin/depthstencil-render-miplevels 146 d=z32f_s8 Jason found this to fix incorrect clearing on SKL. Fixes: 0994815 ("intel/blorp: Add the BDW+ optimized HZ_OP sequence to BLORP") Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Jason Ekstrand <[email protected]> (cherry picked from commit 5bcf479) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/intel/blorp/blorp_genX_exec.h
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anv: Flag semaphore BOs as external
It probably doesn't actually break anything but it does cause some assertions in debug builds. Fixes: 7a89a0d "anv: Use separate MOCS settings for external BOs" Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit cbd4468)
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freedreno: fix inorder rendering case
Signed-off-by: Rob Clark <[email protected]> (cherry picked from commit 12de415) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/gallium/drivers/freedreno/freedreno_state.c
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freedreno: don't flush when new and old pfb is identical
In the 'inorder' case (ie. FD_MESA_DEBUG=inorder, or old kernel), if the u_blitter clear path is used (a3xx, a4xx, and some fallback cases on newer gens), util_blitter_restore_fb_state() will set_framebuffer_state() to something that is identical to the current fb state, which triggers an unnecessary flush, and then eventually an assert: (gdb) bt #0 0x0000007fbf24a078 in kill () from /lib64/libc.so.6 intel#1 0x0000007fbe061278 in _debug_assert_fail (expr=0x7fbe93a820 "!batch->flushed", file=0x7fbe93a628 "../src/gallium/drivers/freedreno/freedreno_batch.c", line=491, function=0x7fbe93a990 <__func__.17380> "fd_batch_check_size") at ../src/gallium/auxiliary/util/u_debug.c:322 intel#2 0x0000007fbe1ccb8c in fd_batch_check_size (batch=0x55556d5a70) at ../src/gallium/drivers/freedreno/freedreno_batch.c:491 intel#3 0x0000007fbe1d0e08 in fd_clear (pctx=0x55555c61e0, buffers=5, color=0x55556e388c, depth=1, stencil=0) at ../src/gallium/drivers/freedreno/freedreno_draw.c:463 intel#4 0x0000007fbe57afa4 in st_Clear (ctx=0x55556e17b0, mask=18) at ../src/mesa/state_tracker/st_cb_clear.c:452 The assert was introduced in 4b847b3, so from a functionality standpoint this patch fixes that commit. But it should also avoid an unnecessary flush in the 'inorder' case, fixing a performance bug. Fixes: 4b847b3 freedreno: make fd_batch a one-shot thing Signed-off-by: Rob Clark <[email protected]> (cherry picked from commit a61952e)
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swr/rast: fix intrinsic/function for LLVM 7 compatibility
Converted from x86 VFMADDPS intrinsic to generic LLVM intrinsic, and removed createInstructionSimplifierPass, which were both removed in LLVM 7.0.0 These changes combine patches we received from the community and our own internal patches Reviewed-by: Bruce Cherniak <[email protected]> Tested-by: Chuck Atkins <[email protected]> (cherry picked from commit 8c872ac)
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Commits on Oct 31, 2018
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Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add release notes for 18.2.4
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add sha256 checksums for 18.2.4
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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Commits on Nov 6, 2018
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intel/tools: include stdarg.h in error2aub
Include stdarg.h in error2aub.c otherwise it fails to build on OpenBSD due to not finding definitions for va_list va_start va_end. Signed-off-by: Jonathan Gray <[email protected]> Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit ae8e81b)
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cherry-ignore: add explicit 18.3 only nominations
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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svga: add missing meson build dependency
Fixes: a537231 "meson: build svga driver on linux" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 98e7c3e)
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clover: add missing meson build dependency
Fixes: 42ea063 "meson: build clover" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit 1df0c1e)
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glsl/linker: Fix out variables linking during single stage
Since out variables are copied from shader objects instruction streams to linked shader instruction steam it should be cloned at first to keep source instruction steam unaltered. Fixes: 966a797 ("glsl/linker: Link all out vars from a shader objects on a single stage") Signed-off-by: Vadym Shovkoplias <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105731 (cherry picked from commit 7d66edd)
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i965/batch: don't ignore the 'brw_new_batch' call for a 'new batch'
If we restore the 'new batch' using 'intel_batchbuffer_reset_to_saved' function we must restore the default state of the batch using 'brw_new_batch' function because the 'intel_batchbuffer_flush' function will not do it for the 'new batch' again. At least the following fields of the batch 'state_base_address_emitted','aperture_space', 'state_used' should be restored to default values to avoid: 1. the aperture_space overflow 2. the missed STATE_BASE_ADDRESS commad in the batch 3. the memory overconsumption of the 'statebuffer' due to uncleared 'state_used' field. etc. v2: merge with new commits, changes was minimized, added the 'fixes' tag v3: added in to patch series Fixes: 3faf56f "intel: Add an interface for saving/restoring the batchbuffer state." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107626 Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit e4e0fd5)
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glsl_to_tgsi: don't create 64-bit integer MAD/FMA
TGSI has no I64MAD/U64MAD opcode. Fixes: 2785807 ('st/glsl_to_tgsi: add support for 64-bit integers') Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 5172eb2)
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st/mesa: calculate buffer size correctly for packed uniforms
Fixes: edded12 ("mesa: rework ParameterList to allow packing") Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 9ec4a5e)
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st/glsl_to_nir: fix next_stage gathering
ffs() just returns the bit that is set, we need to know what stage that bit represents so use u_bit_scan() instead. Fixes: 2ca5d95 ("st/glsl_to_nir: gather next_stage in shader_info") Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 3159683)
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meson: link gallium nine with pthreads
In some cases (not building with llvm, which automatically pulls in pthreads) nine needs to be directly linked with pthreads. Fixes building on x86 (32 bit) without llvm. Distro bug: https://bugs.gentoo.org/670094 Fixes: 6b4c704 ("meson: build gallium nine state_tracker") Tested-by: Rafal Lalik <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 7652931)
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r600/sb: Fix constant logical operand in assert.
Fixes: da977ad ("r600/sb: start adding GDS support") Signed-off-by: Vinson Lee <[email protected]> Reviewed-By: Gert Wollny <[email protected]> (cherry picked from commit 64a9ed8)
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Commits on Nov 7, 2018
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st/va: fix incorrect use of resource_destroy
Fixes: 4373dd3 ("st/va: Support YUV formats in vaCreateSurfaces") Cc: Drew Davenport <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> (cherry picked from commit 04298a2)
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egl/glvnd: correctly report errors when vendor cannot be found
If the user provides an invalid display or device the ToVendor lookup will fail. In this case, the local [Mesa vendor] error code will be set. Thus on sequential eglGetError(), the error will be EGL_SUCCESS. To be more specific, GLVND remembers the last vendor and calls back into it's eglGetError, although there's no guarantee to ever have had one. v2: - Add _eglError call, so the debug callback is executed (Kyle) - Drop XXX comment. Piglit: tests/egl/spec/egl_ext_device_query Fixes: ce562f9 ("EGL: Implement the libglvnd interface for EGL (v3)") Cc: Eric Engestrom <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Kyle Brenneman <[email protected]> (cherry picked from commit b3ade65)
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cherry-ignore: i965/batch: avoid reverting batch buffer if saved stat…
…e is an empty fixes: This commit was reverted by commit 5f312e9. Signed-off-by: Juan A. Suarez Romero <[email protected]>
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m4: add Werror when checking for compiler flags
Seemingly that at some point clang started accepting _any_ flags, whereas previously it would error out. These days, you can give it -Whamsandwich and it will succeed, while at the same time throwing an annoying warning. Add -Werror so that everything gets flagged and set accordingly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108082 Cc: Vinson Lee <[email protected]> Repored-by: Vinson Lee <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 2928392)
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virgl/vtest-winsys: Use virgl version of bind flags
The bind flags defined by mesa/gallium might not always be in sync with the ones copied to virglrenderer/gallium. Therefore, use the flags defined in virgl like it is done for all the other calls to create resources. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit b710680)
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wayland/egl: Resize EGL surface on update buffer for swrast
After commit a9fb331 ("wayland/egl: update surface size on window resize"), the surface size is updated as soon as the resize is done, and `update_buffers()` would resize only if the surface size differs from the attached size. However, in the case of swrast, there is no resize callback and the attached size is updated in `dri2_wl_swrast_commit_backbuffer()` prior to the `swrast_update_buffers()` so the attached size is always up to date when it reaches `swrast_update_buffers()` and the surface is never resized. This can be observed with "totem" using the GDK backend on Wayland (the default) when running on software rendering: $ LIBGL_ALWAYS_SOFTWARE=true CLUTTER_BACKEND=gdk totem Resizing the window would leave the EGL surface size unchanged. To avoid the issue, partially revert the part of commit a9fb331 for `swrast_update_buffers()` and resize on the win size and not the attached size. Fixes: a9fb331 - wayland/egl: update surface size on window resize Signed-off-by: Olivier Fourdan <[email protected]> CC: Daniel Stone <[email protected]> CC: Juan A. Suarez Romero <[email protected]> CC: [email protected] Reviewed-by: Juan A. Suarez <[email protected]> (cherry picked from commit 55af17f)
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anv/android: mark gralloc allocated BOs as external
Allocating through Gralloc implies buffers are going to be used outside the driver. We have special MOCS settings for external BOs and we probably want to use them here too. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: a1220e7 ("anv/android: Set the BO flags in bo_cache_import (v2)") Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 421fa01)
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wsi/wayland: use proper VkResult type
Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit dcee22a)
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wsi/wayland: only finish() a successfully init()ed display
Fixes: 4369102 "vulkan/wsi/wayland: Stop caching Wayland displays" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> (cherry picked from commit d515ded)
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Commits on Nov 8, 2018
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radv: disable conditional rendering for vkCmdCopyQueryPoolResults()
VK_EXT_conditional_rendering says that copy commands should not be affected by conditional rendering. Cc: 18.2 18.3 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 0a0aa2b) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <[email protected]> Conflicts: src/amd/vulkan/radv_query.c
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Commits on Nov 9, 2018
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radv: only expose VK_SUBGROUP_FEATURE_ARITHMETIC_BIT for VI+
Inclusive and exclusives scan are missing because older chips don't have llvm.amdgcn.update.dpp. This fixes crashes with dEQP-VK.subgroups.arithmetic.*. CC: [email protected] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit 0dcd99c)
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autotools: library-dependency when no sse and 32-bit
Building of 32bit Mesa may fail if __SSE__ is not specified. Added missed dependency from libm. v2: avoided dependecy on any flag, just link v3: meson doesn't fail, but have added dependency on libm CC: Dylan Baker <[email protected]> CC: Lionel G Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108560 Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> (cherry picked from commit ce837a5)
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Commits on Nov 12, 2018
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st/nine: fix stack corruption due to ABI mismatch
This fixes various crashes and hangs when using nine's 'thread_submit' feature. On 64bit, the thread function's data argument would just be NULL. On 32bit, the data argument would be garbage depending on the compiler flags (in my case -march>=core2). Fixes: f3fa7e3 ("st/nine: Use WINE thread for threadpool") Cc: [email protected] Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Axel Davy <[email protected]> (cherry picked from commit 10598c9)
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nir: add glsl_type_is_integer() helper
Fixes: 1c9c42d ("nir: add varying component packing helpers") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 9dd737b)
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nir: don't pack varyings ints with floats unless flat
Fixes: 1c9c42d ("nir: add varying component packing helpers") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit a068958)
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Commits on Nov 14, 2018
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util/ralloc: Switch from DEBUG to NDEBUG
The debug code is all asserts, so protect it with the same thing that controls assert. Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit 7e3748c)
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util/ralloc: Make sizeof(linear_header) a multiple of 8
Prior to this patch sizeof(linear_header) was 20 bytes in a non-debug build on 32-bit platforms. We do some pointer arithmetic to calculate the next available location with ptr = (linear_size_chunk *)((char *)&latest[1] + latest->offset); in linear_alloc_child(). The &latest[1] adds 20 bytes, so an allocation would only be 4-byte aligned. On 32-bit SPARC a 'sttw' instruction (which stores a consecutive pair of 4-byte registers to memory) requires an 8-byte aligned address. Such an instruction is used to store to an 8-byte integer type, like intmax_t which is used in glcpp's expression_value_t struct. As a result of the 4-byte alignment returned by linear_alloc_child() we would generate a SIGBUS (unaligned exception) on SPARC. According to the GNU libc manual malloc() always returns memory that has at least an alignment of 8-bytes [1]. I think our allocator should do the same. So, simple fix with two parts: (1) Increase SUBALLOC_ALIGNMENT to 8 unconditionally. (2) Mark linear_header with an aligned attribute, which will cause its sizeof to be rounded up to that alignment. (We already do this for ralloc_header) With this done, all Mesa's unit tests now pass on SPARC. [1] https://www.gnu.org/software/libc/manual/html_node/Aligned-Memory-Blocks.html Fixes: 47e1758 ("glcpp: use the linear allocator for most objects") Bug: https://bugs.gentoo.org/636326 Reviewed-by: Eric Anholt <[email protected]> (cherry picked from commit efb1cca)
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There are two problems: 1) the extra underscore in MISSING_64BIT_ATOMICS 2) we should link with libatomic if the previous test decided we needed it Fixes: d199225 ("meson: Add build Intel "anv" vulkan driver") Reviewed-and-Tested-by: Matt Turner <[email protected]> (cherry picked from commit 4eab98b)
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configure: install KHR/khrplatform.h when needed
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107511 Fixes: f7d42ee "include: update GL & GLES headers (v2)" Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Brad King <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 87c1561)
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include: update GL & GLES headers (v2)
v2: use correct files Acked-by: Ian Romanick <[email protected]> (cherry picked from commit f7d42ee)
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meson: install KHR/khrplatform.h when needed
Fixes: f7d42ee "include: update GL & GLES headers (v2)" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit e02f061)
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Commits on Nov 15, 2018
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Signed-off-by: Juan A. Suarez Romero <[email protected]>
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docs: add release notes for 18.2.5
Signed-off-by: Juan A. Suarez Romero <[email protected]>
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Commits on Nov 19, 2018
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i965: SIMD32 heuristics debug flag
Added a new DEBUG_HEUR32 flag to INTEL_DEBUG flags for enabling SIMD32 selection heuristics. Change-Id: I3a29bd0f77381d3f76421f918b850bbb81e7a938 Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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i965: SIMD32 heuristics control data
Added a new structure for holding SIMD32 heuristics control data. The control data itself will be fetched from drirc. Change-Id: I0058f3de839b522d3bb7d4c30a99b96a3a6ec286 Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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i965: SIMD32 heuristics control data from drirc
To be able to test the heuristics with different parameters, they can be controlled via environment variables through drirc. Change-Id: Idffb0e87e44c1f735e99c3ba89cb6f26db886fbe Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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mesa: Helper functions for counting set bits in a mask
Change-Id: I00c0012b302601c6d98f6856d1c4a96a15ff1c1b Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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i965/fs: Save the instruction count of each dispatch width
The SIMD32 selection heuristics will use this information for deciding whether SIMD32 shaders should be used. Change-Id: I074bd061c5f633548baa2b84879953a3b156e73b Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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i965/fs: SIMD32 selection heuristic based on grouped texture fetches
The function goes through the compiled shader and checks how many grouped texture fetches there are. This is a simple heuristic which gets rid of most of the regressions when enabling SIMD32 shaders but still retains some of the benefits. Change-Id: I9794f80766b9434a8cf83caa5bd3958075575f0a Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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i965/fs: Enable all SIMD32 heuristics
There are three simple heuristics for SIMD32 shader enabling: - How many MRTs does the shader write into? - How many grouped texture fetches does the shader have? - How many instructions does the SIMD32 shader have compared to the SIMD16 shader? For testing purposes, the heuristics can be controlled via these environment variables: simd32_heuristic_mrt_check - Enables MRT write check - Default: true simd32_heuristic_max_mrts - How many MRT writes the heuristic allows - Default: 1 simd32_heuristic_grouped_check - Enables grouped texture fetch check - Default: true simd32_heuristic_grouped_sends - How many grouped texture fetches the heuristic allows - Default: 4 simd32_heuristic_inst_check - Enables SIMD32 vs. SIMD16 instruction count check - Default: true simd32_heuristic_inst_ratio - SIMD32 vs. SIMD16 instruction count ratio the heuristic allows - Default: 2.0 SIMD32 shaders will not be compiled also when SIMD16 compilation fails or spills. Change-Id: I80e3f14843a031741778ea84253b9a358d3156b3 Tracked-On: https://jira01.devtools.intel.com/browse/OAM-70309
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Commits on Nov 22, 2018
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AndroidIA: REVERTME: Enable sampling for imported dma_buf images
The HWC Vulkan backend needs to be able to sample from source images, so for now enable that for all users of vkCreateDmaBufImageINTEL. We can revert this patch once we land support for VK_MESAX_external_image_dma_buf, which allows the application to fill the 'usage' field. Jira: IAHWC-40 Test: Enable Vulkan backend of IA-Hardware-Composer and try kmscube. The cube should be visible and animated, but at this time there is severe flickering. Signed-off-by: Kevin Strasser <[email protected]> Acked-by: Tapani Pälli <[email protected]>
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AndroidIA: enable O3 for Mesa compilation.
Improves performance of graphics tests significantly. Signed-off-by: Yogesh Marathe <[email protected]> Acked-by: Tapani Pälli <[email protected]>
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Add format P010 etc for 10bit/12bit/16bit YUV420 formats
Add those definition in dri2_interface.h and in intel_screen.c This will make P010 formats be sampleable in OpenGL Signed-off-by: Lin Johnson <[email protected]>
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Mesa Static link with libexpat
In Android O, MESA needs to statically link libexpat so that it's in same namespace. Change-Id: I82b0be5c817c21e734dfdf5bfb6a9aa1d414ab33 Signed-off-by: Kishore Kadiyala <[email protected]>
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AndroidIA: Build fixes for OMR1.
Jira: None. Test: Build passes. Signed-off-by: Chen Lin Z <[email protected]>
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Internal: Relax permissions when we export prime handle for GEM.
This is needed in case we want to use mmap with dma-buf and write into the buffer in CPU side. This is useful when layers are rendered using software and we will either need to scan or texture from these layers. Check: https://patchwork.freedesktop.org/patch/56380/ Signed-off-by: Kalyan Kondapally <[email protected]>
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CHROMIUM: egl: automatically call eglReleaseThread on thread termination
EGL thread cleanup conformance tests could run out of memory as the contexts were not freed even though the application requested to have them deleted. This was caused by the fact that the contexts were still current on their threads when delete was called and (in order not to block any potential pending renders) they were just marked for delete. Fix this by calling eglReleaseThread on thread termination. This is safe to do even if this was already called by the application since, according to the EGL 1.5 spec, eglReleaseThread can be called multiple times without error. Fixes: dEQP-EGL.functional.thread_cleanup.multi_context_* dEQP-EGL.functional.robustness.create_context.query_robust_access
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AndroidIA: prevent deadlock in droid_query_buffer_age
To avoid blocking other EGL calls, release the display mutex before calling update_buffers(), which will call droid_window_dequeue_buffer(). This patch fixes some failure cases in android graphics cts test. Signed-off-by: Min He <[email protected]> Signed-off-by: Chenglei Ren <[email protected]>
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From List: Check if the window is non-NULL before setting swap interval.
This fixes crash due to NULL window when swap interval is set for pbuffer surface. Jira: 61995 Test: CtsDisplayTestCases pass Signed-off-by: samiuddi <[email protected]>
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Signed-off-by: Kalyan Kondapally <[email protected]>
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The eglWaitSyncKHR should return immediately for better performance. While the intel_batchbuffer_flush in brw_fence_insert_locked may cause 2~4 ms delay, and impact the performance. It's apparent in Android, as the IAHwcomoser calls eglWaitSyncKHR in GL composition thread. The total 4~6ms delay for every composition may hurt the FPS target. Tracked-On: https://jira01.devtools.intel.com/browse/OAM-63673 Signed-off-by: Randy Xu <[email protected]>
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ignore some compile warning on android.
Signed-off-by: Qiming Shi <[email protected]> Signed-off-by: Mingwei Wang <[email protected]> Signed-off-by: jenny.q.cao <[email protected]>
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Disable EXT_pixel_format_float for Android CtsViewTestCases
Jira: None. Test: Android CTS should PASS for below android.view.cts.PixelCopyTest#testWideGamutWindowProducerCopyToRGBA16F Signed-off-by: Kevin Strasser <[email protected]> Signed-off-by: Kishore Kadiyala <[email protected]>
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Revert "Revert "mesa: add GL_HALF_FLOAT as supported type to readpixe…
…ls"" This reverts commit 6b21391. Andriod ask GL_HALF_FLOAT as supported type to readpixels. This patch help fix CTS test android.view.cts.PixelCopyTest. However, it may cause KHR-GLES3.packed_pixels.* regression on Linux. As CTS test is "Must Pass" on Android, let's keep this patch as specific fix for Android. Tracked-On: https://jira01.devtools.intel.com/browse/OAM-63305
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AndroidIA: glcpp: Hack to handle expressions in #line directives.
GLSL ES 320 technically allows #line to have arbitrary expression trees rather than integer literal constants, unlike the C and C++ preprocessor. This is likely a completely unused feature that does not make sense. However, Android irritatingly mandates this useless behavior, so this patch implements a hack to try and support it. We handle a single expression: #line <line number expression> but we avoid handling the double expression: #line <line number expression> <source string expression> because this is an ambiguous grammar. Instead, we handle the case that wraps both in parenthesis, which is actually well defined: #line (<line number expression>) (<source string expression>) With this change following tests pass: dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_vertex dEQP-GLES3.functional.shaders.preprocessor.builtin.line_expression_fragment dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_vertex dEQP-GLES3.functional.shaders.preprocessor.builtin.line_and_file_expression_fragment Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> BUG=b:33352633 BUG=b:33247335 TEST=affected tests passing on CTS 7.1_r1 sentry Change-Id: I7afbbb386bd4a582e3f241014a83eaccad1d50d9 Reviewed-on: https://chromium-review.googlesource.com/427305 Tested-by: Haixia Shi <[email protected]> Reviewed-by: Ilja H. Friedel <[email protected]> Commit-Queue: Haixia Shi <[email protected]> Trybot-Ready: Haixia Shi <[email protected]>
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Revert "Optimize the eglWaitSyncKHR"
This reverts commit 5f482bb. The KHR_wait_sync extension makes no concessions regarding the required behavior of the EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR condition, as defined by KHR_fence_sync. The spec still requires that all preceding commands have been fully realized before waiting on the sync object. If we include the resolve in the same batchbuffer flush as the fence, then we will actually just be blocking the resolve. So we do need to separate the resolve command flush from the fence wait flush. Signed-off-by: Kevin Strasser <[email protected]>
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REVERTME: i965: perf: implement GPA's null renderer
GPA requires a null renderer query which disables all rendering. This feels fairly at odds with the spirit of the INTEL_performance_query extension. Note: Considering the INTEL_blackhole_render implementation(https://www. khronos.org/registry/OpenGL/extensions/INTEL/INTEL_blackhole_render .txt, https://patchwork.freedesktop.org/series/40035/)need test case changes, and also need time to review in upstream, we keep this patch firstly for urgent project milestone. Test: Pass mdapi test_GfxDrv_DriverAcceptance test case GfxDrv_DriverAcceptanceQuery.GL_NULL_HARDWARE and has no reg issue Signed-off-by: Landwerlin, Lionel <[email protected]>
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REVERTME: anv/android: disable couple of KHR extensions for Android CTS
This change makes following test pass: dEQP-VK.api.info.device.extensions Test: dEQP-VK.api.info.device.extensions Signed-off-by: Tapani Pälli <[email protected]> [strassek: carry this patch until the extensions are whitelisted in CTS]
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FROMLIST: anv/android: handle storage images in vkGetSwapchainGralloc…
…UsageANDROID Android P and earlier expect that the surface supports storage images, and so many of the tests fail when the framework checks for that support. The framework also includes various image format and usage combinations that are invalid for the hardware. Drop the STORAGE restriction from the HAL and whitelist a pair of formats so that existing versions of Android can pass these tests. Fixes: dEQP-VK.wsi.android.* Signed-off-by: Kevin Strasser <[email protected]> (am from https://patchwork.freedesktop.org/patch/247681/)
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UPSTREAM: i965: fallback RGBX to RGBA in glEGLImageTargetRenderbuffer…
…StorageOES In the same fashion as is done for glEGLImageTextureTarget2D. v2: share the fallback which sets baseformat and internalformat correctly which makes both of the tests pass (Tapani) Fixes android.hardware.nativehardware.cts.AHardwareBufferNativeTests: #SingleLayer_ColorTest_GpuColorOutputCpuRead_R8G8B8X8_UNORM #SingleLayer_ColorTest_GpuColorOutputIsRenderable_R8G8B8X8_UNORM Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]> (cherry picked from commit 47e3338)
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FROMLIST: intel/genxml: Add register for object preemption.
Signed-off-by: Rafael Antognolli <[email protected]> (am from https://patchwork.freedesktop.org/patch/210951/)
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FROMLIST: anv/gen10: Enable object level preemption.
Set bit when initializing a device. Signed-off-by: Rafael Antognolli <[email protected]> (am from https://patchwork.freedesktop.org/patch/210949/)
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FROMLIST: i965/gen10+: Enable object level preemption.
Set bit when initializing context. Signed-off-by: Rafael Antognolli <[email protected]> (am from https://patchwork.freedesktop.org/patch/210950/)
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FROMLIST: i965/gen9: Add workarounds for object preemption.
Gen9 hardware requires some workarounds to disable preemption depending on the type of primitive being emitted. We implement this by adding a new atom that tracks BRW_NEW_PRIMITIVE. Whenever it happens, we check the current type of primitive and enable/disable object preemption. For now, we just ignore blorp. The only primitive it emits is 3DPRIM_RECTLIST, and since it's not listed in the workarounds, we can safely leave preemption enabled when it happens. Or it will be disabled by a previous 3DPRIMITIVE, which should be fine too. Signed-off-by: Rafael Antognolli <[email protected]> Cc: Kenneth Graunke <[email protected]> (am from https://patchwork.freedesktop.org/patch/210952/)
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UPSTREAM: i965: Respect GL_TEXTURE_SRGB_DECODE_EXT in GenerateMipmaps()
Apparently, we're supposed to look at the texture object's built-in sampler object's sRGB decode setting in order to decide whether to decode/downsample/re-encode, or simply downsample as-is. Previously, I had always done the decoding/encoding. Fixes SKQP's Skia_Unit_Tests.SRGBMipMaps test. Reviewed-by: Tapani Pälli <[email protected]> (cherry picked from commit 337a808)
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UPSTREAM: i965: Lift restriction in external textures for EGLImage su…
…pport Fixes Skqp's unitTest_EGLImageTest test. For Intel platforms, we support external textures only for EGLImages created with EGL_EXT_image_dma_buf_import. This restriction seems to be Intel specific and not present for other platforms. While running SKQP test - unitTest_EGLImageTest, GL_INVALID is sent to the test because of this restriction. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105301 Signed-off-by: Aditya Swarup <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Chad Versace <[email protected]> (cherry picked from commit a5c39ed)
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UPSTREAM: i965: Disable dual source blending when shader doesn't supp…
…ort it on gen8+ Dual source blending behaviour is undefined when shader doesn't have second color output, dismissing fragment in such situation leads to a hang on gen8+ if depth test in enabled. Since blending cannot be gracefully fixed in such case and the result is undefined - blending is simply disabled. v2 (Kenneth Graunke): - Listen to BRW_NEW_FS_PROG_DATA in 3DSTATE_PS_BLEND - Also whack BLEND_STATE[] to keep the two in sync, since we're not sure exactly which copy of the redundant info the hardware will use. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107088 Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit eca4a65)
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Commits on Nov 30, 2018
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