v2.2.7

- Add support for IAR tools and C startup code (irq vector) - Fix standard CLINT vectored mode (jmp instr) - Fix various trap & emulation bugs (E21 CLIC) - Add vector table mtvec.s (CLINT/CLIC) - Minor changes to zones' code to comply with standard CLINT vector - hexfive-conf @29253d, hexfive-kern @3d13f6
hex-five · Aug 19, 2023 · 7a52944 · 7a52944
1 parent e42eee5
commit 7a52944
Show file tree

Hide file tree

Showing 26 changed files with 516 additions and 245 deletions.
diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml
@@ -4,7 +4,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1517506878985792960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1514948786892984960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -14,7 +14,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1512932981994239872" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1510374889901431872" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -24,7 +24,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1517506878985792960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1514948786892984960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -34,7 +34,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1517506878985792960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1514948786892984960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -44,7 +44,7 @@
 		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1517506878985792960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
+			<provider class="org.eclipse.cdt.internal.build.crossgcc.CrossGCCBuiltinSpecsDetector" console="false" env-hash="1514948786892984960" id="org.eclipse.cdt.build.crossgcc.CrossGCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -march=rv32i -mabi=ilp32 -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true" store-entries-with-project="false">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>

diff --git a/bsp/E21/multizone.cfg b/bsp/E21/multizone.cfg
@@ -11,7 +11,7 @@ Zone = 1
     clic = 159 # UART
     base = 0x40408000; size =   32K; rwx = rx # FLASH
     base = 0x80003000; size =    4K; rwx = rw # RAM
-    base = 0x20000000; size = 0x100; rwx = rw # UART
+    base = 0x20000000; size = 0x100; rwx = rw # UART    
     base = 0x02800000; size =0x1000; rwx = r  # CLIC (ro)    
 
 Zone = 2

diff --git a/bsp/E21/newlib/crt0.S b/bsp/E21/newlib/crt0.S
@@ -7,6 +7,12 @@
 _start:
 	.cfi_startproc
 	.cfi_undefined ra
+
+    /* setup trap vector - CLIC vectored mode */
+    la a0, _mtvec
+    csrw mtvec, a0
+    csrs mtvec, 0b11
+
 .option push
 .option norelax
 	la gp, __global_pointer$
@@ -64,3 +70,5 @@ _init: ret
   	.type   _fini, @function
 _fini: ret
   	.size  _fini, .-_fini
+
+    .include "mtvec.s"
diff --git a/bsp/E21/newlib/mtvec.s b/bsp/E21/newlib/mtvec.s
@@ -0,0 +1,62 @@
+/* Copyright(C) 2020 Hex Five Security, Inc. - All Rights Reserved */
+
+        .align 2
+
+_mtvec:
+
+irq0:   .word trp_isr
+irq1:   .word 1f
+irq2:   .word 1f
+irq3:   .word msi_isr
+irq4:   .word 1f
+irq5:   .word 1f
+irq6:   .word 1f
+irq7:   .word tmr_isr
+irq8:   .word 1f
+irq9:   .word 1f
+irq10:  .word 1f
+irq11:  .word 1f
+irq12:  .word 1f
+irq13:  .word 1f
+irq14:  .word 1f
+irq15:  .word 1f
+irq16:  .word 1f
+irq17:  .word 1f
+irq18:  .word 1f
+irq19:  .word dma_isr
+irq20:  .word btn0_isr
+irq21:  .word btn1_isr
+irq22:  .word btn2_isr
+irq23:  .word 1f
+irq24:  .word 1f
+irq25:  .word 1f
+irq26:  .word 1f
+irq27:  .word 1f
+irq28:  .word 1f
+irq29:  .word 1f
+irq30:  .word 1f
+irq31:  .word 1f
+
+.macro FILL from, to
+.word 1f
+.if \to-\from
+FILL "(\from+1)",\to
+.endif
+.endm
+
+FILL 32, 99
+FILL 100, 158
+
+irq159: .word uart_isr
+
+        .weak trp_isr, msi_isr, tmr_isr, dma_isr, uart_isr, btn0_isr, btn1_isr, btn2_isr
+
+trp_isr:
+msi_isr:
+tmr_isr:
+dma_isr:
+uart_isr:
+btn0_isr:
+btn1_isr:
+btn2_isr:
+1:      j .
diff --git a/bsp/E21/newlib/newlib.mk b/bsp/E21/newlib/newlib.mk
@@ -6,6 +6,7 @@ all: $(TARGET)
 ASM_SRCS += $(NEWLIB_DIR)/crt0.S
 C_SRCS += $(NEWLIB_DIR)/newlib.c
 
+INCLUDES += -I$(NEWLIB_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
 LDFLAGS += -T $(PLATFORM_DIR)/memory.lds

diff --git a/bsp/E21/platform.h b/bsp/E21/platform.h
@@ -104,9 +104,9 @@
 #define BTN2  6
 #define BTN3  7
 
-#define BTN0_IRQ 16+4
-#define BTN1_IRQ 16+5
-#define BTN2_IRQ 16+6
+#define BTN0_IRQ 20
+#define BTN1_IRQ 21
+#define BTN2_IRQ 22
 
 // -----------------------------------------------------------------------------
 // LED0 (GPIO)
@@ -140,7 +140,7 @@
 #define _REG64(base, offset) (*(volatile uint64_t *)((base) + (offset)))
 #define _REG32(base, offset) (*(volatile uint32_t *)((base) + (offset)))
 
-#define CLIC_REG(offset) _REG64(CLIC_BASE, offset)
+#define CLIC_REG(offset) _REG32(CLIC_BASE, offset)
 #define GPIO_REG(offset) _REG32(GPIO_BASE, offset)
 #define PWM_REG(offset)  _REG32(PWM_BASE, offset)
 #define UART_REG(offset) _REG32(UART_BASE, offset)

diff --git a/bsp/E31/newlib/crt0.S b/bsp/E31/newlib/crt0.S
@@ -7,6 +7,12 @@
 _start:
 	.cfi_startproc
 	.cfi_undefined ra
+
+	/* setup trap vector */
+    la a0, _mtvec
+    csrw mtvec, a0
+    csrs mtvec, 1
+
 .option push
 .option norelax
 	la gp, __global_pointer$
@@ -36,7 +42,6 @@ _start:
 	bltu a0, a1, 1b
 2:
 
-
 	/* Call global constructors */
 	la a0, __libc_fini_array
 	call atexit
@@ -65,3 +70,5 @@ _init: ret
   	.type   _fini, @function
 _fini: ret
   	.size  _fini, .-_fini
+
+    .include "mtvec.s"
diff --git a/bsp/E31/newlib/mtvec.s b/bsp/E31/newlib/mtvec.s
@@ -0,0 +1,55 @@
+/* Copyright(C) 2020 Hex Five Security, Inc. - All Rights Reserved */
+
+        .align 2
+
+_mtvec:
+
+        .option push
+        .option norvc
+
+irq0:   j trp_isr
+irq1:   j .
+irq2:   j .
+irq3:   j msi_isr
+irq4:   j .
+irq5:   j .
+irq6:   j .
+irq7:   j tmr_isr
+irq8:   j .
+irq9:   j .
+irq10:  j .
+irq11:  j uart_isr
+irq12:  j .
+irq13:  j .
+irq14:  j .
+irq15:  j .
+irq16:  j .
+irq17:  j .
+irq18:  j .
+irq19:  j dma_isr
+irq20:  j btn0_isr
+irq21:  j btn1_isr
+irq22:  j btn2_isr
+irq23:  j .
+irq24:  j .
+irq25:  j .
+irq26:  j .
+irq27:  j .
+irq28:  j .
+irq29:  j .
+irq30:  j .
+irq31:  j .
+
+        .option pop
+
+        .weak trp_isr, msi_isr, tmr_isr, dma_isr, uart_isr, btn0_isr, btn1_isr, btn2_isr
+
+trp_isr:
+msi_isr:
+tmr_isr:
+dma_isr:
+uart_isr:
+btn0_isr:
+btn1_isr:
+btn2_isr:
+        j .
diff --git a/bsp/E31/newlib/newlib.mk b/bsp/E31/newlib/newlib.mk
@@ -6,6 +6,7 @@ all: $(TARGET)
 ASM_SRCS += $(NEWLIB_DIR)/crt0.S
 C_SRCS += $(NEWLIB_DIR)/newlib.c
 
+INCLUDES += -I$(NEWLIB_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
 LDFLAGS += -T $(PLATFORM_DIR)/memory.lds

diff --git a/bsp/FE310/mtvec.s b/bsp/FE310/mtvec.s
@@ -0,0 +1,55 @@
+/* Copyright(C) 2020 Hex Five Security, Inc. - All Rights Reserved */
+
+        .align 2
+
+_mtvec:
+
+        .option push
+        .option norvc
+
+irq0:   j trp_isr
+irq1:   j .
+irq2:   j .
+irq3:   j msi_isr
+irq4:   j .
+irq5:   j .
+irq6:   j .
+irq7:   j tmr_isr
+irq8:   j .
+irq9:   j .
+irq10:  j .
+irq11:  j uart_isr
+irq12:  j .
+irq13:  j .
+irq14:  j .
+irq15:  j .
+irq16:  j .
+irq17:  j .
+irq18:  j .
+irq19:  j dma_isr
+irq20:  j .
+irq21:  j .
+irq22:  j .
+irq23:  j .
+irq24:  j .
+irq25:  j .
+irq26:  j .
+irq27:  j .
+irq28:  j .
+irq29:  j .
+irq30:  j .
+irq31:  j .
+
+        .option pop
+
+        .weak trp_isr, msi_isr, tmr_isr, dma_isr, uart_isr, btn0_isr, btn1_isr, btn2_isr
+
+trp_isr:
+msi_isr:
+tmr_isr:
+dma_isr:
+uart_isr:
+btn0_isr:
+btn1_isr:
+btn2_isr:
+        j .
diff --git a/bsp/FE310/newlib/crt0.S b/bsp/FE310/newlib/crt0.S
@@ -7,6 +7,12 @@
 _start:
 	.cfi_startproc
 	.cfi_undefined ra
+
+    /* setup trap vector */
+    la a0, _mtvec
+    csrw mtvec, a0
+    csrs mtvec, 1
+
 .option push
 .option norelax
 	la gp, __global_pointer$
@@ -36,7 +42,6 @@ _start:
 	bltu a0, a1, 1b
 2:
 
-
 	/* Call global constructors */
 	la a0, __libc_fini_array
 	call atexit
@@ -65,3 +70,5 @@ _init: ret
   	.type   _fini, @function
 _fini: ret
   	.size  _fini, .-_fini
+
+    .include "mtvec.s"
diff --git a/bsp/FE310/newlib/newlib.mk b/bsp/FE310/newlib/newlib.mk
@@ -6,6 +6,7 @@ all: $(TARGET)
 ASM_SRCS += $(NEWLIB_DIR)/crt0.S
 C_SRCS += $(NEWLIB_DIR)/newlib.c
 
+INCLUDES += -I$(NEWLIB_DIR)
 INCLUDES += -I$(PLATFORM_DIR)
 
 LDFLAGS += -T $(PLATFORM_DIR)/memory.lds

diff --git a/bsp/S51/newlib/crt0.S b/bsp/S51/newlib/crt0.S
@@ -7,6 +7,12 @@
 _start:
 	.cfi_startproc
 	.cfi_undefined ra
+
+	/* setup trap vector */
+    la a0, _mtvec
+    csrw mtvec, a0
+    csrs mtvec, 1
+
 .option push
 .option norelax
 	la gp, __global_pointer$
@@ -36,7 +42,6 @@ _start:
 	bltu a0, a1, 1b
 2:
 
-
 	/* Call global constructors */
 	la a0, __libc_fini_array
 	call atexit
@@ -65,3 +70,5 @@ _init: ret
   	.type   _fini, @function
 _fini: ret
   	.size  _fini, .-_fini
+
+    .include "mtvec.s"