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Add support for OpenCL memory model (#744)
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Original file line number | Diff line number | Diff line change |
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C "C++11" | ||
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(* | ||
* Overhauling SC atomics in C11 and OpenCL. | ||
* M. Batty, A. Donaldson, J. Wickerson. In Proc. | ||
* 43rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), 2016. | ||
*) | ||
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(* | ||
* This model is based on: | ||
* https://multicore.doc.ic.ac.uk/overhauling/c11_base.cat | ||
* https://multicore.doc.ic.ac.uk/overhauling/c11_partialSC.cat | ||
*) | ||
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include "c11_cos.cat" | ||
include "c11_los.cat" | ||
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// dynamic_tag relates events to itself that access an address whose init event is marked X | ||
let dynamic_tag(X) = [range([IW & X]; loc)] | ||
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let asw = IW * (M \ IW) | ||
let sb = po | ||
let mo = dynamic_tag(~NAL); co; dynamic_tag(~NAL) | ||
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let Acq = ACQ | (SC & (R | F)) | ACQ_REL | (F & CON) | ||
let Rel = REL | (SC & (W | F)) | ACQ_REL | ||
let Con = R & CON | ||
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// To be compatible with reads from uninit memory, we use our default definition of fr | ||
let fr = rf^-1;mo | ([R] \ [range(rf)]);loc;[W] | ||
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let dd = (data | addr)+ | ||
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let fsb = [F] ; sb | ||
let sbf = sb ; [F] | ||
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(* release_acquire_fenced_synchronizes_with, hypothetical_release_sequence_set, release_sequence_set *) | ||
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(* OLD: let rs = [Rel] ; fsb? ; [A & W] ; (((mo ; [rmw]) | coi) & ~(coe ; [!rmw] ; mo))? *) | ||
let rs_prime = int | (_ * (R & W)) | ||
let rs = mo & rs_prime \ ((mo \ rs_prime) ; mo) | ||
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(* OLD: let swra = ext & (rs ; rf ; [A] ; sbf? ; [Acq]) *) | ||
let swra = ext & ([Rel] ; fsb? ; [A & W] ; rs? ; rf ; [R & A] ; sbf? ; [Acq]) | ||
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//let swul = ext & ([UL] ; lo ; [LK]) | ||
let pp_asw = asw \ (asw ; sb) | ||
//let sw = pp_asw | swul | swra | ||
let sw = pp_asw | swra | ||
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(* with_consume_cad_set, dependency_ordered_before *) | ||
let cad = ((rf & sb) | dd)+ | ||
let dob = (ext & ([W & Rel] ; fsb? ; [A & W] ; rs?; rf; [Con])); cad? | ||
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(* happens_before, inter_thread_happens_before, consistent_hb *) | ||
let ithbr = sw | dob | (sw ; sb) | ||
let ithb = (ithbr | (sb ; ithbr))+ | ||
let hb = sb | ithb | ||
acyclic hb as Hb | ||
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(* coherent_memory_use *) | ||
let hbl = hb & loc | ||
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irreflexive ((rf^-1)? ; mo ; rf? ; hb) as Coh | ||
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(* visible_side_effect_set *) | ||
let vis = ([W] ; hbl ; [R]) & ~(hbl; [W]; hbl) | ||
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(* consistent_atomic_rf *) | ||
irreflexive (rf ; hb) as Rf | ||
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(* consistent_non_atomic_rf *) | ||
empty ((rf ; dynamic_tag(NAL)) \ vis) as NaRf | ||
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(* Consistency of RMWs *) | ||
// The original model was tested with Herd, which treats RMW as a single atomic operation. | ||
// We have modified the model to handle RMW as a sequence of atomic operations. | ||
// irreflexive (rf | (mo ; mo ; rf^-1) | (mo ; rf)) as Rmw | ||
empty rmw & (fre; coe) as atomic | ||
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(* locks_only_consistent_lo *) | ||
// irreflexive (lo ; hb) as Lo1 | ||
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(* locks_only_consistent_locks *) | ||
// irreflexive ([LS] ; lo^-1 ; [LS] ; ~(lo ; [UL] ; lo)) as Lo2 | ||
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(* data_races *) | ||
let cnf = ((W * _) | (_ * W)) & loc | ||
let dr = ext & (cnf \ hb \ (hb^-1) \ (A * A)) | ||
flag ~empty dr as data_race | ||
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(* unsequenced_races *) | ||
let ur = int & ((W * M) | (M * W)) & loc & ~id & ~(sb+) & ~((sb+)^-1) | ||
flag ~empty dr as unsequenced_race | ||
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(* locks_only_good_mutex_use, locks_only_bad_mutexes *) | ||
// let bl = ([LS]; (sb & lo); [LK]) & ~(lo; [UL]; lo) | ||
// let losbwoul = (sb & lo & ~(lo; [UL]; lo)) | ||
// let lu = [UL] & ~([UL] ; losbwoul^-1 ; [LS] ; losbwoul ; [UL]) | ||
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(* Partial SC axioms *) | ||
let r1 = hb | ||
let r2 = fsb? ; mo ; sbf? | ||
let r3 = rf^-1; [SC] ; mo | ||
let r4 = rf^-1 ; hbl ; [W] | ||
let r5 = fsb ; fr | ||
let r6 = fr ; sbf | ||
let r7 = fsb ; fr ; sbf | ||
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let scp = r1|r2|r3|r4|r5|r6|r7 | ||
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acyclic (((SC * SC) & scp) \ id) as Spartial |
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