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Merge pull request #802 from murzinv/sve-basics
[all] Introduce basic support for SVE This PR introduces basic support for SVE instructions in `litmus7`, `diy7` and `herd7`. Scalable Vector Extension (SVE) is Vector Length Agnostic (VLA): - Vector Length (VL) is a hardware implementation choice from 128 up to 2048 bits. - New programming model allows software to scale dynamically to available vector length. - No need to define a new ISA, rewrite or recompile for new vector lengths. Scalable vector registers: - Z0-Z31 extending NEON’s 128-bit V0-V31 - Packed DP, SP & HP floating-point elements - Packed 64, 32, 16 & 8-bit integer elements Scalable predicate registers: - P0-P7 governing predicates for load/store/arithmetic - P8-P15 additional predicates for loop management - FFR first fault register for software speculation I personally find tutorial at [1] really great introduction to the SVE programming model. Implementation choices and known limitations: - SVE memory model is not addressed - `herd7` implements 128 bits vector length (on top of existing Neon infrastructure) [1] https://www.stonybrook.edu/commcms/ookami/support/_docs/ARM_SVE_tutorial.pdf
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