-
Notifications
You must be signed in to change notification settings - Fork 0
/
pipelined.gtkw
158 lines (158 loc) · 3.03 KB
/
pipelined.gtkw
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
[*]
[*] GTKWave Analyzer v3.3.89 (w)1999-2018 BSI
[*] Mon May 7 14:26:13 2018
[*]
[dumpfile] "/Users/stephen/Documents/SNU/Computer-Architecture/tsc-cpu/pipelined.vcd"
[dumpfile_mtime] "Mon May 7 14:17:55 2018"
[dumpfile_size] 465939
[savefile] "/Users/stephen/Documents/SNU/Computer-Architecture/tsc-cpu/pipelined.gtkw"
[timestart] 15180000
[size] 1440 855
[pos] -1 -1
*-18.166470 17527000 1201600 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] cpu_TB.
[treeopen] cpu_TB.UUT.
[treeopen] cpu_TB.UUT.DP.
[sst_width] 195
[signals_width] 279
[sst_expanded] 1
[sst_vpaned_height] 526
@22
cpu_TB.Passed[15:0]
@28
cpu_TB.clk
cpu_TB.reset_n
@22
cpu_TB.d_address[15:0]
cpu_TB.d_data[15:0]
@28
cpu_TB.d_readM
cpu_TB.d_writeM
@22
cpu_TB.i[15:0]
cpu_TB.i_address[15:0]
cpu_TB.i_data[15:0]
@28
cpu_TB.i_readM
cpu_TB.i_writeM
cpu_TB.is_halted
@22
cpu_TB.num_clock[15:0]
cpu_TB.num_inst[15:0]
@28
cpu_TB.UUT.DP.incr_num_inst
@22
cpu_TB.output_port[15:0]
@28
cpu_TB.testbench_finish
@22
cpu_TB.UUT.DP.pc[15:0]
@28
cpu_TB.UUT.DP.pc_write
@200
-ID
@22
cpu_TB.UUT.DP.pc_id[15:0]
cpu_TB.UUT.DP.npc_id[15:0]
cpu_TB.UUT.DP.num_inst_id[15:0]
@c00022
cpu_TB.UUT.DP.ir[15:0]
@28
(0)cpu_TB.UUT.DP.ir[15:0]
(1)cpu_TB.UUT.DP.ir[15:0]
(2)cpu_TB.UUT.DP.ir[15:0]
(3)cpu_TB.UUT.DP.ir[15:0]
(4)cpu_TB.UUT.DP.ir[15:0]
(5)cpu_TB.UUT.DP.ir[15:0]
(6)cpu_TB.UUT.DP.ir[15:0]
(7)cpu_TB.UUT.DP.ir[15:0]
(8)cpu_TB.UUT.DP.ir[15:0]
(9)cpu_TB.UUT.DP.ir[15:0]
(10)cpu_TB.UUT.DP.ir[15:0]
(11)cpu_TB.UUT.DP.ir[15:0]
(12)cpu_TB.UUT.DP.ir[15:0]
(13)cpu_TB.UUT.DP.ir[15:0]
(14)cpu_TB.UUT.DP.ir[15:0]
(15)cpu_TB.UUT.DP.ir[15:0]
@1401200
-group_end
@22
cpu_TB.UUT.DP.opcode[3:0]
cpu_TB.UUT.DP.func_code[5:0]
@28
cpu_TB.UUT.DP.rs[1:0]
cpu_TB.UUT.DP.rt[1:0]
cpu_TB.UUT.DP.rd[1:0]
cpu_TB.UUT.DP.reg_dst[1:0]
cpu_TB.UUT.DP.inst_type[2:0]
@22
cpu_TB.UUT.DP.data1[15:0]
cpu_TB.UUT.DP.data2[15:0]
@28
cpu_TB.UUT.DP.jump_miss
@22
cpu_TB.UUT.DP.jump_target[15:0]
@28
cpu_TB.UUT.DP.branch
@200
-ID hazard
@28
cpu_TB.UUT.DP.HU.use_rs
@22
cpu_TB.UUT.DP.resolved_pc[15:0]
@28
cpu_TB.UUT.DP.HU.bubblify
cpu_TB.UUT.DP.HU.flush_if
@200
-Branch predictor
@22
cpu_TB.UUT.DP.BPRED.btb_idx[7:0]
cpu_TB.UUT.DP.BPRED.pc_tag[7:0]
@28
cpu_TB.UUT.DP.BPRED.tag_match
cpu_TB.UUT.DP.BPRED.update_tag
@22
cpu_TB.UUT.DP.BPRED.branch_target[15:0]
cpu_TB.UUT.DP.BPRED.npc[15:0]
@200
-EX
@22
cpu_TB.UUT.DP.npc_ex[15:0]
cpu_TB.UUT.DP.resolved_pc[15:0]
@28
cpu_TB.UUT.DP.branch_taken
cpu_TB.UUT.DP.branch_miss
@22
cpu_TB.UUT.DP.resolved_pc[15:0]
cpu_TB.UUT.DP.alu_operand_1[15:0]
cpu_TB.UUT.DP.alu_operand_2[15:0]
cpu_TB.UUT.DP.alu_result[15:0]
cpu_TB.UUT.DP.b_ex[15:0]
@28
cpu_TB.UUT.DP.write_reg_ex[1:0]
cpu_TB.UUT.DP.rs_forward_src[1:0]
cpu_TB.UUT.DP.rt_forward_src[1:0]
@200
-MEM
@22
cpu_TB.UUT.DP.alu_out_mem[15:0]
@28
cpu_TB.UUT.DP.d_mem_write_mem
@22
cpu_TB.UUT.DP.b_mem[15:0]
@28
cpu_TB.UUT.DP.reg_write_mem
cpu_TB.UUT.DP.write_reg_mem[1:0]
@200
-WB
@28
cpu_TB.UUT.DP.reg_write_wb
cpu_TB.UUT.DP.write_reg_wb[1:0]
@22
cpu_TB.UUT.DP.writeData[15:0]
@c00200
-cpu_TB.UUT.DP.write_reg_wb
@1401200
-group_end
[pattern_trace] 1
[pattern_trace] 0