Update to release/1.13.5

Signed-off-by: ChipSec <[email protected]>

_sources/contribution/code-style-python.rst.txt

@@ -78,7 +78,7 @@ If in doubt, follow the existing code style and formatting.
         # Good
         import sys
         from chipsec.module_common import BaseModule
-from chipsec.library.returncode import ModuleResult
+        from chipsec.library.returncode import ModuleResult
 
         # Bad - using '*' and importing sys after local imports
         import *

_sources/contribution/sphinx.rst.txt

@@ -3,7 +3,7 @@
 Sphinx Version
 ==============
 
-The versions of Sphinx that can be utilized to generate CHIPSEC's documentation are 4.X.X, 5.X.X and 6.X.X.
+The versions of Sphinx that can be utilized to generate CHIPSEC's documentation are 6.X.X, 7.X.X and 8.X.X.
 
 
 Generating Documentation

_sources/development/Platform-Detection.rst.txt

@@ -3,21 +3,21 @@
 Methods for Platform Detection
 ==============================
 
-Uses PCI VID and DID to detect processor and PCH
-------------------------------------------------
+Uses PCI VendorID and DeviceID to detect processor and PCH
+----------------------------------------------------------
 
 Processor: 0:0.0
 
 PCH: Scans enumerated PCI Devices for corresponding VID/DID per configurations. 
 
-Chip information located in ``chipsec/chipset.py``.
+Chip information located in ``chipsec/chipset.py``
 --------------------------------------------------
 
 Currently requires VID of 0x8086 (Intel) or 0x1022 (AMD).
 
-DID is used as the lookup key.
+DeviceID is used as the lookup key.
 
-If there are matching DID, will fall back to cpuid check for CPU.
+If there are matching DeviceID, will fall back to cpuid check for CPU.
 
 Platform Configuration Options
 ------------------------------
@@ -27,4 +27,4 @@ Select a specific platform using the ``–p`` flag.
 Specify PCH using the ``–-pch`` flag.
 
 ~Ignore the platform specific registers using the ``-i`` flag.~
-The ``-i`` flag has been depricated and should not be used. 
+The ``-i`` flag has been deprecated and should not be used. 

_sources/development/Sample-Module-Code.rst.txt

@@ -11,19 +11,19 @@ Sample module code template
         def __init__(self):
             BaseModule.__init__(self)
 
-        def is_supported(self):
+        def is_supported(self) -> bool:
             """Module prerequisite checks"""
             if some_module_requirement():
                 return True  # Module is applicable
             self.res = ModuleResult.NOTAPPLICABLE
             return False  # Module is not applicable
 
-        def action(self):
+        def action(self) -> int:
             """Module test logic and methods as needed"""
             self.logger.log_passed('Module was successful!')
             return ModuleResult.PASSED
 
-        def run(self, module_argv):
+        def run(self, module_argv) -> int:
             """Primary module execution and result handling"""
             self.logger.start_test('Module Description')
             self.res = self.action()

_sources/development/Sample-Util-Command.rst.txt

@@ -1,5 +1,5 @@
- Util Command
-===================
+Util Command
+============
 
 .. code-block:: python
 

_sources/index.rst.txt

@@ -1,9 +1,9 @@
-.. CHIPSEC 1.13.4 documentation file, created by
+.. CHIPSEC 1.13.5 documentation file, created by
    sphinx-quickstart on Wed Mar 25 13:24:44 2015.
    You can adapt this file completely to your liking, but it should at least
    contain the root `toctree` directive.
 
-CHIPSEC 1.13.4
+CHIPSEC 1.13.5
 ==============
 
 CHIPSEC is a framework for analyzing platform level security of
@@ -16,8 +16,7 @@ firmware and platform components, security assessment and fuzzing tools
 for various platform devices and interfaces, and tools acquiring
 critical firmware and device artifacts.
 
-CHIPSEC can run on *Windows*, *Linux*, *Mac OS* and *UEFI shell*. Mac OS
-support is Beta.
+CHIPSEC can run on *Windows*, *Linux*, and *UEFI shell*.
 
 .. warning::
 
@@ -53,7 +52,7 @@ support is Beta.
 Installation
 ------------
 
-CHIPSEC supports Windows, Linux, Mac OS X, DAL and UEFI shell.
+CHIPSEC supports Windows, Linux, DAL, and UEFI shell.
 Circumstances surrounding the target platform may change which of these
 environments is most appropriate.
 

_sources/installation/InstallWindows.rst.txt

@@ -163,97 +163,94 @@ generates a Stop error. For more detail please refer below link: https://learn.m
 **Filter Driver and Main Helper Driver Architecture**
 
 .. figure:: ../_images/driver_architecture.png
-   :alt: CHIPSEC Main & Filter Drvier Architecture
+   :alt: CHIPSEC Main & Filter Driver Architecture
    :width: 1100
    :height: 1000
 
-   CHIPSEC Main & Filter Drvier Architecture
+   CHIPSEC Main & Filter Driver Architecture
 
 Install PCI Filter Driver
 -------------------------
-**Locate the Filter Driver Files: chipsec/helper/windows/windows_amd64/**
+**1. Locate the Filter Driver Files: chipsec/helper/windows/windows_amd64/**
 
 .. figure:: ../_images/driver_files.png
-   :alt: Check The Filter Drvier Files
+   :alt: Check The Filter Driver Files
    :width: 920
    :height: 340
 
 
-**Update The PCI Device Driver From Device Manager**
+**2. Update The PCI Device Driver From Device Manager**
 
 .. figure:: ../_images/update_driver.png
    :alt: Update The PCI Device Driver
    :width: 920
    :height: 630
 
 
-**Browse The PCI Filter Driver**
+**3. Browse The PCI Filter Driver**
 
  .. figure:: ../_images/browse_driver.png
    :alt: Browse The PCI Filter Driver
    :width: 920
    :height: 630
 
 
-**Manually Select The PCI Bus Filter Driver**
-
+**4. Manually Select The PCI Bus Filter Driver**
 
  .. figure:: ../_images/pickup_driver.png
    :alt: Pickup The PCI Filter Driver
    :width: 920
    :height: 630
 
 
-**Install The Filter Driver From Disk**
-
+**5. Install The Filter Driver From Disk**
 
  .. figure:: ../_images/install_driver_from_disk.png
    :alt: Install The Filter Driver From Disk
    :width: 920
    :height: 650
 
 
-**Installing The Filter Driver**
+**6. Installing The Filter Driver**
 
  .. figure:: ../_images/installing_driver.png
    :alt: Installing The Filter Driver
    :width: 920
    :height: 650
 
 
-**Finish The Filter Driver Installing**
+**7. Finish The Filter Driver Installing**
 
  .. figure:: ../_images/installing_finished.png
    :alt: Finish The Filter Driver Installing
    :width: 920
    :height: 650
 
-**Restart Computer**
+
+**8. Restart Computer**
 
  .. figure:: ../_images/restart.png
    :alt: Restart Computer
    :width: 920
    :height: 420
 
-**Check The Installed Device Driver From Device Manager**
+
+**9. Check The Installed Device Driver From Device Manager**
 
  .. figure:: ../_images/check_installed_driver.png
    :alt: Check The Installed Device Driver
    :width: 920
    :height: 650
 
 
-
-**Check The Driver Device Info**
+**10. Check The Driver Device Info**
 
  .. figure:: ../_images/driver_dev_info.png
    :alt: Check The Driver Device Info
    :width: 700
    :height: 700
 
 
-
-
 Filter Driver Access PCI Config Space Test
 ------------------------------------------
 **Dump PCI Config Test**

_sources/modules/chipsec.cfg.8086.rst.txt

@@ -1,56 +1,56 @@
 .. toctree::
 
+	chipsec.cfg.8086.bdw.xml.rst
+	chipsec.cfg.8086.hsx.xml.rst
+	chipsec.cfg.8086.hsw.xml.rst
 	chipsec.cfg.8086.skx.xml.rst
-	chipsec.cfg.8086.txt.xml.rst
-	chipsec.cfg.8086.kbl.xml.rst
 	chipsec.cfg.8086.ehl.xml.rst
-	chipsec.cfg.8086.sfdp.xml.rst
-	chipsec.cfg.8086.glk.xml.rst
-	chipsec.cfg.8086.pch_4xxh.xml.rst
-	chipsec.cfg.8086.mtl.xml.rst
-	chipsec.cfg.8086.bdw.xml.rst
 	chipsec.cfg.8086.pch_4xx.xml.rst
-	chipsec.cfg.8086.pch_c60x.xml.rst
-	chipsec.cfg.8086.qrk.xml.rst
+	chipsec.cfg.8086.pch_c620.xml.rst
 	chipsec.cfg.8086.pch_5xxh.xml.rst
-	chipsec.cfg.8086.pch_495.xml.rst
+	chipsec.cfg.8086.dnv.xml.rst
+	chipsec.cfg.8086.pch_c60x.xml.rst
+	chipsec.cfg.8086.pch_4xxlp.xml.rst
 	chipsec.cfg.8086.bdx.xml.rst
-	chipsec.cfg.8086.icx.xml.rst
-	chipsec.cfg.8086.rkl.xml.rst
-	chipsec.cfg.8086.apl.xml.rst
-	chipsec.cfg.8086.snb.xml.rst
-	chipsec.cfg.8086.pch_8x.xml.rst
-	chipsec.cfg.8086.pch_6xxS.xml.rst
-	chipsec.cfg.8086.pch_1xx.xml.rst
-	chipsec.cfg.8086.ivt.xml.rst
-	chipsec.cfg.8086.pch_6xxP.xml.rst
-	chipsec.cfg.8086.adl.xml.rst
-	chipsec.cfg.8086.cht.xml.rst
-	chipsec.cfg.8086.pch_2xx.xml.rst
+	chipsec.cfg.8086.glk.xml.rst
+	chipsec.cfg.8086.pch_495.xml.rst
+	chipsec.cfg.8086.pch_3xx.xml.rst
 	chipsec.cfg.8086.avn.xml.rst
-	chipsec.cfg.8086.ivb.xml.rst
-	chipsec.cfg.8086.cml.xml.rst
-	chipsec.cfg.8086.rpl.xml.rst
-	chipsec.cfg.8086.pch_4xxlp.xml.rst
-	chipsec.cfg.8086.byt.xml.rst
-	chipsec.cfg.8086.tpm12.xml.rst
-	chipsec.cfg.8086.pch_7x.xml.rst
+	chipsec.cfg.8086.common.xml.rst
 	chipsec.cfg.8086.pmc_i440fx.xml.rst
-	chipsec.cfg.8086.whl.xml.rst
-	chipsec.cfg.8086.hsx.xml.rst
-	chipsec.cfg.8086.pch_c61x.xml.rst
 	chipsec.cfg.8086.cfl.xml.rst
 	chipsec.cfg.8086.pch_5xxlp.xml.rst
-	chipsec.cfg.8086.pch_3xxop.xml.rst
-	chipsec.cfg.8086.dnv.xml.rst
-	chipsec.cfg.8086.jkt.xml.rst
-	chipsec.cfg.8086.iommu.xml.rst
+	chipsec.cfg.8086.ivb.xml.rst
 	chipsec.cfg.8086.tglu.xml.rst
-	chipsec.cfg.8086.tglh.xml.rst
-	chipsec.cfg.8086.pch_3xx.xml.rst
-	chipsec.cfg.8086.icl.xml.rst
+	chipsec.cfg.8086.pch_c61x.xml.rst
+	chipsec.cfg.8086.qrk.xml.rst
 	chipsec.cfg.8086.skl.xml.rst
-	chipsec.cfg.8086.pch_c620.xml.rst
-	chipsec.cfg.8086.hsw.xml.rst
-	chipsec.cfg.8086.common.xml.rst
+	chipsec.cfg.8086.pch_7x.xml.rst
+	chipsec.cfg.8086.cml.xml.rst
+	chipsec.cfg.8086.tpm12.xml.rst
+	chipsec.cfg.8086.txt.xml.rst
+	chipsec.cfg.8086.jkt.xml.rst
+	chipsec.cfg.8086.icl.xml.rst
+	chipsec.cfg.8086.ivt.xml.rst
+	chipsec.cfg.8086.pch_4xxh.xml.rst
+	chipsec.cfg.8086.pch_6xxP.xml.rst
+	chipsec.cfg.8086.whl.xml.rst
+	chipsec.cfg.8086.pch_6xxS.xml.rst
+	chipsec.cfg.8086.tglh.xml.rst
+	chipsec.cfg.8086.iommu.xml.rst
+	chipsec.cfg.8086.kbl.xml.rst
+	chipsec.cfg.8086.mtl.xml.rst
+	chipsec.cfg.8086.rkl.xml.rst
+	chipsec.cfg.8086.pch_2xx.xml.rst
+	chipsec.cfg.8086.pch_1xx.xml.rst
 	chipsec.cfg.8086.pch_3xxlp.xml.rst
+	chipsec.cfg.8086.pch_3xxop.xml.rst
+	chipsec.cfg.8086.cht.xml.rst
+	chipsec.cfg.8086.rpl.xml.rst
+	chipsec.cfg.8086.pch_8x.xml.rst
+	chipsec.cfg.8086.byt.xml.rst
+	chipsec.cfg.8086.snb.xml.rst
+	chipsec.cfg.8086.icx.xml.rst
+	chipsec.cfg.8086.sfdp.xml.rst
+	chipsec.cfg.8086.adl.xml.rst
+	chipsec.cfg.8086.apl.xml.rst