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phy: ti: j721e-wiz: Fix unreachable code in wiz_mode_select()
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[ Upstream commit 57c0e13 ]

In the wiz_mode_select() function, the configuration performed for
PHY_TYPE_USXGMII is unreachable. Fix it.

Fixes: b64a85f ("phy: ti: phy-j721e-wiz.c: Add usxgmii support in wiz driver")
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
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Siddharth-Vadapalli-at-TI authored and gregkh committed May 11, 2023
1 parent f978fb6 commit 5f95dc1
Showing 1 changed file with 5 additions and 6 deletions.
11 changes: 5 additions & 6 deletions drivers/phy/ti/phy-j721e-wiz.c
Original file line number Diff line number Diff line change
Expand Up @@ -430,18 +430,17 @@ static int wiz_mode_select(struct wiz *wiz)
int i;

for (i = 0; i < num_lanes; i++) {
if (wiz->lane_phy_type[i] == PHY_TYPE_DP)
if (wiz->lane_phy_type[i] == PHY_TYPE_DP) {
mode = LANE_MODE_GEN1;
else if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII)
} else if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
mode = LANE_MODE_GEN2;
else
continue;

if (wiz->lane_phy_type[i] == PHY_TYPE_USXGMII) {
} else if (wiz->lane_phy_type[i] == PHY_TYPE_USXGMII) {
ret = regmap_field_write(wiz->p0_mac_src_sel[i], 0x3);
ret = regmap_field_write(wiz->p0_rxfclk_sel[i], 0x3);
ret = regmap_field_write(wiz->p0_refclk_sel[i], 0x3);
mode = LANE_MODE_GEN1;
} else {
continue;
}

ret = regmap_field_write(wiz->p_standard_mode[i], mode);
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