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Fix BL definition. BL does not read SP.
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Rot127 committed Jan 13, 2024
1 parent a63397d commit 83b1b5a
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions llvm/lib/Target/AArch64/AArch64InstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -2551,7 +2551,7 @@ def ERET : SpecialReturn<0b0100, "eret">;
// Default to the LR register.
def : InstAlias<"ret", (RET LR)>;

let isCall = 1, Defs = [LR], Uses = [SP] in {
let isCall = 1, Defs = [LR], isBranch = 1, isIndirectBranch = 1 in {
def BLR : BranchReg<0b0001, "blr", []>;
def BLRNoIP : Pseudo<(outs), (ins GPR64noip:$Rn), []>,
Sched<[WriteBrReg]>,
Expand Down Expand Up @@ -2648,7 +2648,7 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
def B : BranchImm<0, "b", [(br bb:$addr)]>;
} // isBranch, isTerminator, isBarrier

let isCall = 1, Defs = [LR], Uses = [SP] in {
let isCall = 1, Defs = [LR], isBranch = 1 in {
def BL : CallImm<1, "bl", [(AArch64call tglobaladdr:$addr)]>;
} // isCall
def : Pat<(AArch64call texternalsym:$func), (BL texternalsym:$func)>;
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