Merge branch 'next' into fix-typos

.github/workflows/clang-tidy.yml

@@ -0,0 +1,34 @@
+name: Run clang-tidy
+on:
+  push:
+    paths:
+    - '**.c'
+    - '**.h'
+  pull_request:
+
+jobs:
+  analyze:
+    runs-on: ubuntu-latest
+
+    name: clang-tidy
+    steps:
+    - uses: actions/checkout@v3
+      with:
+        fetch-depth: 0
+    - name: Install clang-tidy
+      run: |
+        sudo apt install clang-tidy
+
+    - name: Build
+      run: |
+        mkdir build && cd build
+        CC=clang cmake -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DBUILD_SHARED_LIBS=1 ..
+        CC=clang sudo cmake --build . --config Release
+        cd ..
+
+    - name: Check for warnings
+      env:
+        base_sha: ${{ github.event.pull_request.base.sha }}
+        head_sha: ${{ github.event.pull_request.head.sha }}
+      run: |
+        ./run-clang-tidy.sh build

.gitignore

@@ -131,7 +131,7 @@ fuzz_bindisasm
 fuzz_disasm
 fuzz_decode_platform
 capstone_get_setup
-suite/fuzz/
+suite/fuzz/corpus
 suite/cstest/cmocka/
 
 *.s

CMakeLists.txt

@@ -25,22 +25,32 @@ project(capstone
     VERSION 5.0
 )
 
-set(UNIX_COMPILER_OPTIONS -Werror -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation)
+set(UNIX_COMPILER_OPTIONS -Werror -Wall -Warray-bounds -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation)
 
 # maybe-unitialzied is only supported by newer versions of GCC.
 # Unfortunately, it is pretty unreliable and reports wrong results.
 # So we disable it for all compilers versions which support it.
 include(CheckCCompilerFlag)
 check_c_compiler_flag("-Wno-maybe-unitialized" SUPPORTS_MU)
+check_c_compiler_flag("-Wshadow=local" SUPPORTS_SHADOWING)
+check_c_compiler_flag("-Wsometimes-uninitialized" SUPPORTS_SUNINIT)
 
 if (SUPPORTS_MU)
     set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wno-maybe-unitialized)
 endif()
 
+if (SUPPORTS_SHADOWING)
+    set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wshadow=local)
+endif()
+
+if (SUPPORTS_SUNINIT)
+    set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wsometimes-uninitialized)
+endif()
+
 if (MSVC)
     add_compile_options(/W1 /w14189)
 else()
-    add_compile_options(${UNIX_COMPILE_OPTIONS})
+    add_compile_options(${UNIX_COMPILER_OPTIONS})
 endif()
 
 

COMPILE.TXT

@@ -17,7 +17,7 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
 
 (0) Tailor Capstone to your need.
 
-  Out of all archtitectures supported by Capstone, if you just need several
+  Out of all architectures supported by Capstone, if you just need several
   selected archs, choose the ones you want to compile in by editing "config.mk"
   before going to next steps.
 

COMPILE_MSVC.TXT

@@ -19,7 +19,7 @@ or newer versions are required.
 
 (0) Tailor Capstone to your need.
 
-  Out of 9 archtitectures supported by Capstone (Arm, Arm64, M68K, Mips, PPC,
+  Out of 9 architectures supported by Capstone (Arm, Arm64, M68K, Mips, PPC,
   Sparc, SystemZ, X86 & XCore), if you just need several selected archs, choose
   the ones you want to compile in by opening Visual Studio solution "msvc\capstone.sln",
   then directly editing the projects "capstone_static" & "capstone_dll" for static

ChangeLog

@@ -424,7 +424,7 @@ Version 3.0.5: July 18th, 2018
 [ Core ]
 
 - Fix the include path for Android builds when building cstool.
-- Add posibility to disable universal build for Mac OS.
+- Add possibility to disable universal build for Mac OS.
 - cstool: Separate instruction bytes by spaces.
 - Fix code path of pkg-config in Cmake.
 - Update XCode project for XCode 9.1.
@@ -444,7 +444,7 @@ Version 3.0.5: July 18th, 2018
 
 [ ARM ]
 
-- Fix an integer overlow bug.
+- Fix an integer overflow bug.
 
 
 [ ARM64 ]
@@ -464,12 +464,12 @@ Version 3.0.5: July 18th, 2018
 
 [ Sparc ]
 
-- Fix an integer overlow bug.
+- Fix an integer overflow bug.
 
 
 [ SystemZ ]
 
-- Fix an integer overlow bug.
+- Fix an integer overflow bug.
 
 
 [ Python binding ]
@@ -961,7 +961,7 @@ Version 2.1: March 5th, 2014
 ----------------------------------
 Version 2.0: January 22nd, 2014
 
-Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
+Release 2.0 deprecates version 1.0 and brings a lot of crucial changes.
 
 [ API changes ]
 
@@ -973,7 +973,7 @@ Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
   cs_option().
 - New option CS_OPT_MEM allows to specify user-defined functions for dynamically
   memory management used internally by Capstone. This is useful to embed Capstone
-  into special environments such as kernel or firware.
+  into special environments such as kernel or firmware.
 - New API cs_support() can be used to check if this lib supports a particular
   architecture (this is necessary since we now allow to choose which architectures
   to compile in).
@@ -1009,7 +1009,7 @@ Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
 - Cython support has been added, which can further speed up over the default
   pure Python binding (up to 30% in some cases)
 - Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list)
-  to return succesfully disassembled instructions. This improves the performance
+  to return successfully disassembled instructions. This improves the performance
   and reduces memory usage.
 
 

MCInst.c

@@ -18,7 +18,7 @@
 
 void MCInst_Init(MCInst *inst)
 {
-	// unnecessary to initialize in loop . its expensive and inst->size shuold be honored
+	// unnecessary to initialize in loop . its expensive and inst->size should be honored
 	inst->Operands[0].Kind = kInvalid;
 	inst->Operands[0].ImmVal = 0;
 
@@ -89,7 +89,7 @@ unsigned MCInst_getNumOperands(const MCInst *inst)
 	return inst->size;
 }
 
-// This addOperand2 function doesnt free Op
+// This addOperand2 function doesn't free Op
 void MCInst_addOperand2(MCInst *inst, MCOperand *Op)
 {
 	assert(inst->size < MAX_MC_OPS);

MCInst.h

@@ -153,7 +153,7 @@ MCOperand *MCInst_getOperand(MCInst *inst, unsigned i);
 
 unsigned MCInst_getNumOperands(const MCInst *inst);
 
-// This addOperand2 function doesnt free Op
+// This addOperand2 function doesn't free Op
 void MCInst_addOperand2(MCInst *inst, MCOperand *Op);
 
 bool MCInst_isPredicable(const MCInstrDesc *MIDesc);

arch/AArch64/AArch64BaseInfo.h

@@ -815,7 +815,7 @@ typedef enum TOF {
 	/// an LDG instruction to obtain the tag value.
 	AArch64II_MO_TAGGED = 0x400,
 
-	/// MO_DLLIMPORTAUX - Symbol refers to "auxilliary" import stub. On
+	/// MO_DLLIMPORTAUX - Symbol refers to "auxiliary" import stub. On
 	/// Arm64EC, there are two kinds of import stubs used for DLL import of
 	/// functions: MO_DLLIMPORT refers to natively callable Arm64 code, and
 	/// MO_DLLIMPORTAUX refers to the original address which can be compared
@@ -852,6 +852,7 @@ inline static const char *AArch64PACKeyIDToString(AArch64PACKey_ID KeyID)
 	case AArch64PACKey_DB:
 		return "db";
 	}
+	return NULL;
 }
 
 /// Return numeric key ID for 2-letter identifier string.
@@ -867,6 +868,7 @@ AArch64StringToPACKeyID(const char *Name)
 	if (strcmp(Name, "db") == 0)
 		return AArch64PACKey_DB;
 	assert(0 && "Invalid PAC key");
+	return AArch64PACKey_LAST;
 }
 
 // end namespace AArch64

arch/AArch64/AArch64Disassembler.c

@@ -360,25 +360,25 @@ static DecodeStatus getInstruction(csh handle, const uint8_t *Bytes, size_t Byte
 		// For Scalable Matrix Extension (SME) instructions that have an
 		// implicit operand for the accumulator (ZA) or implicit immediate zero
 		// which isn't encoded, manually insert operand.
-		for (unsigned i = 0; i < Desc.NumOperands; i++) {
-			if (Desc.OpInfo[i].OperandType == MCOI_OPERAND_REGISTER) {
-				switch (Desc.OpInfo[i].RegClass) {
+		for (unsigned j = 0; j < Desc.NumOperands; j++) {
+			if (Desc.OpInfo[j].OperandType == MCOI_OPERAND_REGISTER) {
+				switch (Desc.OpInfo[j].RegClass) {
 				default:
 					break;
 				case AArch64_MPRRegClassID:
-					MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, AArch64_ZA));
+					MCInst_insert0(MI, j, MCOperand_CreateReg1(MI, AArch64_ZA));
 					break;
 				case AArch64_MPR8RegClassID:
-					MCInst_insert0(MI, i,
+					MCInst_insert0(MI, j,
 							  MCOperand_CreateReg1(MI, AArch64_ZAB0));
 					break;
 				case AArch64_ZTRRegClassID:
-					MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, AArch64_ZT0));
+					MCInst_insert0(MI, j, MCOperand_CreateReg1(MI, AArch64_ZT0));
 					break;
 				}
-			} else if (Desc.OpInfo[i].OperandType ==
+			} else if (Desc.OpInfo[j].OperandType ==
 					   AArch64_OP_IMPLICIT_IMM_0) {
-				MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, 0));
+				MCInst_insert0(MI, j, MCOperand_CreateImm1(MI, 0));
 			}
 		}
 

arch/AArch64/AArch64GenAsmWriter.inc

@@ -33535,7 +33535,7 @@ static bool AArch64InstPrinterValidateMCOperand(const MCOperand *MCOp,
   switch (PredicateIndex) {
   default:
     assert(0 && "Unknown MCOperandPredicate kind");
-    break;
+    return false;
   case 1: {
 
     if (!MCOperand_isImm(MCOp))

arch/AArch64/AArch64InstPrinter.c

@@ -318,7 +318,7 @@ void printInst(MCInst *MI, uint64_t Address, const char *Annot, SStream *O)
 			(ImmR == 0 || ImmS < ImmR) &&
 			(AArch64_getFeatureBits(MI->csh->mode, AArch64_FeatureAll) ||
 			 AArch64_getFeatureBits(MI->csh->mode, AArch64_HasV8_2aOps))) {
-			// BFC takes precedence over its entire range, sligtly differently
+			// BFC takes precedence over its entire range, slightly differently
 			// to BFI.
 			int BitWidth = Opcode == AArch64_BFMXri ? 64 : 32;
 			int LSB = (BitWidth - ImmR) % BitWidth;
@@ -1358,7 +1358,7 @@ void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
 		unsigned Reg = MCOperand_getReg(Op);
 		printRegName(O, Reg);
 	} else if (MCOperand_isImm(Op)) {
-		MCOperand *Op = MCInst_getOperand(MI, (OpNo));
+		Op = MCInst_getOperand(MI, (OpNo));
 		SStream_concat(O, "%s", markup("<imm:"));
 		printInt64Bang(O, MCOperand_getImm(Op));
 		SStream_concat0(O, markup(">"));

arch/AArch64/AArch64Linkage.h

@@ -4,7 +4,7 @@
 #ifndef CS_AARCH64_LINKAGE_H
 #define CS_AARCH64_LINKAGE_H
 
-// Function defintions to call static LLVM functions.
+// Function definitions to call static LLVM functions.
 
 #include "../../MCDisassembler.h"
 #include "../../MCInst.h"

arch/AArch64/AArch64Mapping.c

@@ -247,7 +247,7 @@ void AArch64_init_cs_detail(MCInst *MI)
 /// So the only generic way to determine, if the memory access is in
 /// post-indexed addressing mode, is by search for "<membase>], #<memdisp>" in
 /// @p OS.
-/// Searching the asm string to determine such a property is enourmously ugly
+/// Searching the asm string to determine such a property is enormously ugly
 /// and wastes resources.
 /// Sorry, I know and do feel bad about it. But for now it works.
 static bool AArch64_check_post_index_am(const MCInst *MI, const SStream *OS) {
@@ -279,7 +279,7 @@ static void AArch64_check_updates_flags(MCInst *MI)
 	if (!detail_is_set(MI))
 		return;
 	cs_detail *detail = get_detail(MI);
-	// Implicity written registers
+	// Implicitly written registers
 	for (int i = 0; i < detail->regs_write_count; ++i) {
 		if (detail->regs_write[i] == 0)
 			break;
@@ -1483,7 +1483,7 @@ static void add_cs_detail_template_1(MCInst *MI, aarch64_op_group op_group,
 	case AArch64_OP_GROUP_ZPRasFPR_32:
 	case AArch64_OP_GROUP_ZPRasFPR_64:
 	case AArch64_OP_GROUP_ZPRasFPR_8: {
-		unsigned Base;
+		unsigned Base = AArch64_NoRegister;
 		unsigned Width = temp_arg_0;
 		switch (Width) {
 		case 8:

arch/AArch64/AArch64Mapping.h

@@ -14,7 +14,7 @@ typedef enum {
 #include "AArch64GenCSOpGroup.inc"
 } aarch64_op_group;
 
-// return name of regiser in friendly string
+// return name of register in friendly string
 const char *AArch64_reg_name(csh handle, unsigned int reg);
 
 // given internal insn id, return public instruction info

arch/ARM/ARMAddressingModes.h

@@ -7,7 +7,7 @@
 /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */
 
 /* Only small edits allowed. */
-/* For multiple similiar edits, please create a Patch for the translator. */
+/* For multiple similar edits, please create a Patch for the translator. */
 
 /* Capstone's C++ file translator: */
 /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */

arch/ARM/ARMBaseInfo.c

@@ -7,7 +7,7 @@
 /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */
 
 /* Only small edits allowed. */
-/* For multiple similiar edits, please create a Patch for the translator. */
+/* For multiple similar edits, please create a Patch for the translator. */
 
 /* Capstone's C++ file translator: */
 /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */

arch/ARM/ARMDisassembler.c

@@ -7,7 +7,7 @@
 /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */
 
 /* Only small edits allowed. */
-/* For multiple similiar edits, please create a Patch for the translator. */
+/* For multiple similar edits, please create a Patch for the translator. */
 
 /* Capstone's C++ file translator: */
 /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */
@@ -2082,7 +2082,7 @@ static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned Insn,
 		unsigned amt = fieldFromInstruction_4(Insn, 7, 5);
 		if (Opc == ARM_AM_ror && amt == 0)
 			Opc = ARM_AM_rrx;
-		unsigned imm = ARM_AM_getAM2Opc(Op, amt, Opc, idx_mode);
+		imm = ARM_AM_getAM2Opc(Op, amt, Opc, idx_mode);
 
 		MCOperand_CreateImm0(Inst, (imm));
 	} else {
@@ -6411,7 +6411,7 @@ static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst *Inst, unsigned Val,
 	// Inst. Reason is because MRRC2 stores to two
 	// registers so it's tablegen desc has has two
 	// outputs whereas MCRR doesn't store to any
-	// registers so all of it's operands are listed
+	// registers so all of its operands are listed
 	// as inputs, therefore the operand order for
 	// MRRC2 needs to be [Rt, Rt2, cop, opc1, CRm]
 	// and MCRR2 operand order is [cop, opc1, Rt, Rt2, CRm]

arch/ARM/ARMInstPrinter.c

@@ -7,7 +7,7 @@
 /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */
 
 /* Only small edits allowed. */
-/* For multiple similiar edits, please create a Patch for the translator. */
+/* For multiple similar edits, please create a Patch for the translator. */
 
 /* Capstone's C++ file translator: */
 /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */

arch/ARM/ARMInstPrinter.h

@@ -7,7 +7,7 @@
 /* LLVM-tag: llvmorg-16.0.2-5-g464bda7750a3 */
 
 /* Only small edits allowed. */
-/* For multiple similiar edits, please create a Patch for the translator. */
+/* For multiple similar edits, please create a Patch for the translator. */
 
 /* Capstone's C++ file translator: */
 /* https://github.com/capstone-engine/capstone/tree/next/suite/auto-sync */

arch/ARM/ARMLinkage.h

@@ -4,7 +4,7 @@
 #ifndef CS_ARM_LINKAGE_H
 #define CS_ARM_LINKAGE_H
 
-// Function defintions to call static LLVM functions.
+// Function definitions to call static LLVM functions.
 
 #include "../../MCDisassembler.h"
 #include "../../MCInst.h"