Update MIPS via auto-sync from latest LLVM

Adds support for:
- microMips32r3
- microMips32r6
- Mips16
- Mips I ISA
- Mips II ISA
- Mips32 r2 ISA
- Mips32 r3 ISA
- Mips32 r5 ISA
- Mips32 r6 ISA
- Mips III ISA
- Mips IV ISA
- Mips V ISA
- Mips64 r2 ISA
- Mips64 r3 ISA
- Mips64 r5 ISA
- Mips64 r6 ISA
- Octeon (cnMIPS)
- Octeon+ (cnMIPS+)

Also cleans up cstool for better output and support.

MCInstPrinter.c

@@ -7,6 +7,7 @@
 
 extern bool ARM_getFeatureBits(unsigned int mode, unsigned int feature);
 extern bool PPC_getFeatureBits(unsigned int mode, unsigned int feature);
+extern bool Mips_getFeatureBits(unsigned int mode, unsigned int feature);
 extern bool AArch64_getFeatureBits(unsigned int mode, unsigned int feature);
 
 static bool testFeatureBits(const MCInst *MI, uint32_t Value)
@@ -24,6 +25,10 @@ static bool testFeatureBits(const MCInst *MI, uint32_t Value)
 	case CS_ARCH_PPC:
 		return PPC_getFeatureBits(MI->csh->mode, Value);
 #endif
+#ifdef CAPSTONE_HAS_MIPS
+	case CS_ARCH_MIPS:
+		return Mips_getFeatureBits(MI->csh->mode, Value);
+#endif
 #ifdef CAPSTONE_HAS_AARCH64
 	case CS_ARCH_AARCH64:
 		return AArch64_getFeatureBits(MI->csh->mode, Value);

MCRegisterInfo.c

@@ -149,3 +149,7 @@ bool MCRegisterClass_contains(const MCRegisterClass *c, unsigned Reg)
 
 	return (c->RegSet[Byte] & (1 << InByte)) != 0;
 }
+
+unsigned MCRegisterClass_getRegister(const MCRegisterClass *c, unsigned RegNo) {
+    return c->RegsBegin[RegNo];
+}

MCRegisterInfo.h

@@ -113,4 +113,6 @@ const MCRegisterClass* MCRegisterInfo_getRegClass(const MCRegisterInfo *RI, unsi
 
 bool MCRegisterClass_contains(const MCRegisterClass *c, unsigned Reg);
 
+unsigned MCRegisterClass_getRegister(const MCRegisterClass *c, unsigned i);
+
 #endif

Mapping.c

@@ -338,6 +338,7 @@ DEFINE_get_detail_op(aarch64, AArch64);
 DEFINE_get_detail_op(alpha, Alpha);
 DEFINE_get_detail_op(hppa, HPPA);
 DEFINE_get_detail_op(loongarch, LoongArch);
+DEFINE_get_detail_op(mips, Mips);
 DEFINE_get_detail_op(riscv, RISCV);
 
 /// Returns true if for this architecture the

Mapping.h

@@ -138,6 +138,7 @@ DECL_get_detail_op(aarch64, AArch64);
 DECL_get_detail_op(alpha, Alpha);
 DECL_get_detail_op(hppa, HPPA);
 DECL_get_detail_op(loongarch, LoongArch);
+DECL_get_detail_op(mips, Mips);
 DECL_get_detail_op(riscv, RISCV);
 
 /// Increments the detail->arch.op_count by one.
@@ -168,6 +169,8 @@ DEFINE_inc_detail_op_count(hppa, HPPA);
 DEFINE_dec_detail_op_count(hppa, HPPA);
 DEFINE_inc_detail_op_count(loongarch, LoongArch);
 DEFINE_dec_detail_op_count(loongarch, LoongArch);
+DEFINE_inc_detail_op_count(mips, Mips);
+DEFINE_dec_detail_op_count(mips, Mips);
 DEFINE_inc_detail_op_count(riscv, RISCV);
 DEFINE_dec_detail_op_count(riscv, RISCV);
 
@@ -198,6 +201,7 @@ DEFINE_get_arch_detail(aarch64, AArch64);
 DEFINE_get_arch_detail(alpha, Alpha);
 DEFINE_get_arch_detail(hppa, HPPA);
 DEFINE_get_arch_detail(loongarch, LoongArch);
+DEFINE_get_arch_detail(mips, Mips);
 DEFINE_get_arch_detail(riscv, RISCV);
 
 static inline bool detail_is_set(const MCInst *MI)