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made a new class for the PandA hdf writer and adjusted
PandAController
Also made it possible to pre-intialise blocks so that the controller can have the same pcap device as the post init panda.
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Original file line number | Diff line number | Diff line change |
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from .pvi import PVIEntry, fill_pvi_entries | ||
from .pvi import PVIEntry, fill_pvi_entries, pre_initialize_blocks | ||
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__all__ = ["PVIEntry", "fill_pvi_entries"] | ||
__all__ = ["PVIEntry", "fill_pvi_entries", "pre_initialize_blocks"] |
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from __future__ import annotations | ||
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from typing import Sequence | ||
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from ophyd_async.core import DEFAULT_TIMEOUT, SignalR, StandardDetector | ||
from ophyd_async.epics.pvi import fill_pvi_entries, pre_initialize_blocks | ||
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from .common_panda import CommonPandABlocks | ||
from .panda_controller import PandaPcapController | ||
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class HDFPandA(CommonPandABlocks, StandardDetector): | ||
def __init__( | ||
self, | ||
prefix: str, | ||
config_sigs: Sequence[SignalR] = (), | ||
name: str = "", | ||
): | ||
self._prefix = prefix | ||
pre_initialize_blocks(self) | ||
super().__init__( | ||
controller=PandaPcapController(pcap=self.pcap), | ||
# TODO | ||
writer=None, # type: ignore | ||
config_sigs=config_sigs, | ||
name=name, | ||
writer_timeout=DEFAULT_TIMEOUT, | ||
) | ||
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async def connect( | ||
self, sim: bool = False, timeout: float = DEFAULT_TIMEOUT | ||
) -> None: | ||
await fill_pvi_entries(self, self._prefix + "PVI", timeout=timeout, sim=sim) | ||
await super().connect(sim=sim, timeout=timeout) |
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import time | ||
from typing import AsyncGenerator, AsyncIterator, Dict, Optional, Sequence | ||
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import pytest | ||
from bluesky.protocols import Descriptor, StreamAsset | ||
from event_model import ComposeStreamResourceBundle, compose_stream_resource | ||
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from ophyd_async.core import ( | ||
DEFAULT_TIMEOUT, | ||
DetectorWriter, | ||
DeviceCollector, | ||
SignalRW, | ||
SimSignalBackend, | ||
observe_value, | ||
) | ||
from ophyd_async.panda import HDFPandA | ||
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class DummyWriter(DetectorWriter): | ||
def __init__(self, name: str, shape: Sequence[int]): | ||
self.dummy_signal = SignalRW(backend=SimSignalBackend(int, source="test")) | ||
self._shape = shape | ||
self._name = name | ||
self._file: Optional[ComposeStreamResourceBundle] = None | ||
self._last_emitted = 0 | ||
self.index = 0 | ||
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async def open(self, multiplier: int = 1) -> Dict[str, Descriptor]: | ||
return { | ||
self._name: Descriptor( | ||
source="sim://some-source", | ||
shape=self._shape, | ||
dtype="number", | ||
external="STREAM:", | ||
) | ||
} | ||
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async def observe_indices_written( | ||
self, timeout=DEFAULT_TIMEOUT | ||
) -> AsyncGenerator[int, None]: | ||
num_captured: int | ||
async for num_captured in observe_value(self.dummy_signal, timeout): | ||
yield num_captured | ||
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async def get_indices_written(self) -> int: | ||
return self.index | ||
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async def collect_stream_docs( | ||
self, indices_written: int | ||
) -> AsyncIterator[StreamAsset]: | ||
if indices_written: | ||
if not self._file: | ||
self._file = compose_stream_resource( | ||
spec="AD_HDF5_SWMR_SLICE", | ||
root="/", | ||
data_key=self._name, | ||
resource_path="", | ||
resource_kwargs={ | ||
"path": "", | ||
"multiplier": 1, | ||
"timestamps": "/entry/instrument/NDAttributes/NDArrayTimeStamp", | ||
}, | ||
) | ||
yield "stream_resource", self._file.stream_resource_doc | ||
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if indices_written >= self._last_emitted: | ||
indices = dict( | ||
start=self._last_emitted, | ||
stop=indices_written, | ||
) | ||
self._last_emitted = indices_written | ||
self._last_flush = time.monotonic() | ||
yield "stream_datum", self._file.compose_stream_datum(indices) | ||
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async def close(self) -> None: | ||
self._file = None | ||
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@pytest.fixture | ||
async def sim_hdf_panda(): | ||
async with DeviceCollector(sim=True): | ||
sim_hdf_panda = HDFPandA("HDFPANDA:") | ||
yield sim_hdf_panda | ||
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async def test_hdf_panda_passes_blocks_to_controller(sim_hdf_panda: HDFPandA): | ||
assert hasattr(sim_hdf_panda.controller, "pcap") | ||
assert sim_hdf_panda.controller.pcap == sim_hdf_panda.pcap |
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