Increase performance of SWD and JTAG bitbanging #1688
Commits on Jan 4, 2024
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jtagtap: Extract platform_delay_busy()
* Copy the snippet verbatim from 10 identical places * Ask GCC to please inline it back (so codegen does not change) compromising 116 bytes of flash for less jumping around
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swdptap: Extract platform_delay_busy()
* Copy the snippet verbatim from 10 similar places, preserving the +1 in argument (turnaround/parity) for automatic 0 clock delay instead of checking against UINT32_MAX * Mark as static for GCC to inline it back (so codegen does not change) compromising 96 bytes of flash for less jumping around
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jtagtap, swdptap: Replace platform_delay_busy() with a faster version
* Use predecrement and check against zero, as before * Stop touching the stack with `volatile` variables, a register is sufficient * Use normal SysTick platform_delay() in jtagtap_reset(), which is both longer duration and does not depend on platform HCLK.
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timing_stm32: Do not default clk_divider to 0; fix frequency_get()
* Avoid a zero loops delay, which underflows in `platform_delay_busy()`, hanging the adapter
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timing_stm32: Update factor and offset for uncalibrated platforms
* For STM32F4, dial in 12 & 4 as measured by LA and MSO. This became faster thanks to dropping double writes and volatile on-stack counters. * For STM32F0, dial in slightly bigger 16 & 6 because armv6-m codegen is different. * For STM32F1, dial in 18 & 4: less than 22 thanks to no volatile on-stack counters, and similar busy delay impact (armv7-m). * For everything else, keep the old numbers in hope someone measures it later.
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swdptap: Tweak
_no_delay()timings for a more even duty cycle* Reference: jtagtap_tms_seq_no_delay(). Also add comments. * Use appropriate type for TMS state output.
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swdptap: Handle no_delay parity/turnaround as well
* This allows dropping the 0-loops check from delay_busy
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jtagtap: optimize _no_delay() paths at -O3 like swdptap
* Also update signature of jtagtap_tms_seq() (s/ticks/clock_cycles/)
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jtagtap: Equalize _next & _cycle, replace line reset
* SWD line reset needs 50 clocks with high TMS/SWDIO, this was achieved by looping over jtagtap_next() which incurs function call delays; * Use jtagtap_cycle() instead which seems appropriate here, and discards TDO anyways; * The adiv5_swd.c:swd_line_reset_sequence() counterpart seems less fitting to duplicate in jtagtap. * Annotate any new nops in hot no_delay path.
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jtagtap: Protect tdi_tdo_seq from writing into NULL data_out
...by redirecting to faster tdi_seq * Do not use nullability attributes yet
