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blackpill-f4: Provide both SWO modes in all three pinouts
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* Add TIM2_CH2 on PB3 (or USART1_RX) and expand the TIM macros
* Enable HDSEL for PB6 the USART1_TX in ALTERNATIVE_PINOUT=1 because it ends up with TDO on TX AF
* Move the RCC clock enables up into platform_init() and
  empty the SWO_TIM_CLK_EN() macro instead of writing it as three flavours
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ALTracer committed Sep 29, 2024
1 parent c24f5d9 commit 4c0c8c3
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Showing 2 changed files with 38 additions and 18 deletions.
14 changes: 14 additions & 0 deletions src/platforms/common/blackpill-f4/blackpill-f4.c
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,20 @@ void platform_init(void)
rcc_periph_clock_enable(RCC_GPIOC);
rcc_periph_clock_enable(RCC_GPIOB);
rcc_periph_clock_enable(RCC_CRC);
#if SWO_ENCODING == 1 || SWO_ENCODING == 3
/* Make sure to power up the timer used for trace */
rcc_periph_clock_enable(SWO_TIM_CLK);
#endif
#if SWO_ENCODING == 2 || SWO_ENCODING == 3
/* Enable relevant USART and DMA early in platform init */
rcc_periph_clock_enable(SWO_UART_CLK);
rcc_periph_clock_enable(SWO_DMA_CLK);
/* Deal with receiving on Tx pin by enabling Half-Duplex mode */
#if SWO_UART_PORT == GPIOB && SWO_UART_RX_PIN == GPIO6
//usart_enable_halfduplex(SWO_UART);
USART_CR3(SWO_UART) |= USART_CR3_HDSEL;
#endif
#endif

#ifndef BMD_BOOTLOADER
/* Blackpill board has a floating button on PA0. Pull it up and use as active-low. */
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42 changes: 24 additions & 18 deletions src/platforms/common/blackpill-f4/blackpill-f4.h
Original file line number Diff line number Diff line change
Expand Up @@ -160,7 +160,7 @@ extern bool debug_bmp;
#define NRST_PORT PINOUT_SWITCH(GPIOA, GPIOB, GPIOA)
#define NRST_PIN PINOUT_SWITCH(GPIO5, GPIO4, GPIO5)

/* SWO comes in on the same pin as TDO (FIXME: PB6 TX. Half-duplex?) */
/* SWO comes in on the same pin as TDO */
#define SWO_PORT GPIOB
#define SWO_PIN PINOUT_SWITCH(GPIO7, GPIO6, GPIO3)

Expand Down Expand Up @@ -291,29 +291,35 @@ extern bool debug_bmp;
#define IRQ_PRI_SWO_TIM (0U << 4U)
#define IRQ_PRI_SWO_DMA (0U << 4U)

/* Use TIM4 Input 2 (from PB7/TDO) or Input 1 (from PB6/TDO), AF2, triggered on rising edge */
#define SWO_TIM TIM4
#define SWO_TIM_CLK_EN() rcc_periph_clock_enable(RCC_TIM4)
#define SWO_TIM_IRQ NVIC_TIM4_IRQ
#define SWO_TIM_ISR(x) tim4_isr(x)
#define SWO_IC_IN PINOUT_SWITCH(TIM_IC_IN_TI2, TIM_IC_IN_TI1)
#define SWO_IC_RISING PINOUT_SWITCH(TIM_IC2, TIM_IC1)
#define SWO_CC_RISING PINOUT_SWITCH(TIM4_CCR2, TIM4_CCR1)
#define SWO_ITR_RISING PINOUT_SWITCH(TIM_DIER_CC2IE, TIM_DIER_CC1IE)
#define SWO_STATUS_RISING PINOUT_SWITCH(TIM_SR_CC2IF, TIM_SR_CC1IF)
#define SWO_IC_FALLING PINOUT_SWITCH(TIM_IC1, TIM_IC2)
#define SWO_CC_FALLING PINOUT_SWITCH(TIM4_CCR1, TIM4_CCR2)
#define SWO_STATUS_FALLING PINOUT_SWITCH(TIM_SR_CC1IF, TIM_SR_CC2IF)
/*
* Use general-purpose timer input capture triggered on rising edge
* TIM4 Input 2 from PB7 AF2, or
* TIM4 Input 1 from PB6 AF2, or
* TIM2 Input 2 from PB3 AF1
*/
#define SWO_TIM_CLK_EN()
#define SWO_TIM_CLK PINOUT_SWITCH(RCC_TIM4, RCC_TIM4, RCC_TIM2)
#define SWO_TIM PINOUT_SWITCH(TIM4, TIM4, TIM2)
#define SWO_TIM_IRQ PINOUT_SWITCH(NVIC_TIM4_IRQ, NVIC_TIM4_IRQ, NVIC_TIM2_IRQ)
#define SWO_TIM_ISR(x) PINOUT_SWITCH(tim4_isr(x), tim4_isr(x), tim2_isr(x))
#define SWO_IC_IN PINOUT_SWITCH(TIM_IC_IN_TI2, TIM_IC_IN_TI1, TIM_IC_IN_TI2)
#define SWO_IC_RISING PINOUT_SWITCH(TIM_IC2, TIM_IC1, TIM_IC2)
#define SWO_CC_RISING PINOUT_SWITCH(TIM4_CCR2, TIM4_CCR1, TIM2_CCR2)
#define SWO_ITR_RISING PINOUT_SWITCH(TIM_DIER_CC2IE, TIM_DIER_CC1IE, TIM_DIER_CC2IE)
#define SWO_STATUS_RISING PINOUT_SWITCH(TIM_SR_CC2IF, TIM_SR_CC1IF, TIM_SR_CC2IF)
#define SWO_IC_FALLING PINOUT_SWITCH(TIM_IC1, TIM_IC2, TIM_IC1)
#define SWO_CC_FALLING PINOUT_SWITCH(TIM4_CCR1, TIM4_CCR2, TIM2_CCR1)
#define SWO_STATUS_FALLING PINOUT_SWITCH(TIM_SR_CC1IF, TIM_SR_CC2IF, TIM_SR_CC1IF)
#define SWO_STATUS_OVERFLOW (TIM_SR_CC1OF | TIM_SR_CC2OF)
#define SWO_TRIG_IN PINOUT_SWITCH(TIM_SMCR_TS_TI2FP2, TIM_SMCR_TS_TI1FP1)
#define SWO_TIM_PIN_AF GPIO_AF2
#define SWO_TRIG_IN PINOUT_SWITCH(TIM_SMCR_TS_TI2FP2, TIM_SMCR_TS_TI1FP1, TIM_SMCR_TS_TI2FP2)
#define SWO_TIM_PIN_AF PINOUT_SWITCH(GPIO_AF2, GPIO_AF2, GPIO_AF1)

/* On F411 use USART1_RX mapped on PB7 for async capture */
/* On F411 use USART1_RX mapped on PB7/PB6/PB3 for async capture */
#define SWO_UART USBUSART1
#define SWO_UART_CLK USBUSART1_CLK
#define SWO_UART_DR USBUSART1_DR
#define SWO_UART_PORT GPIOB
#define SWO_UART_RX_PIN GPIO7
#define SWO_UART_RX_PIN PINOUT_SWITCH(GPIO7, GPIO6, GPIO3)
#define SWO_UART_PIN_AF GPIO_AF7

/* Bind to the same DMA Rx channel */
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