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Reworked pwm modes to use 24hkz mode at lower throttle and 96khz mode…
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… at higher throttle

Do not load braking strength setting when using edge aligned PWM

Optimized 96khz pwm mode

Dynamic pwm threshold defaults set to the correct values
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@damosvil
damosvil authored and damosvil committed Dec 19, 2023
1 parent 894a3e6 commit 94711bc
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Showing 4 changed files with 112 additions and 112 deletions.
1 change: 0 additions & 1 deletion src/Bluejay.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -244,7 +244,6 @@ Pwm_Braking24_H: DS 1 ; Max Braking @24khz pwm (hi byte)
Pwm_Braking48_L: DS 1 ; Max Braking @48khz pwm (lo byte)
Pwm_Braking48_H: DS 1 ; Max Braking @48khz pwm (hi byte)
Pwm_Braking96_L: DS 1 ; Max Braking @96khz pwm (lo byte)
Pwm_Braking96_H: DS 1 ; Max Braking @96khz pwm (hi byte)
Temp_Prot_Limit: DS 1 ; Temperature protection limit
Temp_Pwm_Level_Setpoint: DS 1 ; PWM level setpoint
Beep_Strength: DS 1 ; Strength of beeps
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182 changes: 92 additions & 90 deletions src/Modules/Isrs.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -372,28 +372,39 @@ t1_int_dynamic_pwm:
; Dynamic PWM
mov A, Temp2

; Choose between 96khz and 48khz
clr C
subb A, Throttle_96to48_Threshold
jc t1_int_run_96khz

; Choose between 48khz and 24khz
clr C
subb A, Throttle_48to24_Threshold
jc t1_int_run_24khz

; Choose between 96khz and 48khz
clr C
subb A, Throttle_96to48_Threshold
jc t1_int_run_48khz


IF PWM_CENTERED == 0 ; Edge aligned PWM

t1_int_run_24khz:
t1_int_run_96khz:
; Scale pwm resolution and invert (duty cycle is defined inversely)
; No deadtime and 24khz
; Deadtime and 96khz
mov B, Temp5
mov A, Temp4
mov C, B.0
rrc A
mov C, B.1
rrc A
cpl A
mov Temp2, A
mov A, Temp5
rr A
rr A
cpl A
anl A, #7
anl A, #1
mov Temp3, A
mov A, Temp4
cpl A

; Set PCA to work at 96khz (9bit pwm)
mov PCA0PWM, #81h
mov Temp2, A

; Set PCA to work at 24khz (11bit pwm)
Expand All @@ -418,26 +429,15 @@ t1_int_run_48khz:
mov PCA0PWM, #82h
jmp t1_int_set_pwm

t1_int_run_96khz:
t1_int_run_24khz:
; Scale pwm resolution and invert (duty cycle is defined inversely)
; Deadtime and 96khz
mov B, Temp5
mov A, Temp4
mov C, B.0
rrc A
mov C, B.1
rrc A
cpl A
mov Temp2, A
; No deadtime and 24khz
mov A, Temp5
rr A
rr A
cpl A
anl A, #1
anl A, #7
mov Temp3, A

; Set PCA to work at 96khz (9bit pwm)
mov PCA0PWM, #81h
mov A, Temp4
cpl A

t1_int_set_pwm:
; Set PWM registers
Expand All @@ -449,24 +449,14 @@ t1_int_set_pwm:

ELSE ; Center aligned PWM

t1_int_run_24khz:
t1_int_run_96khz:
; Scale pwm resolution and invert (duty cycle is defined inversely)
; Deadtime and 24khz
clr C
mov A, Temp5
rrc A
cpl A
anl A, #3
mov Temp3, A
mov A, Temp4
rrc A
; Deadtime and 96khz
mov A, Temp2 ; Temp2 already 8-bit
cpl A
mov Temp2, A

; Set PCA to work at 24khz (10bit pwm)
mov PCA0PWM, #82h

; Subtract dead time from normal pwm and store as damping PWM
; Substract dead time from normal pwm and store as damping PWM
; Damping PWM duty cycle will be higher because numbers are inverted
clr C
mov A, Temp2 ; Skew damping FET timing
Expand All @@ -476,27 +466,32 @@ ELSE
subb A, #(DEADTIME)
ENDIF
mov Temp4, A
mov A, Temp3
subb A, #0
mov Temp5, A
jnc t1_int_max_braking_set_24khz
jnc t1_int_max_braking_set_96khz

clr A ; Set to minimum value
mov Temp4, A
mov Temp5, A
jmp t1_int_set_pwm ; Max braking is already zero - branch
mov Temp4, #0 ; Set to minimum value
sjmp t1_int_set_pwm_96khz ; Max braking is already zero - branch

t1_int_max_braking_set_24khz:
t1_int_max_braking_set_96khz:
clr C
mov A, Temp4
subb A, Pwm_Braking24_L
mov A, Temp5
subb A, Pwm_Braking24_H ; Is braking pwm more than maximum allowed braking?
jc t1_int_set_pwm ; Yes - branch
subb A, Pwm_Braking96_L ; Is braking pwm more than maximum allowed braking?
jc t1_int_set_pwm_96khz ; Yes - branch

mov Temp4, Pwm_Braking24_L ; No - set desired braking instead
mov Temp5, Pwm_Braking24_H
jmp t1_int_set_pwm
mov Temp4, Pwm_Braking96_L ; No - set desired braking instead

t1_int_set_pwm_96khz:
; Set PWM registers
; NOTE: Interrupts are not explicitly disabled. Assume higher priority
; interrupts (Int0, Timer0) to be disabled at this point.
; Set PCA to work at 96khz (8bit pwm)
mov PCA0PWM, #80h

; Set power pwm auto-reload registers
Set_Power_Pwm_Reg_H Temp2

; Set damp pwm auto-reload registers
Set_Damp_Pwm_Reg_H Temp4
jmp t1_int_prepare_telemetry

t1_int_run_48khz:
; Scale pwm resolution and invert (duty cycle is defined inversely)
Expand All @@ -516,10 +511,7 @@ t1_int_run_48khz:
anl A, #1
mov Temp3, A

; Set PCA to work at 48khz (9bit pwm)
mov PCA0PWM, #81h

; Subtract dead time from normal pwm and store as damping PWM
; Substract dead time from normal pwm and store as damping PWM
; Damping PWM duty cycle will be higher because numbers are inverted
clr C
mov A, Temp2 ; Skew damping FET timing
Expand All @@ -537,32 +529,50 @@ ENDIF
clr A ; Set to minimum value
mov Temp4, A
mov Temp5, A
sjmp t1_int_set_pwm ; Max braking is already zero - branch
sjmp t1_int_set_pwm_48khz ; Max braking is already zero - branch

t1_int_max_braking_set_48khz:
clr C
mov A, Temp4
subb A, Pwm_Braking48_L
mov A, Temp5
subb A, Pwm_Braking48_H ; Is braking pwm more than maximum allowed braking?
jc t1_int_set_pwm ; Yes - branch
jc t1_int_set_pwm_48khz ; Yes - branch

mov Temp4, Pwm_Braking48_L ; No - set desired braking instead
mov Temp5, Pwm_Braking48_H
jmp t1_int_set_pwm

t1_int_run_96khz:
t1_int_set_pwm_48khz:
; Set PWM registers
; NOTE: Interrupts are not explicitly disabled. Assume higher priority
; interrupts (Int0, Timer0) to be disabled at this point.
; Set PCA to work at 48khz (9bit pwm)
mov PCA0PWM, #81h

; Set power pwm auto-reload registers
Set_Power_Pwm_Reg_L Temp2
Set_Power_Pwm_Reg_H Temp3

; Set damp pwm auto-reload registers
Set_Damp_Pwm_Reg_L Temp4
Set_Damp_Pwm_Reg_H Temp5
jmp t1_int_prepare_telemetry

t1_int_run_24khz:
; Scale pwm resolution and invert (duty cycle is defined inversely)
; Deadtime and 96khz
mov A, Temp2 ; Temp2 already 8-bit
; Deadtime and 24khz
clr C
mov A, Temp5
rrc A
cpl A
anl A, #3
mov Temp3, A
mov A, Temp4
rrc A
cpl A
mov Temp2, A
mov Temp3, #0

; Set PCA to work at 96khz (8bit pwm)
mov PCA0PWM, #80h

; Subtract dead time from normal pwm and store as damping PWM
; Substract dead time from normal pwm and store as damping PWM
; Damping PWM duty cycle will be higher because numbers are inverted
clr C
mov A, Temp2 ; Skew damping FET timing
Expand All @@ -575,39 +585,31 @@ ENDIF
mov A, Temp3
subb A, #0
mov Temp5, A
jnc t1_int_max_braking_set_96khz
jnc t1_int_max_braking_set_24khz

clr A ; Set to minimum value
mov Temp4, A
mov Temp5, A
sjmp t1_int_set_pwm_96khz ; Max braking is already zero - branch
jmp t1_int_set_pwm_24khz ; Max braking is already zero - branch

t1_int_max_braking_set_96khz:
t1_int_max_braking_set_24khz:
clr C
mov A, Temp4
subb A, Pwm_Braking96_L
subb A, Pwm_Braking24_L
mov A, Temp5
subb A, Pwm_Braking96_H ; Is braking pwm more than maximum allowed braking?
jc t1_int_set_pwm_96khz ; Yes - branch
subb A, Pwm_Braking24_H ; Is braking pwm more than maximum allowed braking?
jc t1_int_set_pwm_24khz ; Yes - branch

mov Temp4, Pwm_Braking96_L ; No - set desired braking instead
mov Temp5, Pwm_Braking96_H
mov Temp4, Pwm_Braking24_L ; No - set desired braking instead
mov Temp5, Pwm_Braking24_H

t1_int_set_pwm_96khz:
t1_int_set_pwm_24khz:
; Set PWM registers
; NOTE: Interrupts are not explicitly disabled. Assume higher priority
; interrupts (Int0, Timer0) to be disabled at this point.
; Set power pwm auto-reload registers
Set_Power_Pwm_Reg_H Temp2

; Set damp pwm auto-reload registers
Set_Damp_Pwm_Reg_H Temp4
jmp t1_int_prepare_telemetry
; Set PCA to work at 24khz (10bit pwm)
mov PCA0PWM, #82h

t1_int_set_pwm:
; Set PWM registers
; NOTE: Interrupts are not explicitly disabled. Assume higher priority
; interrupts (Int0, Timer0) to be disabled at this point.
; Set power pwm auto-reload registers
Set_Power_Pwm_Reg_L Temp2
Set_Power_Pwm_Reg_H Temp3
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37 changes: 18 additions & 19 deletions src/Modules/Settings.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -166,12 +166,12 @@ decode_temp_done:
mov Temp1, #Pgm_Beep_Strength ; Read programmed beep strength setting
mov Beep_Strength, @Temp1 ; Set beep strength

; Read programmed braking strength setting
mov Temp1, #Pgm_Braking_Strength

; Scale braking strength to pwm resolution
; Only for center aligned pwm modes (edge aligned pwm insert deadtime by hw)
IF PWM_CENTERED == 1
; Read programmed braking strength setting
mov Temp1, #Pgm_Braking_Strength

; Deadtime & 24khz (10bit pwm)
mov A, @Temp1
rl A
Expand All @@ -195,7 +195,6 @@ IF PWM_CENTERED == 1

; Deadtime & 96khz (8bit pwm)
mov A, @Temp1
mov Pwm_Braking96_H, #0
mov Pwm_Braking96_L, A

cjne @Temp1, #0FFh, decode_throttle_threshold
Expand All @@ -211,44 +210,44 @@ decode_throttle_threshold:

; Check 24khz pwm frequency
cjne A, #24, decode_throttle_not_24
mov Throttle_96to48_Threshold, #0
mov Throttle_48to24_Threshold, #0
mov Throttle_96to48_Threshold, #255
mov Throttle_48to24_Threshold, #255
jmp decode_end

decode_throttle_not_24:
; Check 48khz pwm frequency
cjne A, #48, decode_throttle_not_48
mov Throttle_96to48_Threshold, #0
mov Throttle_48to24_Threshold, #255
mov Throttle_96to48_Threshold, #255
mov Throttle_48to24_Threshold, #0
jmp decode_end

decode_throttle_not_48:
; Check 96khz pwm frequency
cjne A, #96, decode_throttle_not_96
mov Throttle_96to48_Threshold, #255
mov Throttle_48to24_Threshold, #255
mov Throttle_96to48_Threshold, #0
mov Throttle_48to24_Threshold, #0
jmp decode_end

decode_throttle_not_96:
; Dynamic pwm frequency
; Load programmed throttle threshold into Throttle_96to48_Threshold
mov Temp1, #Pgm_96to48_Threshold
mov Throttle_96to48_Threshold, @Temp1

; Load programmed throttle threshold into Throttle_48to24_Threshold
mov Temp1, #Pgm_48to24_Threshold
mov Throttle_48to24_Threshold, @Temp1

; Sanitize Throttle_48to24_Threshold
; Load programmed throttle threshold into Throttle_96to48_Threshold
mov Temp1, #Pgm_96to48_Threshold
mov Throttle_96to48_Threshold, @Temp1

; Sanitize Throttle_96to48_Threshold
clr C
mov A, Throttle_48to24_Threshold
subb A, Throttle_96to48_Threshold
mov A, Throttle_96to48_Threshold
subb A, Throttle_48to24_Threshold
jnc decode_throttle_not_96_end
clr A

decode_throttle_not_96_end:
; Update Throttle_48to24_Threshold
mov Throttle_48to24_Threshold, A
; Update Throttle_96to48_Threshold
mov Throttle_96to48_Threshold, A

decode_end:
ret
4 changes: 2 additions & 2 deletions src/Settings/BluejaySettings.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -49,5 +49,5 @@ DEFAULT_PGM_STARTUP_POWER_MAX EQU 5 ; 0..255 => (1000..2000 Throttle): Maxim
DEFAULT_PGM_BRAKING_STRENGTH EQU 255 ; 0..255 => 0..100 % Braking

DEFAULT_PGM_SAFETY_ARM EQU 0 ; EDT safety arm is disabled by default
DEFAULT_96to48_THRESHOLD EQU 85 ; About 33% threshold to change between 96 and 48khz
DEFAULT_48to24_THRESHOLD EQU 170 ; About 66% threshold to change between 48 and 24khz
DEFAULT_48to24_THRESHOLD EQU 85 ; About 33% threshold to change between 48 and 24khz
DEFAULT_96to48_THRESHOLD EQU 170 ; About 66% threshold to change between 96 and 48khz

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