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Add CONFIG_SET_SHARC_IDLE, to force SHARC's idle register on boot. #37

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30 changes: 30 additions & 0 deletions arch/arm/include/asm/arch-adi/sc5xx/sc5xx_sharc_idle.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/

#ifndef _SC5XX_SHARC_IDLE_H_
#define _SC5XX_SHARC_IDLE_H_

#define ADI_RCU_REG_BASE 0x3108c000

/* Register offsets */
#define ADI_RCU_REG_MSG 0x6c
#define ADI_RCU_REG_MSG_SET 0x70
#define ADI_RCU_REG_MSG_CLR 0x74

/* Bit values for the RCU0_MSG register */
#define RCU0_MSG_C0IDLE 0x00000100 /* Core 0 Idle */
#define RCU0_MSG_C1IDLE 0x00000200 /* Core 1 Idle */
#define RCU0_MSG_C2IDLE 0x00000400 /* Core 2 Idle */

#ifdef CONFIG_SET_SHARC_IDLE
/**
* set_sharc_cores_idle() - set the idle flag in RCU_MSG for the SHARC cores.
*
* Returns: 0 on success, an error code otherwise.
*/
int set_sharc_cores_idle(void);
#endif // CONFIG_SET_SHARC_IDLE

#endif // _SC5XX_SHARC_IDLE_H_
4 changes: 4 additions & 0 deletions arch/arm/mach-sc5xx/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -204,6 +204,10 @@ config ADI_SPL_FORCE_BMODE
5 = QSPI -> OSPI
6 = QSPI -> eMMC

config SET_SHARC_IDLE
bool "Force the SHARC cores' idle register to be set during boot"
default n

config CLKIN_HZ
int "CLKIN_HZ"
default 25000000
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1 change: 1 addition & 0 deletions arch/arm/mach-sc5xx/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -15,3 +15,4 @@ obj-y += sc59x/sc59x-shared.o
endif

obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_SPL_BUILD) += sc5xx_sharc_idle.o
32 changes: 32 additions & 0 deletions arch/arm/mach-sc5xx/sc5xx_sharc_idle.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* (C) Copyright 2024 - Analog Devices, Inc.
*/

#include <asm/io.h>
#include <asm/arch-adi/sc5xx/sc5xx_sharc_idle.h>
#include <log.h>

#ifdef CONFIG_SET_SHARC_IDLE
static int sharc_set_idle(unsigned int coreid) {
writew(RCU0_MSG_C0IDLE << coreid, ADI_RCU_REG_BASE + ADI_RCU_REG_MSG_SET);

return 0;
}

extern int set_sharc_cores_idle(void) {
debug("Setting the SHARC cores to IDLE...\n");

int ret;

for (int c = 1; c <= 2; c++) {
ret = sharc_set_idle(c);
if (ret) {
printf("Error setting SHARC Core%d idle.\n", c - 1);
return ret;
}
}

return 0;
}
#endif // CONFIG_SET_SHARC_IDLE
6 changes: 6 additions & 0 deletions arch/arm/mach-sc5xx/spl.c
Original file line number Diff line number Diff line change
Expand Up @@ -224,6 +224,12 @@ void board_init_f(ulong dummy)
panic("spl_early_init() failed\n");

preloader_console_init();

#ifdef CONFIG_SET_SHARC_IDLE
ret = set_sharc_cores_idle();
if (ret)
printf("Warn: failed to set SHARC cores idle (%d)\n", ret);
#endif
}

#ifdef CONFIG_ADI_FALCON
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