spi-no-cs hack

analogdevicesinc · Dec 7, 2023 · 457adbe · 457adbe
1 parent 38b10d6
commit 457adbe
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Showing 5 changed files with 26 additions and 8 deletions.
diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7944.yaml
@@ -30,6 +30,7 @@ properties:
   reg: true
   spi-max-frequency: true
   spi-cpha: true
+  spi-no-cs: true
 
   adi,spi-mode:
     $ref: /schemas/types.yaml#/definitions/string
@@ -163,6 +164,15 @@ allOf:
     else:
       properties:
         adi,next-in-chain: false
+  - if:
+      properties:
+        adi,spi-mode:
+          enum:
+            3-wire
+            chain
+    then:
+      required:
+        - spi-no-cs
   - if:
       required:
         - turbo-gpios

diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
@@ -34,6 +34,11 @@ properties:
     description:
       The device requires the chip select active high.
 
+  spi-no-cs:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      The device does not have a chip select line.
+
   spi-lsb-first:
     $ref: /schemas/types.yaml#/definitions/flag
     description:

diff --git a/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-ad7985.dts b/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-ad7985.dts
@@ -137,6 +137,7 @@
 			reg = <0>;
 			// TODO: awaiting HDL fix for CPHA
 			// spi-cpha;
+			spi-no-cs;
 			spi-max-frequency = <111111111>; /* 9 ns period */
 			adi,spi-mode = "3-wire";
 			cnv-gpios = <&axi_spi_engine_0 0 GPIO_ACTIVE_HIGH>;

diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c
@@ -238,17 +238,17 @@ static void spi_engine_gen_cs(struct spi_engine_program *p, bool dry,
 			      struct spi_device *spi, bool assert,
 			      struct spi_engine_gpio_state *gpio_state)
 {
-	// TODO: uncomment when we have GPIO support in HDL currently, this
-	// causes all data in the DMA buffer to be 0
+	unsigned int mask = 0xff;
 
-	// unsigned int mask = 0xff;
+	if (spi->mode & SPI_NO_CS)
+		return;
 
-	// if (assert)
-	// 	mask ^= BIT(spi_get_chipselect(spi, 0));
+	if (assert)
+		mask ^= BIT(spi_get_chipselect(spi, 0));
 
-	// gpio_state->value = (mask & ~gpio_state->mask) | (gpio_state->value & gpio_state->mask);
+	gpio_state->value = (mask & ~gpio_state->mask) | (gpio_state->value & gpio_state->mask);
 
-	// spi_engine_program_add_cmd(p, dry, SPI_ENGINE_CMD_ASSERT(0, gpio_state->value));
+	spi_engine_program_add_cmd(p, dry, SPI_ENGINE_CMD_ASSERT(0, gpio_state->value));
 }
 
 /*
@@ -1262,7 +1262,7 @@ static int spi_engine_probe(struct platform_device *pdev)
 	}
 
 	host->dev.of_node = pdev->dev.of_node;
-	host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE;
+	host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE | SPI_NO_CS;
 	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
 	host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2;
 	host->transfer_one_message = spi_engine_transfer_one_message;

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
@@ -2239,6 +2239,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
 		spi->mode |= SPI_LSB_FIRST;
 	if (of_property_read_bool(nc, "spi-cs-high"))
 		spi->mode |= SPI_CS_HIGH;
+	if (of_property_read_bool(nc, "spi-no-cs"))
+		spi->mode |= SPI_NO_CS;
 
 	/* Device DUAL/QUAD mode */
 	if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {