Update PIDX_update_mechanism.rst

Xilinx · Sep 21, 2024 · 24c1a80 · 24c1a80
1 parent 05a150d
commit 24c1a80
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/...ystem_for_PCIExpress_IP_Driver/qdma_conceptual_topics/PIDX_update_mechanism.rst b/...ystem_for_PCIExpress_IP_Driver/qdma_conceptual_topics/PIDX_update_mechanism.rst
@@ -5,11 +5,11 @@ Deciphering the PIDX Update Mechanism in a QDMA Subsystem for CPM5
 
 - The blog in the link below aims to provide a conceptual grasp of the PIDX update mechanism, focusing on key aspects such as:
 
-	- Ring Size (Queue Size)
-	- The maximum value of the initial PIDX Update
+    - Ring Size (Queue Size)
+    - The maximum value of the initial PIDX Update
     - The Status field in the Queue
     - The correlation between CIDX value and the number of descriptors that software can purge from the queue
     - Wrap-around and error scenarios in subsequent PIDX update values
     - Tracking PIDX updates in the Traffic Manager interface etc.
 
-https://adaptivesupport.amd.com/s/article/Deciphering-PIDX-Update-Mechanism-in-QDMA-Subsystem-for-PCI-Express
+https://adaptivesupport.amd.com/s/article/Deciphering-PIDX-Update-Mechanism-in-QDMA-Subsystem-for-PCI-Express